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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T163; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP5; RUN: llc < %s -mtriple=armv5t-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMNODPS6; RUN: llc < %s -mtriple=armv5te-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP7; RUN: llc < %s -mtriple=armv5te-none-eabi -mattr=+dsp | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP8; RUN: llc < %s -mtriple=armv5te-none-eabi -mattr=+dsp,thumb-mode | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T15TE9; RUN: llc < %s -mtriple=armv6-none-eabi -mattr=+dsp,thumb-mode | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T1610; RUN: llc < %s -mtriple=armv6-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMDSP11 12declare i4 @llvm.sadd.sat.i4(i4, i4)13declare i8 @llvm.sadd.sat.i8(i8, i8)14declare i16 @llvm.sadd.sat.i16(i16, i16)15declare i32 @llvm.sadd.sat.i32(i32, i32)16declare i64 @llvm.sadd.sat.i64(i64, i64)17 18define i32 @func(i32 %x, i32 %y) nounwind {19; CHECK-T1-LABEL: func:20; CHECK-T1: @ %bb.0:21; CHECK-T1-NEXT: adds r0, r0, r122; CHECK-T1-NEXT: bvc .LBB0_223; CHECK-T1-NEXT: @ %bb.1:24; CHECK-T1-NEXT: asrs r1, r0, #3125; CHECK-T1-NEXT: movs r0, #126; CHECK-T1-NEXT: lsls r0, r0, #3127; CHECK-T1-NEXT: eors r0, r128; CHECK-T1-NEXT: .LBB0_2:29; CHECK-T1-NEXT: bx lr30;31; CHECK-T2NODSP-LABEL: func:32; CHECK-T2NODSP: @ %bb.0:33; CHECK-T2NODSP-NEXT: adds r0, r0, r134; CHECK-T2NODSP-NEXT: mov.w r1, #-214748364835; CHECK-T2NODSP-NEXT: it vs36; CHECK-T2NODSP-NEXT: eorvs.w r0, r1, r0, asr #3137; CHECK-T2NODSP-NEXT: bx lr38;39; CHECK-T2DSP-LABEL: func:40; CHECK-T2DSP: @ %bb.0:41; CHECK-T2DSP-NEXT: qadd r0, r0, r142; CHECK-T2DSP-NEXT: bx lr43;44; CHECK-ARMNODPS-LABEL: func:45; CHECK-ARMNODPS: @ %bb.0:46; CHECK-ARMNODPS-NEXT: adds r0, r0, r147; CHECK-ARMNODPS-NEXT: mov r1, #-214748364848; CHECK-ARMNODPS-NEXT: eorvs r0, r1, r0, asr #3149; CHECK-ARMNODPS-NEXT: bx lr50;51; CHECK-ARMBASEDSP-LABEL: func:52; CHECK-ARMBASEDSP: @ %bb.0:53; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r154; CHECK-ARMBASEDSP-NEXT: bx lr55;56; CHECK-ARMDSP-LABEL: func:57; CHECK-ARMDSP: @ %bb.0:58; CHECK-ARMDSP-NEXT: qadd r0, r0, r159; CHECK-ARMDSP-NEXT: bx lr60 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y)61 ret i32 %tmp62}63 64define i64 @func2(i64 %x, i64 %y) nounwind {65; CHECK-T16-LABEL: func2:66; CHECK-T16: @ %bb.0:67; CHECK-T16-NEXT: .save {r4, lr}68; CHECK-T16-NEXT: push {r4, lr}69; CHECK-T16-NEXT: mov r4, r170; CHECK-T16-NEXT: eors r1, r371; CHECK-T16-NEXT: adds r2, r0, r272; CHECK-T16-NEXT: adcs r3, r473; CHECK-T16-NEXT: eors r4, r374; CHECK-T16-NEXT: bics r4, r175; CHECK-T16-NEXT: asrs r0, r3, #3176; CHECK-T16-NEXT: movs r1, #177; CHECK-T16-NEXT: lsls r1, r1, #3178; CHECK-T16-NEXT: eors r1, r079; CHECK-T16-NEXT: cmp r4, #080; CHECK-T16-NEXT: bpl .LBB1_381; CHECK-T16-NEXT: @ %bb.1:82; CHECK-T16-NEXT: bpl .LBB1_483; CHECK-T16-NEXT: .LBB1_2:84; CHECK-T16-NEXT: pop {r4, pc}85; CHECK-T16-NEXT: .LBB1_3:86; CHECK-T16-NEXT: mov r0, r287; CHECK-T16-NEXT: bmi .LBB1_288; CHECK-T16-NEXT: .LBB1_4:89; CHECK-T16-NEXT: mov r1, r390; CHECK-T16-NEXT: pop {r4, pc}91;92; CHECK-T2-LABEL: func2:93; CHECK-T2: @ %bb.0:94; CHECK-T2-NEXT: adds r0, r0, r295; CHECK-T2-NEXT: eor.w r12, r1, r396; CHECK-T2-NEXT: adc.w r2, r1, r397; CHECK-T2-NEXT: eors r1, r298; CHECK-T2-NEXT: bics.w r1, r1, r1299; CHECK-T2-NEXT: it mi100; CHECK-T2-NEXT: asrmi r0, r2, #31101; CHECK-T2-NEXT: mov.w r1, #-2147483648102; CHECK-T2-NEXT: it mi103; CHECK-T2-NEXT: eormi.w r2, r1, r2, asr #31104; CHECK-T2-NEXT: mov r1, r2105; CHECK-T2-NEXT: bx lr106;107; CHECK-ARM-LABEL: func2:108; CHECK-ARM: @ %bb.0:109; CHECK-ARM-NEXT: adds r0, r0, r2110; CHECK-ARM-NEXT: eor r12, r1, r3111; CHECK-ARM-NEXT: adc r2, r1, r3112; CHECK-ARM-NEXT: eor r1, r1, r2113; CHECK-ARM-NEXT: bics r1, r1, r12114; CHECK-ARM-NEXT: asrmi r0, r2, #31115; CHECK-ARM-NEXT: mov r1, #-2147483648116; CHECK-ARM-NEXT: eormi r2, r1, r2, asr #31117; CHECK-ARM-NEXT: mov r1, r2118; CHECK-ARM-NEXT: bx lr119;120; CHECK-T15TE-LABEL: func2:121; CHECK-T15TE: @ %bb.0:122; CHECK-T15TE-NEXT: .save {r4, lr}123; CHECK-T15TE-NEXT: push {r4, lr}124; CHECK-T15TE-NEXT: movs r4, r1125; CHECK-T15TE-NEXT: eors r1, r3126; CHECK-T15TE-NEXT: adds r2, r0, r2127; CHECK-T15TE-NEXT: adcs r3, r4128; CHECK-T15TE-NEXT: eors r4, r3129; CHECK-T15TE-NEXT: bics r4, r1130; CHECK-T15TE-NEXT: asrs r0, r3, #31131; CHECK-T15TE-NEXT: movs r1, #1132; CHECK-T15TE-NEXT: lsls r1, r1, #31133; CHECK-T15TE-NEXT: eors r1, r0134; CHECK-T15TE-NEXT: cmp r4, #0135; CHECK-T15TE-NEXT: bpl .LBB1_3136; CHECK-T15TE-NEXT: @ %bb.1:137; CHECK-T15TE-NEXT: bpl .LBB1_4138; CHECK-T15TE-NEXT: .LBB1_2:139; CHECK-T15TE-NEXT: pop {r4, pc}140; CHECK-T15TE-NEXT: .LBB1_3:141; CHECK-T15TE-NEXT: mov r12, r2142; CHECK-T15TE-NEXT: mov r0, r12143; CHECK-T15TE-NEXT: bmi .LBB1_2144; CHECK-T15TE-NEXT: .LBB1_4:145; CHECK-T15TE-NEXT: movs r1, r3146; CHECK-T15TE-NEXT: pop {r4, pc}147 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y)148 ret i64 %tmp149}150 151define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {152; CHECK-T1-LABEL: func16:153; CHECK-T1: @ %bb.0:154; CHECK-T1-NEXT: adds r0, r0, r1155; CHECK-T1-NEXT: ldr r1, .LCPI2_0156; CHECK-T1-NEXT: cmp r0, r1157; CHECK-T1-NEXT: blt .LBB2_2158; CHECK-T1-NEXT: @ %bb.1:159; CHECK-T1-NEXT: {{movs|mov}} r0, r1160; CHECK-T1-NEXT: .LBB2_2:161; CHECK-T1-NEXT: ldr r1, .LCPI2_1162; CHECK-T1-NEXT: cmp r0, r1163; CHECK-T1-NEXT: bgt .LBB2_4164; CHECK-T1-NEXT: @ %bb.3:165; CHECK-T1-NEXT: {{movs|mov}} r0, r1166; CHECK-T1-NEXT: .LBB2_4:167; CHECK-T1-NEXT: bx lr168; CHECK-T1-NEXT: .p2align 2169; CHECK-T1-NEXT: @ %bb.5:170; CHECK-T1-NEXT: .LCPI2_0:171; CHECK-T1-NEXT: .long 32767 @ 0x7fff172; CHECK-T1-NEXT: .LCPI2_1:173; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000174;175; CHECK-T2NODSP-LABEL: func16:176; CHECK-T2NODSP: @ %bb.0:177; CHECK-T2NODSP-NEXT: add r0, r1178; CHECK-T2NODSP-NEXT: ssat r0, #16, r0179; CHECK-T2NODSP-NEXT: bx lr180;181; CHECK-T2DSP-LABEL: func16:182; CHECK-T2DSP: @ %bb.0:183; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1184; CHECK-T2DSP-NEXT: sxth r0, r0185; CHECK-T2DSP-NEXT: bx lr186;187; CHECK-ARMNODPS-LABEL: func16:188; CHECK-ARMNODPS: @ %bb.0:189; CHECK-ARMNODPS-NEXT: add r0, r0, r1190; CHECK-ARMNODPS-NEXT: mov r1, #255191; CHECK-ARMNODPS-NEXT: orr r1, r1, #32512192; CHECK-ARMNODPS-NEXT: cmp r0, r1193; CHECK-ARMNODPS-NEXT: movlt r1, r0194; CHECK-ARMNODPS-NEXT: ldr r0, .LCPI2_0195; CHECK-ARMNODPS-NEXT: cmn r1, #32768196; CHECK-ARMNODPS-NEXT: movgt r0, r1197; CHECK-ARMNODPS-NEXT: bx lr198; CHECK-ARMNODPS-NEXT: .p2align 2199; CHECK-ARMNODPS-NEXT: @ %bb.1:200; CHECK-ARMNODPS-NEXT: .LCPI2_0:201; CHECK-ARMNODPS-NEXT: .long 4294934528 @ 0xffff8000202;203; CHECK-ARMBASEDSP-LABEL: func16:204; CHECK-ARMBASEDSP: @ %bb.0:205; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #16206; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #16207; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1208; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #16209; CHECK-ARMBASEDSP-NEXT: bx lr210;211; CHECK-ARMDSP-LABEL: func16:212; CHECK-ARMDSP: @ %bb.0:213; CHECK-ARMDSP-NEXT: qadd16 r0, r0, r1214; CHECK-ARMDSP-NEXT: sxth r0, r0215; CHECK-ARMDSP-NEXT: bx lr216 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)217 ret i16 %tmp218}219 220define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {221; CHECK-T1-LABEL: func8:222; CHECK-T1: @ %bb.0:223; CHECK-T1-NEXT: adds r0, r0, r1224; CHECK-T1-NEXT: movs r1, #127225; CHECK-T1-NEXT: cmp r0, #127226; CHECK-T1-NEXT: blt .LBB3_2227; CHECK-T1-NEXT: @ %bb.1:228; CHECK-T1-NEXT: {{movs|mov}} r0, r1229; CHECK-T1-NEXT: .LBB3_2:230; CHECK-T1-NEXT: mvns r1, r1231; CHECK-T1-NEXT: cmp r0, r1232; CHECK-T1-NEXT: bgt .LBB3_4233; CHECK-T1-NEXT: @ %bb.3:234; CHECK-T1-NEXT: {{movs|mov}} r0, r1235; CHECK-T1-NEXT: .LBB3_4:236; CHECK-T1-NEXT: bx lr237;238; CHECK-T2NODSP-LABEL: func8:239; CHECK-T2NODSP: @ %bb.0:240; CHECK-T2NODSP-NEXT: add r0, r1241; CHECK-T2NODSP-NEXT: ssat r0, #8, r0242; CHECK-T2NODSP-NEXT: bx lr243;244; CHECK-T2DSP-LABEL: func8:245; CHECK-T2DSP: @ %bb.0:246; CHECK-T2DSP-NEXT: qadd8 r0, r0, r1247; CHECK-T2DSP-NEXT: sxtb r0, r0248; CHECK-T2DSP-NEXT: bx lr249;250; CHECK-ARMNODPS-LABEL: func8:251; CHECK-ARMNODPS: @ %bb.0:252; CHECK-ARMNODPS-NEXT: add r0, r0, r1253; CHECK-ARMNODPS-NEXT: cmp r0, #127254; CHECK-ARMNODPS-NEXT: movge r0, #127255; CHECK-ARMNODPS-NEXT: cmn r0, #128256; CHECK-ARMNODPS-NEXT: mvnle r0, #127257; CHECK-ARMNODPS-NEXT: bx lr258;259; CHECK-ARMBASEDSP-LABEL: func8:260; CHECK-ARMBASEDSP: @ %bb.0:261; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #24262; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #24263; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1264; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #24265; CHECK-ARMBASEDSP-NEXT: bx lr266;267; CHECK-ARMDSP-LABEL: func8:268; CHECK-ARMDSP: @ %bb.0:269; CHECK-ARMDSP-NEXT: qadd8 r0, r0, r1270; CHECK-ARMDSP-NEXT: sxtb r0, r0271; CHECK-ARMDSP-NEXT: bx lr272 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y)273 ret i8 %tmp274}275 276define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {277; CHECK-T1-LABEL: func3:278; CHECK-T1: @ %bb.0:279; CHECK-T1-NEXT: adds r0, r0, r1280; CHECK-T1-NEXT: movs r1, #7281; CHECK-T1-NEXT: cmp r0, #7282; CHECK-T1-NEXT: blt .LBB4_2283; CHECK-T1-NEXT: @ %bb.1:284; CHECK-T1-NEXT: {{movs|mov}} r0, r1285; CHECK-T1-NEXT: .LBB4_2:286; CHECK-T1-NEXT: mvns r1, r1287; CHECK-T1-NEXT: cmp r0, r1288; CHECK-T1-NEXT: bgt .LBB4_4289; CHECK-T1-NEXT: @ %bb.3:290; CHECK-T1-NEXT: {{movs|mov}} r0, r1291; CHECK-T1-NEXT: .LBB4_4:292; CHECK-T1-NEXT: bx lr293;294; CHECK-T2NODSP-LABEL: func3:295; CHECK-T2NODSP: @ %bb.0:296; CHECK-T2NODSP-NEXT: add r0, r1297; CHECK-T2NODSP-NEXT: ssat r0, #4, r0298; CHECK-T2NODSP-NEXT: bx lr299;300; CHECK-T2DSP-LABEL: func3:301; CHECK-T2DSP: @ %bb.0:302; CHECK-T2DSP-NEXT: lsls r1, r1, #28303; CHECK-T2DSP-NEXT: lsls r0, r0, #28304; CHECK-T2DSP-NEXT: qadd r0, r0, r1305; CHECK-T2DSP-NEXT: asrs r0, r0, #28306; CHECK-T2DSP-NEXT: bx lr307;308; CHECK-ARMNODPS-LABEL: func3:309; CHECK-ARMNODPS: @ %bb.0:310; CHECK-ARMNODPS-NEXT: add r0, r0, r1311; CHECK-ARMNODPS-NEXT: cmp r0, #7312; CHECK-ARMNODPS-NEXT: movge r0, #7313; CHECK-ARMNODPS-NEXT: cmn r0, #8314; CHECK-ARMNODPS-NEXT: mvnle r0, #7315; CHECK-ARMNODPS-NEXT: bx lr316;317; CHECK-ARMBASEDSP-LABEL: func3:318; CHECK-ARMBASEDSP: @ %bb.0:319; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #28320; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #28321; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1322; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #28323; CHECK-ARMBASEDSP-NEXT: bx lr324;325; CHECK-ARMDSP-LABEL: func3:326; CHECK-ARMDSP: @ %bb.0:327; CHECK-ARMDSP-NEXT: lsl r0, r0, #28328; CHECK-ARMDSP-NEXT: lsl r1, r1, #28329; CHECK-ARMDSP-NEXT: qadd r0, r0, r1330; CHECK-ARMDSP-NEXT: asr r0, r0, #28331; CHECK-ARMDSP-NEXT: bx lr332 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y)333 ret i4 %tmp334}335