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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s3; RUN: llc -mtriple=armv6m-eabi %s -o - | FileCheck %s --check-prefix=EXPAND4 5define i64 @test_shl(i64 %val, i64 %amt) {6; CHECK-LABEL: test_shl:7; CHECK: @ %bb.0:8; CHECK-NEXT: rsb r3, r2, #329; CHECK-NEXT: lsr r3, r0, r310; CHECK-NEXT: orr r1, r3, r1, lsl r211; CHECK-NEXT: subs r3, r2, #3212; CHECK-NEXT: lslpl r1, r0, r313; CHECK-NEXT: lsl r0, r0, r214; CHECK-NEXT: movpl r0, #015; CHECK-NEXT: mov pc, lr16;17; EXPAND-LABEL: test_shl:18; EXPAND: @ %bb.0:19; EXPAND-NEXT: .save {r7, lr}20; EXPAND-NEXT: push {r7, lr}21; EXPAND-NEXT: bl __aeabi_llsl22; EXPAND-NEXT: pop {r7, pc}23 %res = shl i64 %val, %amt24 ret i64 %res25}26 27; Explanation for lshr is pretty much the reverse of shl.28define i64 @test_lshr(i64 %val, i64 %amt) {29; CHECK-LABEL: test_lshr:30; CHECK: @ %bb.0:31; CHECK-NEXT: rsb r3, r2, #3232; CHECK-NEXT: lsr r0, r0, r233; CHECK-NEXT: orr r0, r0, r1, lsl r334; CHECK-NEXT: subs r3, r2, #3235; CHECK-NEXT: lsrpl r0, r1, r336; CHECK-NEXT: lsr r1, r1, r237; CHECK-NEXT: movpl r1, #038; CHECK-NEXT: mov pc, lr39;40; EXPAND-LABEL: test_lshr:41; EXPAND: @ %bb.0:42; EXPAND-NEXT: .save {r7, lr}43; EXPAND-NEXT: push {r7, lr}44; EXPAND-NEXT: bl __aeabi_llsr45; EXPAND-NEXT: pop {r7, pc}46 %res = lshr i64 %val, %amt47 ret i64 %res48}49 50; One minor difference for ashr: the high bits must be "hi >> 31" if the shift51; amount is large to get the right sign bit.52define i64 @test_ashr(i64 %val, i64 %amt) {53; CHECK-LABEL: test_ashr:54; CHECK: @ %bb.0:55; CHECK-NEXT: rsb r3, r2, #3256; CHECK-NEXT: lsr r0, r0, r257; CHECK-NEXT: orr r0, r0, r1, lsl r358; CHECK-NEXT: subs r3, r2, #3259; CHECK-NEXT: asr r2, r1, r260; CHECK-NEXT: asrpl r2, r1, #3161; CHECK-NEXT: asrpl r0, r1, r362; CHECK-NEXT: mov r1, r263; CHECK-NEXT: mov pc, lr64;65; EXPAND-LABEL: test_ashr:66; EXPAND: @ %bb.0:67; EXPAND-NEXT: .save {r7, lr}68; EXPAND-NEXT: push {r7, lr}69; EXPAND-NEXT: bl __aeabi_lasr70; EXPAND-NEXT: pop {r7, pc}71 %res = ashr i64 %val, %amt72 ret i64 %res73}74