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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -O1 -mtriple arm -o - %s | FileCheck --check-prefix CHECK-LE %s3; RUN: llc -O1 -mtriple armv7 -o - %s | FileCheck --check-prefix CHECK-V7-LE %s4; RUN: llc -O1 -mtriple armeb -o - %s | FileCheck --check-prefix CHECK-BE %s5; RUN: llc -O1 -mtriple armv7eb -o - %s | FileCheck --check-prefix CHECK-V7-BE %s6 7; A collection of regression tests to verify the load-narrowing part of8; TargetLowering::SimplifySetCC (and/or other similar rewrites such as9; combining AND+LOAD into ZEXTLOAD).10;11; Using both arm and armv7 to show that alignment restrictions are12; considered for the narrowed load (armv7 is a bit more relaxed when it13; comes to unaligned memory accesses).14 15;--------------------------------------------------------------------------16; Test non byte-sized types.17;18; As long as LLVM IR isn't defining where the padding goes we can't really19; optimize these (without adding a target lowering hook that can inform20; ISel about which bits are padding).21; --------------------------------------------------------------------------22 23define i1 @test_129_15_0(ptr %y) {24; CHECK-LE-LABEL: test_129_15_0:25; CHECK-LE: @ %bb.0:26; CHECK-LE-NEXT: ldrh r0, [r0]27; CHECK-LE-NEXT: mov r1, #25528; CHECK-LE-NEXT: orr r1, r1, #3251229; CHECK-LE-NEXT: ands r0, r0, r130; CHECK-LE-NEXT: movne r0, #131; CHECK-LE-NEXT: mov pc, lr32;33; CHECK-V7-LE-LABEL: test_129_15_0:34; CHECK-V7-LE: @ %bb.0:35; CHECK-V7-LE-NEXT: ldrh r0, [r0]36; CHECK-V7-LE-NEXT: bfc r0, #15, #1737; CHECK-V7-LE-NEXT: cmp r0, #038; CHECK-V7-LE-NEXT: movwne r0, #139; CHECK-V7-LE-NEXT: bx lr40;41; CHECK-BE-LABEL: test_129_15_0:42; CHECK-BE: @ %bb.0:43; CHECK-BE-NEXT: ldr r1, [r0, #12]44; CHECK-BE-NEXT: ldrb r0, [r0, #16]45; CHECK-BE-NEXT: orr r0, r0, r1, lsl #846; CHECK-BE-NEXT: mov r1, #25547; CHECK-BE-NEXT: orr r1, r1, #3251248; CHECK-BE-NEXT: ands r0, r0, r149; CHECK-BE-NEXT: movne r0, #150; CHECK-BE-NEXT: mov pc, lr51;52; CHECK-V7-BE-LABEL: test_129_15_0:53; CHECK-V7-BE: @ %bb.0:54; CHECK-V7-BE-NEXT: ldrh r0, [r0, #15]55; CHECK-V7-BE-NEXT: bfc r0, #15, #1756; CHECK-V7-BE-NEXT: cmp r0, #057; CHECK-V7-BE-NEXT: movwne r0, #158; CHECK-V7-BE-NEXT: bx lr59 %a = load i129, ptr %y60 %b = and i129 %a, u0x7fff61 %cmp = icmp ne i129 %b, 062 ret i1 %cmp63}64 65define i1 @test_126_20_4(ptr %y) {66; CHECK-LE-LABEL: test_126_20_4:67; CHECK-LE: @ %bb.0:68; CHECK-LE-NEXT: ldr r0, [r0]69; CHECK-LE-NEXT: mvn r1, #1570; CHECK-LE-NEXT: sub r1, r1, #-1677721671; CHECK-LE-NEXT: ands r0, r0, r172; CHECK-LE-NEXT: movne r0, #173; CHECK-LE-NEXT: mov pc, lr74;75; CHECK-V7-LE-LABEL: test_126_20_4:76; CHECK-V7-LE: @ %bb.0:77; CHECK-V7-LE-NEXT: ldr r0, [r0]78; CHECK-V7-LE-NEXT: movw r1, #6552079; CHECK-V7-LE-NEXT: movt r1, #25580; CHECK-V7-LE-NEXT: ands r0, r0, r181; CHECK-V7-LE-NEXT: movwne r0, #182; CHECK-V7-LE-NEXT: bx lr83;84; CHECK-BE-LABEL: test_126_20_4:85; CHECK-BE: @ %bb.0:86; CHECK-BE-NEXT: ldr r0, [r0, #12]87; CHECK-BE-NEXT: mvn r1, #1588; CHECK-BE-NEXT: sub r1, r1, #-1677721689; CHECK-BE-NEXT: ands r0, r0, r190; CHECK-BE-NEXT: movne r0, #191; CHECK-BE-NEXT: mov pc, lr92;93; CHECK-V7-BE-LABEL: test_126_20_4:94; CHECK-V7-BE: @ %bb.0:95; CHECK-V7-BE-NEXT: ldr r0, [r0, #12]96; CHECK-V7-BE-NEXT: movw r1, #6552097; CHECK-V7-BE-NEXT: movt r1, #25598; CHECK-V7-BE-NEXT: ands r0, r0, r199; CHECK-V7-BE-NEXT: movwne r0, #1100; CHECK-V7-BE-NEXT: bx lr101 %a = load i126, ptr %y102 %b = and i126 %a, u0xfffff0103 %cmp = icmp ne i126 %b, 0104 ret i1 %cmp105}106 107define i1 @test_33_8_0(ptr %y) {108; CHECK-LE-LABEL: test_33_8_0:109; CHECK-LE: @ %bb.0:110; CHECK-LE-NEXT: ldrb r0, [r0]111; CHECK-LE-NEXT: cmp r0, #0112; CHECK-LE-NEXT: movne r0, #1113; CHECK-LE-NEXT: mov pc, lr114;115; CHECK-V7-LE-LABEL: test_33_8_0:116; CHECK-V7-LE: @ %bb.0:117; CHECK-V7-LE-NEXT: ldrb r0, [r0]118; CHECK-V7-LE-NEXT: cmp r0, #0119; CHECK-V7-LE-NEXT: movwne r0, #1120; CHECK-V7-LE-NEXT: bx lr121;122; CHECK-BE-LABEL: test_33_8_0:123; CHECK-BE: @ %bb.0:124; CHECK-BE-NEXT: ldrb r0, [r0, #4]125; CHECK-BE-NEXT: cmp r0, #0126; CHECK-BE-NEXT: movne r0, #1127; CHECK-BE-NEXT: mov pc, lr128;129; CHECK-V7-BE-LABEL: test_33_8_0:130; CHECK-V7-BE: @ %bb.0:131; CHECK-V7-BE-NEXT: ldrb r0, [r0, #4]132; CHECK-V7-BE-NEXT: cmp r0, #0133; CHECK-V7-BE-NEXT: movwne r0, #1134; CHECK-V7-BE-NEXT: bx lr135 %a = load i33, ptr %y136 %b = and i33 %a, u0xff137 %cmp = icmp ne i33 %b, 0138 ret i1 %cmp139}140 141define i1 @test_33_1_32(ptr %y) {142; CHECK-LE-LABEL: test_33_1_32:143; CHECK-LE: @ %bb.0:144; CHECK-LE-NEXT: ldrb r0, [r0, #4]145; CHECK-LE-NEXT: mov pc, lr146;147; CHECK-V7-LE-LABEL: test_33_1_32:148; CHECK-V7-LE: @ %bb.0:149; CHECK-V7-LE-NEXT: ldrb r0, [r0, #4]150; CHECK-V7-LE-NEXT: bx lr151;152; CHECK-BE-LABEL: test_33_1_32:153; CHECK-BE: @ %bb.0:154; CHECK-BE-NEXT: ldr r0, [r0]155; CHECK-BE-NEXT: lsr r0, r0, #24156; CHECK-BE-NEXT: mov pc, lr157;158; CHECK-V7-BE-LABEL: test_33_1_32:159; CHECK-V7-BE: @ %bb.0:160; CHECK-V7-BE-NEXT: ldr r0, [r0]161; CHECK-V7-BE-NEXT: lsr r0, r0, #24162; CHECK-V7-BE-NEXT: bx lr163 %a = load i33, ptr %y164 %b = and i33 %a, u0x100000000165 %cmp = icmp ne i33 %b, 0166 ret i1 %cmp167}168 169define i1 @test_33_1_31(ptr %y) {170; CHECK-LE-LABEL: test_33_1_31:171; CHECK-LE: @ %bb.0:172; CHECK-LE-NEXT: ldrb r0, [r0, #3]173; CHECK-LE-NEXT: lsr r0, r0, #7174; CHECK-LE-NEXT: mov pc, lr175;176; CHECK-V7-LE-LABEL: test_33_1_31:177; CHECK-V7-LE: @ %bb.0:178; CHECK-V7-LE-NEXT: ldrb r0, [r0, #3]179; CHECK-V7-LE-NEXT: lsr r0, r0, #7180; CHECK-V7-LE-NEXT: bx lr181;182; CHECK-BE-LABEL: test_33_1_31:183; CHECK-BE: @ %bb.0:184; CHECK-BE-NEXT: ldrb r0, [r0, #1]185; CHECK-BE-NEXT: lsr r0, r0, #7186; CHECK-BE-NEXT: mov pc, lr187;188; CHECK-V7-BE-LABEL: test_33_1_31:189; CHECK-V7-BE: @ %bb.0:190; CHECK-V7-BE-NEXT: ldrb r0, [r0, #1]191; CHECK-V7-BE-NEXT: lsr r0, r0, #7192; CHECK-V7-BE-NEXT: bx lr193 %a = load i33, ptr %y194 %b = and i33 %a, u0x80000000195 %cmp = icmp ne i33 %b, 0196 ret i1 %cmp197}198 199define i1 @test_33_1_0(ptr %y) {200; CHECK-LE-LABEL: test_33_1_0:201; CHECK-LE: @ %bb.0:202; CHECK-LE-NEXT: ldrb r0, [r0]203; CHECK-LE-NEXT: and r0, r0, #1204; CHECK-LE-NEXT: mov pc, lr205;206; CHECK-V7-LE-LABEL: test_33_1_0:207; CHECK-V7-LE: @ %bb.0:208; CHECK-V7-LE-NEXT: ldrb r0, [r0]209; CHECK-V7-LE-NEXT: and r0, r0, #1210; CHECK-V7-LE-NEXT: bx lr211;212; CHECK-BE-LABEL: test_33_1_0:213; CHECK-BE: @ %bb.0:214; CHECK-BE-NEXT: ldrb r0, [r0, #4]215; CHECK-BE-NEXT: and r0, r0, #1216; CHECK-BE-NEXT: mov pc, lr217;218; CHECK-V7-BE-LABEL: test_33_1_0:219; CHECK-V7-BE: @ %bb.0:220; CHECK-V7-BE-NEXT: ldrb r0, [r0, #4]221; CHECK-V7-BE-NEXT: and r0, r0, #1222; CHECK-V7-BE-NEXT: bx lr223 %a = load i33, ptr %y224 %b = and i33 %a, u0x1225 %cmp = icmp ne i33 %b, 0226 ret i1 %cmp227}228 229;--------------------------------------------------------------------------230; Test byte-sized types.231;--------------------------------------------------------------------------232 233 234define i1 @test_128_20_4(ptr %y) {235; CHECK-LE-LABEL: test_128_20_4:236; CHECK-LE: @ %bb.0:237; CHECK-LE-NEXT: ldr r0, [r0]238; CHECK-LE-NEXT: mvn r1, #15239; CHECK-LE-NEXT: sub r1, r1, #-16777216240; CHECK-LE-NEXT: ands r0, r0, r1241; CHECK-LE-NEXT: movne r0, #1242; CHECK-LE-NEXT: mov pc, lr243;244; CHECK-V7-LE-LABEL: test_128_20_4:245; CHECK-V7-LE: @ %bb.0:246; CHECK-V7-LE-NEXT: ldr r0, [r0]247; CHECK-V7-LE-NEXT: movw r1, #65520248; CHECK-V7-LE-NEXT: movt r1, #255249; CHECK-V7-LE-NEXT: ands r0, r0, r1250; CHECK-V7-LE-NEXT: movwne r0, #1251; CHECK-V7-LE-NEXT: bx lr252;253; CHECK-BE-LABEL: test_128_20_4:254; CHECK-BE: @ %bb.0:255; CHECK-BE-NEXT: ldr r0, [r0, #12]256; CHECK-BE-NEXT: mvn r1, #15257; CHECK-BE-NEXT: sub r1, r1, #-16777216258; CHECK-BE-NEXT: ands r0, r0, r1259; CHECK-BE-NEXT: movne r0, #1260; CHECK-BE-NEXT: mov pc, lr261;262; CHECK-V7-BE-LABEL: test_128_20_4:263; CHECK-V7-BE: @ %bb.0:264; CHECK-V7-BE-NEXT: ldr r0, [r0, #12]265; CHECK-V7-BE-NEXT: movw r1, #65520266; CHECK-V7-BE-NEXT: movt r1, #255267; CHECK-V7-BE-NEXT: ands r0, r0, r1268; CHECK-V7-BE-NEXT: movwne r0, #1269; CHECK-V7-BE-NEXT: bx lr270 %a = load i128, ptr %y271 %b = and i128 %a, u0xfffff0272 %cmp = icmp ne i128 %b, 0273 ret i1 %cmp274}275 276define i1 @test_48_16_0(ptr %y) {277; CHECK-LE-LABEL: test_48_16_0:278; CHECK-LE: @ %bb.0:279; CHECK-LE-NEXT: ldrh r0, [r0]280; CHECK-LE-NEXT: cmp r0, #0281; CHECK-LE-NEXT: movne r0, #1282; CHECK-LE-NEXT: mov pc, lr283;284; CHECK-V7-LE-LABEL: test_48_16_0:285; CHECK-V7-LE: @ %bb.0:286; CHECK-V7-LE-NEXT: ldrh r0, [r0]287; CHECK-V7-LE-NEXT: cmp r0, #0288; CHECK-V7-LE-NEXT: movwne r0, #1289; CHECK-V7-LE-NEXT: bx lr290;291; CHECK-BE-LABEL: test_48_16_0:292; CHECK-BE: @ %bb.0:293; CHECK-BE-NEXT: ldrh r0, [r0, #4]294; CHECK-BE-NEXT: cmp r0, #0295; CHECK-BE-NEXT: movne r0, #1296; CHECK-BE-NEXT: mov pc, lr297;298; CHECK-V7-BE-LABEL: test_48_16_0:299; CHECK-V7-BE: @ %bb.0:300; CHECK-V7-BE-NEXT: ldrh r0, [r0, #4]301; CHECK-V7-BE-NEXT: cmp r0, #0302; CHECK-V7-BE-NEXT: movwne r0, #1303; CHECK-V7-BE-NEXT: bx lr304 %a = load i48, ptr %y305 %b = and i48 %a, u0xffff306 %cmp = icmp ne i48 %b, 0307 ret i1 %cmp308}309 310define i1 @test_48_16_8(ptr %y) {311; CHECK-LE-LABEL: test_48_16_8:312; CHECK-LE: @ %bb.0:313; CHECK-LE-NEXT: ldrh r0, [r0, #1]314; CHECK-LE-NEXT: lsls r0, r0, #8315; CHECK-LE-NEXT: movne r0, #1316; CHECK-LE-NEXT: mov pc, lr317;318; CHECK-V7-LE-LABEL: test_48_16_8:319; CHECK-V7-LE: @ %bb.0:320; CHECK-V7-LE-NEXT: ldrh r0, [r0, #1]321; CHECK-V7-LE-NEXT: cmp r0, #0322; CHECK-V7-LE-NEXT: movwne r0, #1323; CHECK-V7-LE-NEXT: bx lr324;325; CHECK-BE-LABEL: test_48_16_8:326; CHECK-BE: @ %bb.0:327; CHECK-BE-NEXT: ldrh r0, [r0, #3]328; CHECK-BE-NEXT: cmp r0, #0329; CHECK-BE-NEXT: movne r0, #1330; CHECK-BE-NEXT: mov pc, lr331;332; CHECK-V7-BE-LABEL: test_48_16_8:333; CHECK-V7-BE: @ %bb.0:334; CHECK-V7-BE-NEXT: ldrh r0, [r0, #3]335; CHECK-V7-BE-NEXT: cmp r0, #0336; CHECK-V7-BE-NEXT: movwne r0, #1337; CHECK-V7-BE-NEXT: bx lr338 %a = load i48, ptr %y339 %b = and i48 %a, u0xffff00340 %cmp = icmp ne i48 %b, 0341 ret i1 %cmp342}343 344define i1 @test_48_16_16(ptr %y) {345; CHECK-LE-LABEL: test_48_16_16:346; CHECK-LE: @ %bb.0:347; CHECK-LE-NEXT: ldrh r0, [r0, #2]348; CHECK-LE-NEXT: cmp r0, #0349; CHECK-LE-NEXT: movne r0, #1350; CHECK-LE-NEXT: mov pc, lr351;352; CHECK-V7-LE-LABEL: test_48_16_16:353; CHECK-V7-LE: @ %bb.0:354; CHECK-V7-LE-NEXT: ldrh r0, [r0, #2]355; CHECK-V7-LE-NEXT: cmp r0, #0356; CHECK-V7-LE-NEXT: movwne r0, #1357; CHECK-V7-LE-NEXT: bx lr358;359; CHECK-BE-LABEL: test_48_16_16:360; CHECK-BE: @ %bb.0:361; CHECK-BE-NEXT: ldrh r0, [r0, #2]362; CHECK-BE-NEXT: cmp r0, #0363; CHECK-BE-NEXT: movne r0, #1364; CHECK-BE-NEXT: mov pc, lr365;366; CHECK-V7-BE-LABEL: test_48_16_16:367; CHECK-V7-BE: @ %bb.0:368; CHECK-V7-BE-NEXT: ldrh r0, [r0, #2]369; CHECK-V7-BE-NEXT: cmp r0, #0370; CHECK-V7-BE-NEXT: movwne r0, #1371; CHECK-V7-BE-NEXT: bx lr372 %a = load i48, ptr %y373 %b = and i48 %a, u0xffff0000374 %cmp = icmp ne i48 %b, 0375 ret i1 %cmp376}377 378define i1 @test_48_16_32(ptr %y) {379; CHECK-LE-LABEL: test_48_16_32:380; CHECK-LE: @ %bb.0:381; CHECK-LE-NEXT: ldrh r0, [r0, #4]382; CHECK-LE-NEXT: cmp r0, #0383; CHECK-LE-NEXT: movne r0, #1384; CHECK-LE-NEXT: mov pc, lr385;386; CHECK-V7-LE-LABEL: test_48_16_32:387; CHECK-V7-LE: @ %bb.0:388; CHECK-V7-LE-NEXT: ldrh r0, [r0, #4]389; CHECK-V7-LE-NEXT: cmp r0, #0390; CHECK-V7-LE-NEXT: movwne r0, #1391; CHECK-V7-LE-NEXT: bx lr392;393; CHECK-BE-LABEL: test_48_16_32:394; CHECK-BE: @ %bb.0:395; CHECK-BE-NEXT: ldrh r0, [r0]396; CHECK-BE-NEXT: cmp r0, #0397; CHECK-BE-NEXT: movne r0, #1398; CHECK-BE-NEXT: mov pc, lr399;400; CHECK-V7-BE-LABEL: test_48_16_32:401; CHECK-V7-BE: @ %bb.0:402; CHECK-V7-BE-NEXT: ldrh r0, [r0]403; CHECK-V7-BE-NEXT: cmp r0, #0404; CHECK-V7-BE-NEXT: movwne r0, #1405; CHECK-V7-BE-NEXT: bx lr406 %a = load i48, ptr %y407 %b = and i48 %a, u0xffff00000000408 %cmp = icmp ne i48 %b, 0409 ret i1 %cmp410}411 412define i1 @test_48_17_0(ptr %y) {413; CHECK-LE-LABEL: test_48_17_0:414; CHECK-LE: @ %bb.0:415; CHECK-LE-NEXT: ldr r0, [r0]416; CHECK-LE-NEXT: ldr r1, .LCPI11_0417; CHECK-LE-NEXT: ands r0, r0, r1418; CHECK-LE-NEXT: movne r0, #1419; CHECK-LE-NEXT: mov pc, lr420; CHECK-LE-NEXT: .p2align 2421; CHECK-LE-NEXT: @ %bb.1:422; CHECK-LE-NEXT: .LCPI11_0:423; CHECK-LE-NEXT: .long 131071 @ 0x1ffff424;425; CHECK-V7-LE-LABEL: test_48_17_0:426; CHECK-V7-LE: @ %bb.0:427; CHECK-V7-LE-NEXT: ldr r0, [r0]428; CHECK-V7-LE-NEXT: bfc r0, #17, #15429; CHECK-V7-LE-NEXT: cmp r0, #0430; CHECK-V7-LE-NEXT: movwne r0, #1431; CHECK-V7-LE-NEXT: bx lr432;433; CHECK-BE-LABEL: test_48_17_0:434; CHECK-BE: @ %bb.0:435; CHECK-BE-NEXT: ldr r1, [r0]436; CHECK-BE-NEXT: ldrh r0, [r0, #4]437; CHECK-BE-NEXT: orr r0, r0, r1, lsl #16438; CHECK-BE-NEXT: ldr r1, .LCPI11_0439; CHECK-BE-NEXT: ands r0, r0, r1440; CHECK-BE-NEXT: movne r0, #1441; CHECK-BE-NEXT: mov pc, lr442; CHECK-BE-NEXT: .p2align 2443; CHECK-BE-NEXT: @ %bb.1:444; CHECK-BE-NEXT: .LCPI11_0:445; CHECK-BE-NEXT: .long 131071 @ 0x1ffff446;447; CHECK-V7-BE-LABEL: test_48_17_0:448; CHECK-V7-BE: @ %bb.0:449; CHECK-V7-BE-NEXT: ldr r0, [r0, #2]450; CHECK-V7-BE-NEXT: bfc r0, #17, #15451; CHECK-V7-BE-NEXT: cmp r0, #0452; CHECK-V7-BE-NEXT: movwne r0, #1453; CHECK-V7-BE-NEXT: bx lr454 %a = load i48, ptr %y455 %b = and i48 %a, u0x1ffff456 %cmp = icmp ne i48 %b, 0457 ret i1 %cmp458}459 460define i1 @test_40_16_0(ptr %y) {461; CHECK-LE-LABEL: test_40_16_0:462; CHECK-LE: @ %bb.0:463; CHECK-LE-NEXT: ldrh r0, [r0]464; CHECK-LE-NEXT: cmp r0, #0465; CHECK-LE-NEXT: movne r0, #1466; CHECK-LE-NEXT: mov pc, lr467;468; CHECK-V7-LE-LABEL: test_40_16_0:469; CHECK-V7-LE: @ %bb.0:470; CHECK-V7-LE-NEXT: ldrh r0, [r0]471; CHECK-V7-LE-NEXT: cmp r0, #0472; CHECK-V7-LE-NEXT: movwne r0, #1473; CHECK-V7-LE-NEXT: bx lr474;475; CHECK-BE-LABEL: test_40_16_0:476; CHECK-BE: @ %bb.0:477; CHECK-BE-NEXT: ldrh r0, [r0, #3]478; CHECK-BE-NEXT: cmp r0, #0479; CHECK-BE-NEXT: movne r0, #1480; CHECK-BE-NEXT: mov pc, lr481;482; CHECK-V7-BE-LABEL: test_40_16_0:483; CHECK-V7-BE: @ %bb.0:484; CHECK-V7-BE-NEXT: ldrh r0, [r0, #3]485; CHECK-V7-BE-NEXT: cmp r0, #0486; CHECK-V7-BE-NEXT: movwne r0, #1487; CHECK-V7-BE-NEXT: bx lr488 %a = load i40, ptr %y489 %b = and i40 %a, u0xffff490 %cmp = icmp ne i40 %b, 0491 ret i1 %cmp492}493 494define i1 @test_40_1_32(ptr %y) {495; CHECK-LE-LABEL: test_40_1_32:496; CHECK-LE: @ %bb.0:497; CHECK-LE-NEXT: ldrb r0, [r0, #4]498; CHECK-LE-NEXT: and r0, r0, #1499; CHECK-LE-NEXT: mov pc, lr500;501; CHECK-V7-LE-LABEL: test_40_1_32:502; CHECK-V7-LE: @ %bb.0:503; CHECK-V7-LE-NEXT: ldrb r0, [r0, #4]504; CHECK-V7-LE-NEXT: and r0, r0, #1505; CHECK-V7-LE-NEXT: bx lr506;507; CHECK-BE-LABEL: test_40_1_32:508; CHECK-BE: @ %bb.0:509; CHECK-BE-NEXT: ldrb r0, [r0]510; CHECK-BE-NEXT: and r0, r0, #1511; CHECK-BE-NEXT: mov pc, lr512;513; CHECK-V7-BE-LABEL: test_40_1_32:514; CHECK-V7-BE: @ %bb.0:515; CHECK-V7-BE-NEXT: ldrb r0, [r0]516; CHECK-V7-BE-NEXT: and r0, r0, #1517; CHECK-V7-BE-NEXT: bx lr518 %a = load i40, ptr %y519 %b = and i40 %a, u0x100000000520 %cmp = icmp ne i40 %b, 0521 ret i1 %cmp522}523 524define i1 @test_24_16_0(ptr %y) {525; CHECK-LE-LABEL: test_24_16_0:526; CHECK-LE: @ %bb.0:527; CHECK-LE-NEXT: ldrh r0, [r0]528; CHECK-LE-NEXT: cmp r0, #0529; CHECK-LE-NEXT: movne r0, #1530; CHECK-LE-NEXT: mov pc, lr531;532; CHECK-V7-LE-LABEL: test_24_16_0:533; CHECK-V7-LE: @ %bb.0:534; CHECK-V7-LE-NEXT: ldrh r0, [r0]535; CHECK-V7-LE-NEXT: cmp r0, #0536; CHECK-V7-LE-NEXT: movwne r0, #1537; CHECK-V7-LE-NEXT: bx lr538;539; CHECK-BE-LABEL: test_24_16_0:540; CHECK-BE: @ %bb.0:541; CHECK-BE-NEXT: ldrh r0, [r0, #1]542; CHECK-BE-NEXT: cmp r0, #0543; CHECK-BE-NEXT: movne r0, #1544; CHECK-BE-NEXT: mov pc, lr545;546; CHECK-V7-BE-LABEL: test_24_16_0:547; CHECK-V7-BE: @ %bb.0:548; CHECK-V7-BE-NEXT: ldrh r0, [r0, #1]549; CHECK-V7-BE-NEXT: cmp r0, #0550; CHECK-V7-BE-NEXT: movwne r0, #1551; CHECK-V7-BE-NEXT: bx lr552 %a = load i24, ptr %y553 %b = and i24 %a, u0xffff554 %cmp = icmp ne i24 %b, 0555 ret i1 %cmp556}557 558define i1 @test_24_8_8(ptr %y) {559; CHECK-LE-LABEL: test_24_8_8:560; CHECK-LE: @ %bb.0:561; CHECK-LE-NEXT: ldrb r0, [r0, #1]562; CHECK-LE-NEXT: lsls r0, r0, #8563; CHECK-LE-NEXT: movne r0, #1564; CHECK-LE-NEXT: mov pc, lr565;566; CHECK-V7-LE-LABEL: test_24_8_8:567; CHECK-V7-LE: @ %bb.0:568; CHECK-V7-LE-NEXT: ldrb r0, [r0, #1]569; CHECK-V7-LE-NEXT: lsls r0, r0, #8570; CHECK-V7-LE-NEXT: movwne r0, #1571; CHECK-V7-LE-NEXT: bx lr572;573; CHECK-BE-LABEL: test_24_8_8:574; CHECK-BE: @ %bb.0:575; CHECK-BE-NEXT: ldrb r0, [r0, #1]576; CHECK-BE-NEXT: lsls r0, r0, #8577; CHECK-BE-NEXT: movne r0, #1578; CHECK-BE-NEXT: mov pc, lr579;580; CHECK-V7-BE-LABEL: test_24_8_8:581; CHECK-V7-BE: @ %bb.0:582; CHECK-V7-BE-NEXT: ldrb r0, [r0, #1]583; CHECK-V7-BE-NEXT: lsls r0, r0, #8584; CHECK-V7-BE-NEXT: movwne r0, #1585; CHECK-V7-BE-NEXT: bx lr586 %a = load i24, ptr %y587 %b = and i24 %a, u0xff00588 %cmp = icmp ne i24 %b, 0589 ret i1 %cmp590}591 592define i1 @test_24_8_12(ptr %y) {593; CHECK-LE-LABEL: test_24_8_12:594; CHECK-LE: @ %bb.0:595; CHECK-LE-NEXT: ldrb r1, [r0, #2]596; CHECK-LE-NEXT: ldrh r0, [r0]597; CHECK-LE-NEXT: orr r0, r0, r1, lsl #16598; CHECK-LE-NEXT: ands r0, r0, #1044480599; CHECK-LE-NEXT: movne r0, #1600; CHECK-LE-NEXT: mov pc, lr601;602; CHECK-V7-LE-LABEL: test_24_8_12:603; CHECK-V7-LE: @ %bb.0:604; CHECK-V7-LE-NEXT: ldrb r1, [r0, #2]605; CHECK-V7-LE-NEXT: ldrh r0, [r0]606; CHECK-V7-LE-NEXT: orr r0, r0, r1, lsl #16607; CHECK-V7-LE-NEXT: ands r0, r0, #1044480608; CHECK-V7-LE-NEXT: movwne r0, #1609; CHECK-V7-LE-NEXT: bx lr610;611; CHECK-BE-LABEL: test_24_8_12:612; CHECK-BE: @ %bb.0:613; CHECK-BE-NEXT: ldrh r0, [r0]614; CHECK-BE-NEXT: mov r1, #1044480615; CHECK-BE-NEXT: ands r0, r1, r0, lsl #8616; CHECK-BE-NEXT: movne r0, #1617; CHECK-BE-NEXT: mov pc, lr618;619; CHECK-V7-BE-LABEL: test_24_8_12:620; CHECK-V7-BE: @ %bb.0:621; CHECK-V7-BE-NEXT: ldrh r0, [r0]622; CHECK-V7-BE-NEXT: mov r1, #1044480623; CHECK-V7-BE-NEXT: ands r0, r1, r0, lsl #8624; CHECK-V7-BE-NEXT: movwne r0, #1625; CHECK-V7-BE-NEXT: bx lr626 %a = load i24, ptr %y627 %b = and i24 %a, u0xff000628 %cmp = icmp ne i24 %b, 0629 ret i1 %cmp630}631 632define i1 @test_24_8_16(ptr %y) {633; CHECK-LE-LABEL: test_24_8_16:634; CHECK-LE: @ %bb.0:635; CHECK-LE-NEXT: ldrb r0, [r0, #2]636; CHECK-LE-NEXT: lsls r0, r0, #16637; CHECK-LE-NEXT: movne r0, #1638; CHECK-LE-NEXT: mov pc, lr639;640; CHECK-V7-LE-LABEL: test_24_8_16:641; CHECK-V7-LE: @ %bb.0:642; CHECK-V7-LE-NEXT: ldrb r0, [r0, #2]643; CHECK-V7-LE-NEXT: lsls r0, r0, #16644; CHECK-V7-LE-NEXT: movwne r0, #1645; CHECK-V7-LE-NEXT: bx lr646;647; CHECK-BE-LABEL: test_24_8_16:648; CHECK-BE: @ %bb.0:649; CHECK-BE-NEXT: ldrb r0, [r0]650; CHECK-BE-NEXT: lsls r0, r0, #16651; CHECK-BE-NEXT: movne r0, #1652; CHECK-BE-NEXT: mov pc, lr653;654; CHECK-V7-BE-LABEL: test_24_8_16:655; CHECK-V7-BE: @ %bb.0:656; CHECK-V7-BE-NEXT: ldrb r0, [r0]657; CHECK-V7-BE-NEXT: lsls r0, r0, #16658; CHECK-V7-BE-NEXT: movwne r0, #1659; CHECK-V7-BE-NEXT: bx lr660 %a = load i24, ptr %y661 %b = and i24 %a, u0xff0000662 %cmp = icmp ne i24 %b, 0663 ret i1 %cmp664}665