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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T13; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP5; RUN: llc < %s -mtriple=armv5t-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMNODPS6; RUN: llc < %s -mtriple=armv5te-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP7; RUN: llc < %s -mtriple=armv6-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMDSP8 9declare i4 @llvm.ssub.sat.i4(i4, i4)10declare i8 @llvm.ssub.sat.i8(i8, i8)11declare i16 @llvm.ssub.sat.i16(i16, i16)12declare i32 @llvm.ssub.sat.i32(i32, i32)13declare i64 @llvm.ssub.sat.i64(i64, i64)14declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)15 16define i32 @func(i32 %x, i32 %y) nounwind {17; CHECK-T1-LABEL: func:18; CHECK-T1: @ %bb.0:19; CHECK-T1-NEXT: subs r0, r0, r120; CHECK-T1-NEXT: bvc .LBB0_221; CHECK-T1-NEXT: @ %bb.1:22; CHECK-T1-NEXT: asrs r1, r0, #3123; CHECK-T1-NEXT: movs r0, #124; CHECK-T1-NEXT: lsls r0, r0, #3125; CHECK-T1-NEXT: eors r0, r126; CHECK-T1-NEXT: .LBB0_2:27; CHECK-T1-NEXT: bx lr28;29; CHECK-T2NODSP-LABEL: func:30; CHECK-T2NODSP: @ %bb.0:31; CHECK-T2NODSP-NEXT: subs r0, r0, r132; CHECK-T2NODSP-NEXT: mov.w r1, #-214748364833; CHECK-T2NODSP-NEXT: it vs34; CHECK-T2NODSP-NEXT: eorvs.w r0, r1, r0, asr #3135; CHECK-T2NODSP-NEXT: bx lr36;37; CHECK-T2DSP-LABEL: func:38; CHECK-T2DSP: @ %bb.0:39; CHECK-T2DSP-NEXT: qsub r0, r0, r140; CHECK-T2DSP-NEXT: bx lr41;42; CHECK-ARMNODPS-LABEL: func:43; CHECK-ARMNODPS: @ %bb.0:44; CHECK-ARMNODPS-NEXT: subs r0, r0, r145; CHECK-ARMNODPS-NEXT: mov r1, #-214748364846; CHECK-ARMNODPS-NEXT: eorvs r0, r1, r0, asr #3147; CHECK-ARMNODPS-NEXT: bx lr48;49; CHECK-ARMBASEDSP-LABEL: func:50; CHECK-ARMBASEDSP: @ %bb.0:51; CHECK-ARMBASEDSP-NEXT: qsub r0, r0, r152; CHECK-ARMBASEDSP-NEXT: bx lr53;54; CHECK-ARMDSP-LABEL: func:55; CHECK-ARMDSP: @ %bb.0:56; CHECK-ARMDSP-NEXT: qsub r0, r0, r157; CHECK-ARMDSP-NEXT: bx lr58 %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y)59 ret i32 %tmp60}61 62define i64 @func2(i64 %x, i64 %y) nounwind {63; CHECK-T1-LABEL: func2:64; CHECK-T1: @ %bb.0:65; CHECK-T1-NEXT: .save {r4, r5, r7, lr}66; CHECK-T1-NEXT: push {r4, r5, r7, lr}67; CHECK-T1-NEXT: mov r4, r168; CHECK-T1-NEXT: eors r1, r369; CHECK-T1-NEXT: subs r5, r0, r270; CHECK-T1-NEXT: mov r2, r471; CHECK-T1-NEXT: sbcs r2, r372; CHECK-T1-NEXT: eors r4, r273; CHECK-T1-NEXT: ands r4, r174; CHECK-T1-NEXT: asrs r0, r2, #3175; CHECK-T1-NEXT: movs r1, #176; CHECK-T1-NEXT: lsls r1, r1, #3177; CHECK-T1-NEXT: eors r1, r078; CHECK-T1-NEXT: cmp r4, #079; CHECK-T1-NEXT: bpl .LBB1_380; CHECK-T1-NEXT: @ %bb.1:81; CHECK-T1-NEXT: bpl .LBB1_482; CHECK-T1-NEXT: .LBB1_2:83; CHECK-T1-NEXT: pop {r4, r5, r7, pc}84; CHECK-T1-NEXT: .LBB1_3:85; CHECK-T1-NEXT: mov r0, r586; CHECK-T1-NEXT: bmi .LBB1_287; CHECK-T1-NEXT: .LBB1_4:88; CHECK-T1-NEXT: mov r1, r289; CHECK-T1-NEXT: pop {r4, r5, r7, pc}90;91; CHECK-T2-LABEL: func2:92; CHECK-T2: @ %bb.0:93; CHECK-T2-NEXT: subs r0, r0, r294; CHECK-T2-NEXT: eor.w r12, r1, r395; CHECK-T2-NEXT: sbc.w r2, r1, r396; CHECK-T2-NEXT: eors r1, r297; CHECK-T2-NEXT: ands.w r1, r1, r1298; CHECK-T2-NEXT: it mi99; CHECK-T2-NEXT: asrmi r0, r2, #31100; CHECK-T2-NEXT: mov.w r1, #-2147483648101; CHECK-T2-NEXT: it mi102; CHECK-T2-NEXT: eormi.w r2, r1, r2, asr #31103; CHECK-T2-NEXT: mov r1, r2104; CHECK-T2-NEXT: bx lr105;106; CHECK-ARM-LABEL: func2:107; CHECK-ARM: @ %bb.0:108; CHECK-ARM-NEXT: subs r0, r0, r2109; CHECK-ARM-NEXT: eor r12, r1, r3110; CHECK-ARM-NEXT: sbc r2, r1, r3111; CHECK-ARM-NEXT: eor r1, r1, r2112; CHECK-ARM-NEXT: ands r1, r12, r1113; CHECK-ARM-NEXT: asrmi r0, r2, #31114; CHECK-ARM-NEXT: mov r1, #-2147483648115; CHECK-ARM-NEXT: eormi r2, r1, r2, asr #31116; CHECK-ARM-NEXT: mov r1, r2117; CHECK-ARM-NEXT: bx lr118 %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %y)119 ret i64 %tmp120}121 122define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {123; CHECK-T1-LABEL: func16:124; CHECK-T1: @ %bb.0:125; CHECK-T1-NEXT: subs r0, r0, r1126; CHECK-T1-NEXT: ldr r1, .LCPI2_0127; CHECK-T1-NEXT: cmp r0, r1128; CHECK-T1-NEXT: blt .LBB2_2129; CHECK-T1-NEXT: @ %bb.1:130; CHECK-T1-NEXT: mov r0, r1131; CHECK-T1-NEXT: .LBB2_2:132; CHECK-T1-NEXT: ldr r1, .LCPI2_1133; CHECK-T1-NEXT: cmp r0, r1134; CHECK-T1-NEXT: bgt .LBB2_4135; CHECK-T1-NEXT: @ %bb.3:136; CHECK-T1-NEXT: mov r0, r1137; CHECK-T1-NEXT: .LBB2_4:138; CHECK-T1-NEXT: bx lr139; CHECK-T1-NEXT: .p2align 2140; CHECK-T1-NEXT: @ %bb.5:141; CHECK-T1-NEXT: .LCPI2_0:142; CHECK-T1-NEXT: .long 32767 @ 0x7fff143; CHECK-T1-NEXT: .LCPI2_1:144; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000145;146; CHECK-T2NODSP-LABEL: func16:147; CHECK-T2NODSP: @ %bb.0:148; CHECK-T2NODSP-NEXT: subs r0, r0, r1149; CHECK-T2NODSP-NEXT: ssat r0, #16, r0150; CHECK-T2NODSP-NEXT: bx lr151;152; CHECK-T2DSP-LABEL: func16:153; CHECK-T2DSP: @ %bb.0:154; CHECK-T2DSP-NEXT: qsub16 r0, r0, r1155; CHECK-T2DSP-NEXT: sxth r0, r0156; CHECK-T2DSP-NEXT: bx lr157;158; CHECK-ARMNODPS-LABEL: func16:159; CHECK-ARMNODPS: @ %bb.0:160; CHECK-ARMNODPS-NEXT: sub r0, r0, r1161; CHECK-ARMNODPS-NEXT: mov r1, #255162; CHECK-ARMNODPS-NEXT: orr r1, r1, #32512163; CHECK-ARMNODPS-NEXT: cmp r0, r1164; CHECK-ARMNODPS-NEXT: movlt r1, r0165; CHECK-ARMNODPS-NEXT: ldr r0, .LCPI2_0166; CHECK-ARMNODPS-NEXT: cmn r1, #32768167; CHECK-ARMNODPS-NEXT: movgt r0, r1168; CHECK-ARMNODPS-NEXT: bx lr169; CHECK-ARMNODPS-NEXT: .p2align 2170; CHECK-ARMNODPS-NEXT: @ %bb.1:171; CHECK-ARMNODPS-NEXT: .LCPI2_0:172; CHECK-ARMNODPS-NEXT: .long 4294934528 @ 0xffff8000173;174; CHECK-ARMBASEDSP-LABEL: func16:175; CHECK-ARMBASEDSP: @ %bb.0:176; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #16177; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #16178; CHECK-ARMBASEDSP-NEXT: qsub r0, r0, r1179; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #16180; CHECK-ARMBASEDSP-NEXT: bx lr181;182; CHECK-ARMDSP-LABEL: func16:183; CHECK-ARMDSP: @ %bb.0:184; CHECK-ARMDSP-NEXT: qsub16 r0, r0, r1185; CHECK-ARMDSP-NEXT: sxth r0, r0186; CHECK-ARMDSP-NEXT: bx lr187 %tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %y)188 ret i16 %tmp189}190 191define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {192; CHECK-T1-LABEL: func8:193; CHECK-T1: @ %bb.0:194; CHECK-T1-NEXT: subs r0, r0, r1195; CHECK-T1-NEXT: movs r1, #127196; CHECK-T1-NEXT: cmp r0, #127197; CHECK-T1-NEXT: blt .LBB3_2198; CHECK-T1-NEXT: @ %bb.1:199; CHECK-T1-NEXT: mov r0, r1200; CHECK-T1-NEXT: .LBB3_2:201; CHECK-T1-NEXT: mvns r1, r1202; CHECK-T1-NEXT: cmp r0, r1203; CHECK-T1-NEXT: bgt .LBB3_4204; CHECK-T1-NEXT: @ %bb.3:205; CHECK-T1-NEXT: mov r0, r1206; CHECK-T1-NEXT: .LBB3_4:207; CHECK-T1-NEXT: bx lr208;209; CHECK-T2NODSP-LABEL: func8:210; CHECK-T2NODSP: @ %bb.0:211; CHECK-T2NODSP-NEXT: subs r0, r0, r1212; CHECK-T2NODSP-NEXT: ssat r0, #8, r0213; CHECK-T2NODSP-NEXT: bx lr214;215; CHECK-T2DSP-LABEL: func8:216; CHECK-T2DSP: @ %bb.0:217; CHECK-T2DSP-NEXT: qsub8 r0, r0, r1218; CHECK-T2DSP-NEXT: sxtb r0, r0219; CHECK-T2DSP-NEXT: bx lr220;221; CHECK-ARMNODPS-LABEL: func8:222; CHECK-ARMNODPS: @ %bb.0:223; CHECK-ARMNODPS-NEXT: sub r0, r0, r1224; CHECK-ARMNODPS-NEXT: cmp r0, #127225; CHECK-ARMNODPS-NEXT: movge r0, #127226; CHECK-ARMNODPS-NEXT: cmn r0, #128227; CHECK-ARMNODPS-NEXT: mvnle r0, #127228; CHECK-ARMNODPS-NEXT: bx lr229;230; CHECK-ARMBASEDSP-LABEL: func8:231; CHECK-ARMBASEDSP: @ %bb.0:232; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #24233; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #24234; CHECK-ARMBASEDSP-NEXT: qsub r0, r0, r1235; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #24236; CHECK-ARMBASEDSP-NEXT: bx lr237;238; CHECK-ARMDSP-LABEL: func8:239; CHECK-ARMDSP: @ %bb.0:240; CHECK-ARMDSP-NEXT: qsub8 r0, r0, r1241; CHECK-ARMDSP-NEXT: sxtb r0, r0242; CHECK-ARMDSP-NEXT: bx lr243 %tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %y)244 ret i8 %tmp245}246 247define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {248; CHECK-T1-LABEL: func3:249; CHECK-T1: @ %bb.0:250; CHECK-T1-NEXT: subs r0, r0, r1251; CHECK-T1-NEXT: movs r1, #7252; CHECK-T1-NEXT: cmp r0, #7253; CHECK-T1-NEXT: blt .LBB4_2254; CHECK-T1-NEXT: @ %bb.1:255; CHECK-T1-NEXT: mov r0, r1256; CHECK-T1-NEXT: .LBB4_2:257; CHECK-T1-NEXT: mvns r1, r1258; CHECK-T1-NEXT: cmp r0, r1259; CHECK-T1-NEXT: bgt .LBB4_4260; CHECK-T1-NEXT: @ %bb.3:261; CHECK-T1-NEXT: mov r0, r1262; CHECK-T1-NEXT: .LBB4_4:263; CHECK-T1-NEXT: bx lr264;265; CHECK-T2NODSP-LABEL: func3:266; CHECK-T2NODSP: @ %bb.0:267; CHECK-T2NODSP-NEXT: subs r0, r0, r1268; CHECK-T2NODSP-NEXT: ssat r0, #4, r0269; CHECK-T2NODSP-NEXT: bx lr270;271; CHECK-T2DSP-LABEL: func3:272; CHECK-T2DSP: @ %bb.0:273; CHECK-T2DSP-NEXT: lsls r1, r1, #28274; CHECK-T2DSP-NEXT: lsls r0, r0, #28275; CHECK-T2DSP-NEXT: qsub r0, r0, r1276; CHECK-T2DSP-NEXT: asrs r0, r0, #28277; CHECK-T2DSP-NEXT: bx lr278;279; CHECK-ARMNODPS-LABEL: func3:280; CHECK-ARMNODPS: @ %bb.0:281; CHECK-ARMNODPS-NEXT: sub r0, r0, r1282; CHECK-ARMNODPS-NEXT: cmp r0, #7283; CHECK-ARMNODPS-NEXT: movge r0, #7284; CHECK-ARMNODPS-NEXT: cmn r0, #8285; CHECK-ARMNODPS-NEXT: mvnle r0, #7286; CHECK-ARMNODPS-NEXT: bx lr287;288; CHECK-ARMBASEDSP-LABEL: func3:289; CHECK-ARMBASEDSP: @ %bb.0:290; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #28291; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #28292; CHECK-ARMBASEDSP-NEXT: qsub r0, r0, r1293; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #28294; CHECK-ARMBASEDSP-NEXT: bx lr295;296; CHECK-ARMDSP-LABEL: func3:297; CHECK-ARMDSP: @ %bb.0:298; CHECK-ARMDSP-NEXT: lsl r0, r0, #28299; CHECK-ARMDSP-NEXT: lsl r1, r1, #28300; CHECK-ARMDSP-NEXT: qsub r0, r0, r1301; CHECK-ARMDSP-NEXT: asr r0, r0, #28302; CHECK-ARMDSP-NEXT: bx lr303 %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y)304 ret i4 %tmp305}306 307define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {308; CHECK-T1-LABEL: vec:309; CHECK-T1: @ %bb.0:310; CHECK-T1-NEXT: .save {r4, r5, r6, lr}311; CHECK-T1-NEXT: push {r4, r5, r6, lr}312; CHECK-T1-NEXT: mov r4, r0313; CHECK-T1-NEXT: ldr r6, [sp, #16]314; CHECK-T1-NEXT: subs r0, r0, r6315; CHECK-T1-NEXT: movs r5, #1316; CHECK-T1-NEXT: lsls r5, r5, #31317; CHECK-T1-NEXT: cmp r4, r6318; CHECK-T1-NEXT: bvc .LBB5_2319; CHECK-T1-NEXT: @ %bb.1:320; CHECK-T1-NEXT: asrs r0, r0, #31321; CHECK-T1-NEXT: eors r0, r5322; CHECK-T1-NEXT: .LBB5_2:323; CHECK-T1-NEXT: ldr r4, [sp, #20]324; CHECK-T1-NEXT: subs r1, r1, r4325; CHECK-T1-NEXT: bvc .LBB5_4326; CHECK-T1-NEXT: @ %bb.3:327; CHECK-T1-NEXT: asrs r1, r1, #31328; CHECK-T1-NEXT: eors r1, r5329; CHECK-T1-NEXT: .LBB5_4:330; CHECK-T1-NEXT: ldr r4, [sp, #24]331; CHECK-T1-NEXT: subs r2, r2, r4332; CHECK-T1-NEXT: bvc .LBB5_6333; CHECK-T1-NEXT: @ %bb.5:334; CHECK-T1-NEXT: asrs r2, r2, #31335; CHECK-T1-NEXT: eors r2, r5336; CHECK-T1-NEXT: .LBB5_6:337; CHECK-T1-NEXT: ldr r4, [sp, #28]338; CHECK-T1-NEXT: subs r3, r3, r4339; CHECK-T1-NEXT: bvc .LBB5_8340; CHECK-T1-NEXT: @ %bb.7:341; CHECK-T1-NEXT: asrs r3, r3, #31342; CHECK-T1-NEXT: eors r3, r5343; CHECK-T1-NEXT: .LBB5_8:344; CHECK-T1-NEXT: pop {r4, r5, r6, pc}345;346; CHECK-T2NODSP-LABEL: vec:347; CHECK-T2NODSP: @ %bb.0:348; CHECK-T2NODSP-NEXT: .save {r7, lr}349; CHECK-T2NODSP-NEXT: push {r7, lr}350; CHECK-T2NODSP-NEXT: ldr.w r12, [sp, #8]351; CHECK-T2NODSP-NEXT: ldr.w lr, [sp, #12]352; CHECK-T2NODSP-NEXT: subs.w r0, r0, r12353; CHECK-T2NODSP-NEXT: mov.w r12, #-2147483648354; CHECK-T2NODSP-NEXT: it vs355; CHECK-T2NODSP-NEXT: eorvs.w r0, r12, r0, asr #31356; CHECK-T2NODSP-NEXT: subs.w r1, r1, lr357; CHECK-T2NODSP-NEXT: ldr.w lr, [sp, #16]358; CHECK-T2NODSP-NEXT: it vs359; CHECK-T2NODSP-NEXT: eorvs.w r1, r12, r1, asr #31360; CHECK-T2NODSP-NEXT: subs.w r2, r2, lr361; CHECK-T2NODSP-NEXT: ldr.w lr, [sp, #20]362; CHECK-T2NODSP-NEXT: it vs363; CHECK-T2NODSP-NEXT: eorvs.w r2, r12, r2, asr #31364; CHECK-T2NODSP-NEXT: subs.w r3, r3, lr365; CHECK-T2NODSP-NEXT: it vs366; CHECK-T2NODSP-NEXT: eorvs.w r3, r12, r3, asr #31367; CHECK-T2NODSP-NEXT: pop {r7, pc}368;369; CHECK-T2DSP-LABEL: vec:370; CHECK-T2DSP: @ %bb.0:371; CHECK-T2DSP-NEXT: ldr.w r12, [sp]372; CHECK-T2DSP-NEXT: qsub r0, r0, r12373; CHECK-T2DSP-NEXT: ldr.w r12, [sp, #4]374; CHECK-T2DSP-NEXT: qsub r1, r1, r12375; CHECK-T2DSP-NEXT: ldr.w r12, [sp, #8]376; CHECK-T2DSP-NEXT: qsub r2, r2, r12377; CHECK-T2DSP-NEXT: ldr.w r12, [sp, #12]378; CHECK-T2DSP-NEXT: qsub r3, r3, r12379; CHECK-T2DSP-NEXT: bx lr380;381; CHECK-ARMNODPS-LABEL: vec:382; CHECK-ARMNODPS: @ %bb.0:383; CHECK-ARMNODPS-NEXT: .save {r11, lr}384; CHECK-ARMNODPS-NEXT: push {r11, lr}385; CHECK-ARMNODPS-NEXT: ldr r12, [sp, #8]386; CHECK-ARMNODPS-NEXT: ldr lr, [sp, #12]387; CHECK-ARMNODPS-NEXT: subs r0, r0, r12388; CHECK-ARMNODPS-NEXT: mov r12, #-2147483648389; CHECK-ARMNODPS-NEXT: eorvs r0, r12, r0, asr #31390; CHECK-ARMNODPS-NEXT: subs r1, r1, lr391; CHECK-ARMNODPS-NEXT: ldr lr, [sp, #16]392; CHECK-ARMNODPS-NEXT: eorvs r1, r12, r1, asr #31393; CHECK-ARMNODPS-NEXT: subs r2, r2, lr394; CHECK-ARMNODPS-NEXT: ldr lr, [sp, #20]395; CHECK-ARMNODPS-NEXT: eorvs r2, r12, r2, asr #31396; CHECK-ARMNODPS-NEXT: subs r3, r3, lr397; CHECK-ARMNODPS-NEXT: eorvs r3, r12, r3, asr #31398; CHECK-ARMNODPS-NEXT: pop {r11, pc}399;400; CHECK-ARMBASEDSP-LABEL: vec:401; CHECK-ARMBASEDSP: @ %bb.0:402; CHECK-ARMBASEDSP-NEXT: ldr r12, [sp]403; CHECK-ARMBASEDSP-NEXT: qsub r0, r0, r12404; CHECK-ARMBASEDSP-NEXT: ldr r12, [sp, #4]405; CHECK-ARMBASEDSP-NEXT: qsub r1, r1, r12406; CHECK-ARMBASEDSP-NEXT: ldr r12, [sp, #8]407; CHECK-ARMBASEDSP-NEXT: qsub r2, r2, r12408; CHECK-ARMBASEDSP-NEXT: ldr r12, [sp, #12]409; CHECK-ARMBASEDSP-NEXT: qsub r3, r3, r12410; CHECK-ARMBASEDSP-NEXT: bx lr411;412; CHECK-ARMDSP-LABEL: vec:413; CHECK-ARMDSP: @ %bb.0:414; CHECK-ARMDSP-NEXT: ldr r12, [sp]415; CHECK-ARMDSP-NEXT: qsub r0, r0, r12416; CHECK-ARMDSP-NEXT: ldr r12, [sp, #4]417; CHECK-ARMDSP-NEXT: qsub r1, r1, r12418; CHECK-ARMDSP-NEXT: ldr r12, [sp, #8]419; CHECK-ARMDSP-NEXT: qsub r2, r2, r12420; CHECK-ARMDSP-NEXT: ldr r12, [sp, #12]421; CHECK-ARMDSP-NEXT: qsub r3, r3, r12422; CHECK-ARMDSP-NEXT: bx lr423 %tmp = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)424 ret <4 x i32> %tmp425}426