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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T13; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP5; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM6 7declare i4 @llvm.ssub.sat.i4(i4, i4)8declare i8 @llvm.ssub.sat.i8(i8, i8)9declare i16 @llvm.ssub.sat.i16(i16, i16)10declare i32 @llvm.ssub.sat.i32(i32, i32)11declare i64 @llvm.ssub.sat.i64(i64, i64)12 13define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {14; CHECK-T1-LABEL: func32:15; CHECK-T1: @ %bb.0:16; CHECK-T1-NEXT: muls r1, r2, r117; CHECK-T1-NEXT: subs r0, r0, r118; CHECK-T1-NEXT: bvc .LBB0_219; CHECK-T1-NEXT: @ %bb.1:20; CHECK-T1-NEXT: asrs r1, r0, #3121; CHECK-T1-NEXT: movs r0, #122; CHECK-T1-NEXT: lsls r0, r0, #3123; CHECK-T1-NEXT: eors r0, r124; CHECK-T1-NEXT: .LBB0_2:25; CHECK-T1-NEXT: bx lr26;27; CHECK-T2NODSP-LABEL: func32:28; CHECK-T2NODSP: @ %bb.0:29; CHECK-T2NODSP-NEXT: mls r3, r1, r2, r030; CHECK-T2NODSP-NEXT: mov.w r12, #-214748364831; CHECK-T2NODSP-NEXT: muls r1, r2, r132; CHECK-T2NODSP-NEXT: cmp r0, r133; CHECK-T2NODSP-NEXT: it vs34; CHECK-T2NODSP-NEXT: eorvs.w r3, r12, r3, asr #3135; CHECK-T2NODSP-NEXT: mov r0, r336; CHECK-T2NODSP-NEXT: bx lr37;38; CHECK-T2DSP-LABEL: func32:39; CHECK-T2DSP: @ %bb.0:40; CHECK-T2DSP-NEXT: muls r1, r2, r141; CHECK-T2DSP-NEXT: qsub r0, r0, r142; CHECK-T2DSP-NEXT: bx lr43;44; CHECK-ARM-LABEL: func32:45; CHECK-ARM: @ %bb.0:46; CHECK-ARM-NEXT: mul r1, r1, r247; CHECK-ARM-NEXT: qsub r0, r0, r148; CHECK-ARM-NEXT: bx lr49 %a = mul i32 %y, %z50 %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %a)51 ret i32 %tmp52}53 54define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {55; CHECK-T1-LABEL: func64:56; CHECK-T1: @ %bb.0:57; CHECK-T1-NEXT: .save {r4, r5, r7, lr}58; CHECK-T1-NEXT: push {r4, r5, r7, lr}59; CHECK-T1-NEXT: ldr r2, [sp, #20]60; CHECK-T1-NEXT: mov r5, r161; CHECK-T1-NEXT: eors r5, r262; CHECK-T1-NEXT: ldr r3, [sp, #16]63; CHECK-T1-NEXT: subs r4, r0, r364; CHECK-T1-NEXT: mov r3, r165; CHECK-T1-NEXT: sbcs r3, r266; CHECK-T1-NEXT: eors r1, r367; CHECK-T1-NEXT: ands r1, r568; CHECK-T1-NEXT: asrs r0, r3, #3169; CHECK-T1-NEXT: movs r2, #170; CHECK-T1-NEXT: lsls r2, r2, #3171; CHECK-T1-NEXT: eors r2, r072; CHECK-T1-NEXT: cmp r1, #073; CHECK-T1-NEXT: bpl .LBB1_374; CHECK-T1-NEXT: @ %bb.1:75; CHECK-T1-NEXT: bpl .LBB1_476; CHECK-T1-NEXT: .LBB1_2:77; CHECK-T1-NEXT: mov r1, r278; CHECK-T1-NEXT: pop {r4, r5, r7, pc}79; CHECK-T1-NEXT: .LBB1_3:80; CHECK-T1-NEXT: mov r0, r481; CHECK-T1-NEXT: bmi .LBB1_282; CHECK-T1-NEXT: .LBB1_4:83; CHECK-T1-NEXT: mov r2, r384; CHECK-T1-NEXT: mov r1, r285; CHECK-T1-NEXT: pop {r4, r5, r7, pc}86;87; CHECK-T2-LABEL: func64:88; CHECK-T2: @ %bb.0:89; CHECK-T2-NEXT: ldr r2, [sp]90; CHECK-T2-NEXT: ldr.w r12, [sp, #4]91; CHECK-T2-NEXT: subs r0, r0, r292; CHECK-T2-NEXT: sbc.w r2, r1, r1293; CHECK-T2-NEXT: eor.w r3, r1, r1294; CHECK-T2-NEXT: eors r1, r295; CHECK-T2-NEXT: ands r1, r396; CHECK-T2-NEXT: it mi97; CHECK-T2-NEXT: asrmi r0, r2, #3198; CHECK-T2-NEXT: mov.w r1, #-214748364899; CHECK-T2-NEXT: it mi100; CHECK-T2-NEXT: eormi.w r2, r1, r2, asr #31101; CHECK-T2-NEXT: mov r1, r2102; CHECK-T2-NEXT: bx lr103;104; CHECK-ARM-LABEL: func64:105; CHECK-ARM: @ %bb.0:106; CHECK-ARM-NEXT: ldr r12, [sp]107; CHECK-ARM-NEXT: ldr r2, [sp, #4]108; CHECK-ARM-NEXT: subs r0, r0, r12109; CHECK-ARM-NEXT: eor r3, r1, r2110; CHECK-ARM-NEXT: sbc r2, r1, r2111; CHECK-ARM-NEXT: eor r1, r1, r2112; CHECK-ARM-NEXT: ands r1, r3, r1113; CHECK-ARM-NEXT: asrmi r0, r2, #31114; CHECK-ARM-NEXT: mov r1, #-2147483648115; CHECK-ARM-NEXT: eormi r2, r1, r2, asr #31116; CHECK-ARM-NEXT: mov r1, r2117; CHECK-ARM-NEXT: bx lr118 %a = mul i64 %y, %z119 %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %z)120 ret i64 %tmp121}122 123define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {124; CHECK-T1-LABEL: func16:125; CHECK-T1: @ %bb.0:126; CHECK-T1-NEXT: muls r1, r2, r1127; CHECK-T1-NEXT: sxth r1, r1128; CHECK-T1-NEXT: subs r0, r0, r1129; CHECK-T1-NEXT: ldr r1, .LCPI2_0130; CHECK-T1-NEXT: cmp r0, r1131; CHECK-T1-NEXT: blt .LBB2_2132; CHECK-T1-NEXT: @ %bb.1:133; CHECK-T1-NEXT: mov r0, r1134; CHECK-T1-NEXT: .LBB2_2:135; CHECK-T1-NEXT: ldr r1, .LCPI2_1136; CHECK-T1-NEXT: cmp r0, r1137; CHECK-T1-NEXT: bgt .LBB2_4138; CHECK-T1-NEXT: @ %bb.3:139; CHECK-T1-NEXT: mov r0, r1140; CHECK-T1-NEXT: .LBB2_4:141; CHECK-T1-NEXT: bx lr142; CHECK-T1-NEXT: .p2align 2143; CHECK-T1-NEXT: @ %bb.5:144; CHECK-T1-NEXT: .LCPI2_0:145; CHECK-T1-NEXT: .long 32767 @ 0x7fff146; CHECK-T1-NEXT: .LCPI2_1:147; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000148;149; CHECK-T2NODSP-LABEL: func16:150; CHECK-T2NODSP: @ %bb.0:151; CHECK-T2NODSP-NEXT: muls r1, r2, r1152; CHECK-T2NODSP-NEXT: sxth r1, r1153; CHECK-T2NODSP-NEXT: subs r0, r0, r1154; CHECK-T2NODSP-NEXT: ssat r0, #16, r0155; CHECK-T2NODSP-NEXT: bx lr156;157; CHECK-T2DSP-LABEL: func16:158; CHECK-T2DSP: @ %bb.0:159; CHECK-T2DSP-NEXT: muls r1, r2, r1160; CHECK-T2DSP-NEXT: qsub16 r0, r0, r1161; CHECK-T2DSP-NEXT: sxth r0, r0162; CHECK-T2DSP-NEXT: bx lr163;164; CHECK-ARM-LABEL: func16:165; CHECK-ARM: @ %bb.0:166; CHECK-ARM-NEXT: smulbb r1, r1, r2167; CHECK-ARM-NEXT: qsub16 r0, r0, r1168; CHECK-ARM-NEXT: sxth r0, r0169; CHECK-ARM-NEXT: bx lr170 %a = mul i16 %y, %z171 %tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %a)172 ret i16 %tmp173}174 175define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {176; CHECK-T1-LABEL: func8:177; CHECK-T1: @ %bb.0:178; CHECK-T1-NEXT: muls r1, r2, r1179; CHECK-T1-NEXT: sxtb r1, r1180; CHECK-T1-NEXT: subs r0, r0, r1181; CHECK-T1-NEXT: movs r1, #127182; CHECK-T1-NEXT: cmp r0, #127183; CHECK-T1-NEXT: blt .LBB3_2184; CHECK-T1-NEXT: @ %bb.1:185; CHECK-T1-NEXT: mov r0, r1186; CHECK-T1-NEXT: .LBB3_2:187; CHECK-T1-NEXT: mvns r1, r1188; CHECK-T1-NEXT: cmp r0, r1189; CHECK-T1-NEXT: bgt .LBB3_4190; CHECK-T1-NEXT: @ %bb.3:191; CHECK-T1-NEXT: mov r0, r1192; CHECK-T1-NEXT: .LBB3_4:193; CHECK-T1-NEXT: bx lr194;195; CHECK-T2NODSP-LABEL: func8:196; CHECK-T2NODSP: @ %bb.0:197; CHECK-T2NODSP-NEXT: muls r1, r2, r1198; CHECK-T2NODSP-NEXT: sxtb r1, r1199; CHECK-T2NODSP-NEXT: subs r0, r0, r1200; CHECK-T2NODSP-NEXT: ssat r0, #8, r0201; CHECK-T2NODSP-NEXT: bx lr202;203; CHECK-T2DSP-LABEL: func8:204; CHECK-T2DSP: @ %bb.0:205; CHECK-T2DSP-NEXT: muls r1, r2, r1206; CHECK-T2DSP-NEXT: qsub8 r0, r0, r1207; CHECK-T2DSP-NEXT: sxtb r0, r0208; CHECK-T2DSP-NEXT: bx lr209;210; CHECK-ARM-LABEL: func8:211; CHECK-ARM: @ %bb.0:212; CHECK-ARM-NEXT: smulbb r1, r1, r2213; CHECK-ARM-NEXT: qsub8 r0, r0, r1214; CHECK-ARM-NEXT: sxtb r0, r0215; CHECK-ARM-NEXT: bx lr216 %a = mul i8 %y, %z217 %tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %a)218 ret i8 %tmp219}220 221define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {222; CHECK-T1-LABEL: func4:223; CHECK-T1: @ %bb.0:224; CHECK-T1-NEXT: muls r1, r2, r1225; CHECK-T1-NEXT: lsls r1, r1, #28226; CHECK-T1-NEXT: asrs r1, r1, #28227; CHECK-T1-NEXT: subs r0, r0, r1228; CHECK-T1-NEXT: movs r1, #7229; CHECK-T1-NEXT: cmp r0, #7230; CHECK-T1-NEXT: blt .LBB4_2231; CHECK-T1-NEXT: @ %bb.1:232; CHECK-T1-NEXT: mov r0, r1233; CHECK-T1-NEXT: .LBB4_2:234; CHECK-T1-NEXT: mvns r1, r1235; CHECK-T1-NEXT: cmp r0, r1236; CHECK-T1-NEXT: bgt .LBB4_4237; CHECK-T1-NEXT: @ %bb.3:238; CHECK-T1-NEXT: mov r0, r1239; CHECK-T1-NEXT: .LBB4_4:240; CHECK-T1-NEXT: bx lr241;242; CHECK-T2NODSP-LABEL: func4:243; CHECK-T2NODSP: @ %bb.0:244; CHECK-T2NODSP-NEXT: muls r1, r2, r1245; CHECK-T2NODSP-NEXT: lsls r1, r1, #28246; CHECK-T2NODSP-NEXT: sub.w r0, r0, r1, asr #28247; CHECK-T2NODSP-NEXT: ssat r0, #4, r0248; CHECK-T2NODSP-NEXT: bx lr249;250; CHECK-T2DSP-LABEL: func4:251; CHECK-T2DSP: @ %bb.0:252; CHECK-T2DSP-NEXT: muls r1, r2, r1253; CHECK-T2DSP-NEXT: lsls r0, r0, #28254; CHECK-T2DSP-NEXT: lsls r1, r1, #28255; CHECK-T2DSP-NEXT: qsub r0, r0, r1256; CHECK-T2DSP-NEXT: asrs r0, r0, #28257; CHECK-T2DSP-NEXT: bx lr258;259; CHECK-ARM-LABEL: func4:260; CHECK-ARM: @ %bb.0:261; CHECK-ARM-NEXT: smulbb r1, r1, r2262; CHECK-ARM-NEXT: lsl r0, r0, #28263; CHECK-ARM-NEXT: lsl r1, r1, #28264; CHECK-ARM-NEXT: qsub r0, r0, r1265; CHECK-ARM-NEXT: asr r0, r0, #28266; CHECK-ARM-NEXT: bx lr267 %a = mul i4 %y, %z268 %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)269 ret i4 %tmp270}271