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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=armv6 < %s | FileCheck %s --check-prefixes=ARM,ARM63; RUN: llc -mtriple=armv7 < %s | FileCheck %s --check-prefixes=ARM,ARM784; RUN: llc -mtriple=armv8a < %s | FileCheck %s --check-prefixes=ARM,ARM785; RUN: llc -mtriple=thumbv6 < %s | FileCheck %s --check-prefixes=THUMB66; RUN: llc -mtriple=thumbv7 < %s | FileCheck %s --check-prefixes=THUMB787; RUN: llc -mtriple=thumbv8-eabi < %s | FileCheck %s --check-prefixes=THUMB788 9; These two forms are equivalent:10; sub %y, (xor %x, -1)11; add (add %x, 1), %y12; Some targets may prefer one to the other.13 14define i8 @scalar_i8(i8 %x, i8 %y) nounwind {15; ARM-LABEL: scalar_i8:16; ARM: @ %bb.0:17; ARM-NEXT: add r0, r1, r018; ARM-NEXT: add r0, r0, #119; ARM-NEXT: bx lr20;21; THUMB6-LABEL: scalar_i8:22; THUMB6: @ %bb.0:23; THUMB6-NEXT: adds r0, r1, r024; THUMB6-NEXT: adds r0, r0, #125; THUMB6-NEXT: bx lr26;27; THUMB78-LABEL: scalar_i8:28; THUMB78: @ %bb.0:29; THUMB78-NEXT: add r0, r130; THUMB78-NEXT: adds r0, #131; THUMB78-NEXT: bx lr32 %t0 = xor i8 %x, -133 %t1 = sub i8 %y, %t034 ret i8 %t135}36 37define i16 @scalar_i16(i16 %x, i16 %y) nounwind {38; ARM-LABEL: scalar_i16:39; ARM: @ %bb.0:40; ARM-NEXT: add r0, r1, r041; ARM-NEXT: add r0, r0, #142; ARM-NEXT: bx lr43;44; THUMB6-LABEL: scalar_i16:45; THUMB6: @ %bb.0:46; THUMB6-NEXT: adds r0, r1, r047; THUMB6-NEXT: adds r0, r0, #148; THUMB6-NEXT: bx lr49;50; THUMB78-LABEL: scalar_i16:51; THUMB78: @ %bb.0:52; THUMB78-NEXT: add r0, r153; THUMB78-NEXT: adds r0, #154; THUMB78-NEXT: bx lr55 %t0 = xor i16 %x, -156 %t1 = sub i16 %y, %t057 ret i16 %t158}59 60define i32 @scalar_i32(i32 %x, i32 %y) nounwind {61; ARM-LABEL: scalar_i32:62; ARM: @ %bb.0:63; ARM-NEXT: add r0, r1, r064; ARM-NEXT: add r0, r0, #165; ARM-NEXT: bx lr66;67; THUMB6-LABEL: scalar_i32:68; THUMB6: @ %bb.0:69; THUMB6-NEXT: adds r0, r1, r070; THUMB6-NEXT: adds r0, r0, #171; THUMB6-NEXT: bx lr72;73; THUMB78-LABEL: scalar_i32:74; THUMB78: @ %bb.0:75; THUMB78-NEXT: add r0, r176; THUMB78-NEXT: adds r0, #177; THUMB78-NEXT: bx lr78 %t0 = xor i32 %x, -179 %t1 = sub i32 %y, %t080 ret i32 %t181}82 83define i64 @scalar_i64(i64 %x, i64 %y) nounwind {84; ARM-LABEL: scalar_i64:85; ARM: @ %bb.0:86; ARM-NEXT: adds r0, r2, r087; ARM-NEXT: adc r1, r3, r188; ARM-NEXT: adds r0, r0, #189; ARM-NEXT: adc r1, r1, #090; ARM-NEXT: bx lr91;92; THUMB6-LABEL: scalar_i64:93; THUMB6: @ %bb.0:94; THUMB6-NEXT: mvns r1, r195; THUMB6-NEXT: mvns r0, r096; THUMB6-NEXT: subs r0, r2, r097; THUMB6-NEXT: sbcs r3, r198; THUMB6-NEXT: mov r1, r399; THUMB6-NEXT: bx lr100;101; THUMB78-LABEL: scalar_i64:102; THUMB78: @ %bb.0:103; THUMB78-NEXT: adds r0, r0, r2104; THUMB78-NEXT: adcs r1, r3105; THUMB78-NEXT: adds r0, #1106; THUMB78-NEXT: adc r1, r1, #0107; THUMB78-NEXT: bx lr108 %t0 = xor i64 %x, -1109 %t1 = sub i64 %y, %t0110 ret i64 %t1111}112 113define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y) nounwind {114; ARM6-LABEL: vector_i128_i8:115; ARM6: @ %bb.0:116; ARM6-NEXT: ldrb r12, [sp, #52]117; ARM6-NEXT: ldrb r1, [sp, #116]118; ARM6-NEXT: add r1, r1, r12119; ARM6-NEXT: ldrb r12, [sp, #48]120; ARM6-NEXT: add r1, r1, #1121; ARM6-NEXT: strb r1, [r0, #15]122; ARM6-NEXT: ldrb r1, [sp, #112]123; ARM6-NEXT: add r1, r1, r12124; ARM6-NEXT: ldrb r12, [sp, #44]125; ARM6-NEXT: add r1, r1, #1126; ARM6-NEXT: strb r1, [r0, #14]127; ARM6-NEXT: ldrb r1, [sp, #108]128; ARM6-NEXT: add r1, r1, r12129; ARM6-NEXT: ldrb r12, [sp, #40]130; ARM6-NEXT: add r1, r1, #1131; ARM6-NEXT: strb r1, [r0, #13]132; ARM6-NEXT: ldrb r1, [sp, #104]133; ARM6-NEXT: add r1, r1, r12134; ARM6-NEXT: ldrb r12, [sp, #36]135; ARM6-NEXT: add r1, r1, #1136; ARM6-NEXT: strb r1, [r0, #12]137; ARM6-NEXT: ldrb r1, [sp, #100]138; ARM6-NEXT: add r1, r1, r12139; ARM6-NEXT: ldrb r12, [sp, #32]140; ARM6-NEXT: add r1, r1, #1141; ARM6-NEXT: strb r1, [r0, #11]142; ARM6-NEXT: ldrb r1, [sp, #96]143; ARM6-NEXT: add r1, r1, r12144; ARM6-NEXT: ldrb r12, [sp, #28]145; ARM6-NEXT: add r1, r1, #1146; ARM6-NEXT: strb r1, [r0, #10]147; ARM6-NEXT: ldrb r1, [sp, #92]148; ARM6-NEXT: add r1, r1, r12149; ARM6-NEXT: ldrb r12, [sp, #24]150; ARM6-NEXT: add r1, r1, #1151; ARM6-NEXT: strb r1, [r0, #9]152; ARM6-NEXT: ldrb r1, [sp, #88]153; ARM6-NEXT: add r1, r1, r12154; ARM6-NEXT: ldrb r12, [sp, #20]155; ARM6-NEXT: add r1, r1, #1156; ARM6-NEXT: strb r1, [r0, #8]157; ARM6-NEXT: ldrb r1, [sp, #84]158; ARM6-NEXT: add r1, r1, r12159; ARM6-NEXT: ldrb r12, [sp, #16]160; ARM6-NEXT: add r1, r1, #1161; ARM6-NEXT: strb r1, [r0, #7]162; ARM6-NEXT: ldrb r1, [sp, #80]163; ARM6-NEXT: add r1, r1, r12164; ARM6-NEXT: ldrb r12, [sp, #12]165; ARM6-NEXT: add r1, r1, #1166; ARM6-NEXT: strb r1, [r0, #6]167; ARM6-NEXT: ldrb r1, [sp, #76]168; ARM6-NEXT: add r1, r1, r12169; ARM6-NEXT: ldrb r12, [sp, #8]170; ARM6-NEXT: add r1, r1, #1171; ARM6-NEXT: strb r1, [r0, #5]172; ARM6-NEXT: ldrb r1, [sp, #72]173; ARM6-NEXT: add r1, r1, r12174; ARM6-NEXT: ldrb r12, [sp, #4]175; ARM6-NEXT: add r1, r1, #1176; ARM6-NEXT: strb r1, [r0, #4]177; ARM6-NEXT: ldrb r1, [sp, #68]178; ARM6-NEXT: add r1, r1, r12179; ARM6-NEXT: ldrb r12, [sp]180; ARM6-NEXT: add r1, r1, #1181; ARM6-NEXT: strb r1, [r0, #3]182; ARM6-NEXT: ldrb r1, [sp, #64]183; ARM6-NEXT: add r1, r1, r12184; ARM6-NEXT: add r1, r1, #1185; ARM6-NEXT: strb r1, [r0, #2]186; ARM6-NEXT: ldrb r1, [sp, #60]187; ARM6-NEXT: add r1, r1, r3188; ARM6-NEXT: add r1, r1, #1189; ARM6-NEXT: strb r1, [r0, #1]190; ARM6-NEXT: ldrb r1, [sp, #56]191; ARM6-NEXT: add r1, r1, r2192; ARM6-NEXT: add r1, r1, #1193; ARM6-NEXT: strb r1, [r0]194; ARM6-NEXT: bx lr195;196; ARM78-LABEL: vector_i128_i8:197; ARM78: @ %bb.0:198; ARM78-NEXT: vmov d17, r2, r3199; ARM78-NEXT: vmov d16, r0, r1200; ARM78-NEXT: mov r0, sp201; ARM78-NEXT: vmvn q8, q8202; ARM78-NEXT: vld1.64 {d18, d19}, [r0]203; ARM78-NEXT: vsub.i8 q8, q9, q8204; ARM78-NEXT: vmov r0, r1, d16205; ARM78-NEXT: vmov r2, r3, d17206; ARM78-NEXT: bx lr207;208; THUMB6-LABEL: vector_i128_i8:209; THUMB6: @ %bb.0:210; THUMB6-NEXT: push {r4, lr}211; THUMB6-NEXT: ldr r1, [sp, #60]212; THUMB6-NEXT: ldr r4, [sp, #124]213; THUMB6-NEXT: adds r1, r4, r1214; THUMB6-NEXT: adds r1, r1, #1215; THUMB6-NEXT: strb r1, [r0, #15]216; THUMB6-NEXT: ldr r1, [sp, #56]217; THUMB6-NEXT: ldr r4, [sp, #120]218; THUMB6-NEXT: adds r1, r4, r1219; THUMB6-NEXT: adds r1, r1, #1220; THUMB6-NEXT: strb r1, [r0, #14]221; THUMB6-NEXT: ldr r1, [sp, #52]222; THUMB6-NEXT: ldr r4, [sp, #116]223; THUMB6-NEXT: adds r1, r4, r1224; THUMB6-NEXT: adds r1, r1, #1225; THUMB6-NEXT: strb r1, [r0, #13]226; THUMB6-NEXT: ldr r1, [sp, #48]227; THUMB6-NEXT: ldr r4, [sp, #112]228; THUMB6-NEXT: adds r1, r4, r1229; THUMB6-NEXT: adds r1, r1, #1230; THUMB6-NEXT: strb r1, [r0, #12]231; THUMB6-NEXT: ldr r1, [sp, #44]232; THUMB6-NEXT: ldr r4, [sp, #108]233; THUMB6-NEXT: adds r1, r4, r1234; THUMB6-NEXT: adds r1, r1, #1235; THUMB6-NEXT: strb r1, [r0, #11]236; THUMB6-NEXT: ldr r1, [sp, #40]237; THUMB6-NEXT: ldr r4, [sp, #104]238; THUMB6-NEXT: adds r1, r4, r1239; THUMB6-NEXT: adds r1, r1, #1240; THUMB6-NEXT: strb r1, [r0, #10]241; THUMB6-NEXT: ldr r1, [sp, #36]242; THUMB6-NEXT: ldr r4, [sp, #100]243; THUMB6-NEXT: adds r1, r4, r1244; THUMB6-NEXT: adds r1, r1, #1245; THUMB6-NEXT: strb r1, [r0, #9]246; THUMB6-NEXT: ldr r1, [sp, #32]247; THUMB6-NEXT: ldr r4, [sp, #96]248; THUMB6-NEXT: adds r1, r4, r1249; THUMB6-NEXT: adds r1, r1, #1250; THUMB6-NEXT: strb r1, [r0, #8]251; THUMB6-NEXT: ldr r1, [sp, #28]252; THUMB6-NEXT: ldr r4, [sp, #92]253; THUMB6-NEXT: adds r1, r4, r1254; THUMB6-NEXT: adds r1, r1, #1255; THUMB6-NEXT: strb r1, [r0, #7]256; THUMB6-NEXT: ldr r1, [sp, #24]257; THUMB6-NEXT: ldr r4, [sp, #88]258; THUMB6-NEXT: adds r1, r4, r1259; THUMB6-NEXT: adds r1, r1, #1260; THUMB6-NEXT: strb r1, [r0, #6]261; THUMB6-NEXT: ldr r1, [sp, #20]262; THUMB6-NEXT: ldr r4, [sp, #84]263; THUMB6-NEXT: adds r1, r4, r1264; THUMB6-NEXT: adds r1, r1, #1265; THUMB6-NEXT: strb r1, [r0, #5]266; THUMB6-NEXT: ldr r1, [sp, #16]267; THUMB6-NEXT: ldr r4, [sp, #80]268; THUMB6-NEXT: adds r1, r4, r1269; THUMB6-NEXT: adds r1, r1, #1270; THUMB6-NEXT: strb r1, [r0, #4]271; THUMB6-NEXT: ldr r1, [sp, #12]272; THUMB6-NEXT: ldr r4, [sp, #76]273; THUMB6-NEXT: adds r1, r4, r1274; THUMB6-NEXT: adds r1, r1, #1275; THUMB6-NEXT: strb r1, [r0, #3]276; THUMB6-NEXT: ldr r1, [sp, #8]277; THUMB6-NEXT: ldr r4, [sp, #72]278; THUMB6-NEXT: adds r1, r4, r1279; THUMB6-NEXT: adds r1, r1, #1280; THUMB6-NEXT: strb r1, [r0, #2]281; THUMB6-NEXT: ldr r1, [sp, #68]282; THUMB6-NEXT: adds r1, r1, r3283; THUMB6-NEXT: adds r1, r1, #1284; THUMB6-NEXT: strb r1, [r0, #1]285; THUMB6-NEXT: ldr r1, [sp, #64]286; THUMB6-NEXT: adds r1, r1, r2287; THUMB6-NEXT: adds r1, r1, #1288; THUMB6-NEXT: strb r1, [r0]289; THUMB6-NEXT: pop {r4, pc}290;291; THUMB78-LABEL: vector_i128_i8:292; THUMB78: @ %bb.0:293; THUMB78-NEXT: vmov d17, r2, r3294; THUMB78-NEXT: vmov d16, r0, r1295; THUMB78-NEXT: mov r0, sp296; THUMB78-NEXT: vmvn q8, q8297; THUMB78-NEXT: vld1.64 {d18, d19}, [r0]298; THUMB78-NEXT: vsub.i8 q8, q9, q8299; THUMB78-NEXT: vmov r0, r1, d16300; THUMB78-NEXT: vmov r2, r3, d17301; THUMB78-NEXT: bx lr302 %t0 = xor <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>303 %t1 = sub <16 x i8> %y, %t0304 ret <16 x i8> %t1305}306 307define <8 x i16> @vector_i128_i16(<8 x i16> %x, <8 x i16> %y) nounwind {308; ARM6-LABEL: vector_i128_i16:309; ARM6: @ %bb.0:310; ARM6-NEXT: ldrh r12, [sp, #20]311; ARM6-NEXT: ldrh r1, [sp, #52]312; ARM6-NEXT: add r1, r1, r12313; ARM6-NEXT: ldrh r12, [sp, #16]314; ARM6-NEXT: add r1, r1, #1315; ARM6-NEXT: strh r1, [r0, #14]316; ARM6-NEXT: ldrh r1, [sp, #48]317; ARM6-NEXT: add r1, r1, r12318; ARM6-NEXT: ldrh r12, [sp, #12]319; ARM6-NEXT: add r1, r1, #1320; ARM6-NEXT: strh r1, [r0, #12]321; ARM6-NEXT: ldrh r1, [sp, #44]322; ARM6-NEXT: add r1, r1, r12323; ARM6-NEXT: ldrh r12, [sp, #8]324; ARM6-NEXT: add r1, r1, #1325; ARM6-NEXT: strh r1, [r0, #10]326; ARM6-NEXT: ldrh r1, [sp, #40]327; ARM6-NEXT: add r1, r1, r12328; ARM6-NEXT: ldrh r12, [sp, #4]329; ARM6-NEXT: add r1, r1, #1330; ARM6-NEXT: strh r1, [r0, #8]331; ARM6-NEXT: ldrh r1, [sp, #36]332; ARM6-NEXT: add r1, r1, r12333; ARM6-NEXT: ldrh r12, [sp]334; ARM6-NEXT: add r1, r1, #1335; ARM6-NEXT: strh r1, [r0, #6]336; ARM6-NEXT: ldrh r1, [sp, #32]337; ARM6-NEXT: add r1, r1, r12338; ARM6-NEXT: add r1, r1, #1339; ARM6-NEXT: strh r1, [r0, #4]340; ARM6-NEXT: ldrh r1, [sp, #28]341; ARM6-NEXT: add r1, r1, r3342; ARM6-NEXT: add r1, r1, #1343; ARM6-NEXT: strh r1, [r0, #2]344; ARM6-NEXT: ldrh r1, [sp, #24]345; ARM6-NEXT: add r1, r1, r2346; ARM6-NEXT: add r1, r1, #1347; ARM6-NEXT: strh r1, [r0]348; ARM6-NEXT: bx lr349;350; ARM78-LABEL: vector_i128_i16:351; ARM78: @ %bb.0:352; ARM78-NEXT: vmov d17, r2, r3353; ARM78-NEXT: vmov d16, r0, r1354; ARM78-NEXT: mov r0, sp355; ARM78-NEXT: vmvn q8, q8356; ARM78-NEXT: vld1.64 {d18, d19}, [r0]357; ARM78-NEXT: vsub.i16 q8, q9, q8358; ARM78-NEXT: vmov r0, r1, d16359; ARM78-NEXT: vmov r2, r3, d17360; ARM78-NEXT: bx lr361;362; THUMB6-LABEL: vector_i128_i16:363; THUMB6: @ %bb.0:364; THUMB6-NEXT: push {r4, lr}365; THUMB6-NEXT: ldr r1, [sp, #28]366; THUMB6-NEXT: ldr r4, [sp, #60]367; THUMB6-NEXT: adds r1, r4, r1368; THUMB6-NEXT: adds r1, r1, #1369; THUMB6-NEXT: strh r1, [r0, #14]370; THUMB6-NEXT: ldr r1, [sp, #24]371; THUMB6-NEXT: ldr r4, [sp, #56]372; THUMB6-NEXT: adds r1, r4, r1373; THUMB6-NEXT: adds r1, r1, #1374; THUMB6-NEXT: strh r1, [r0, #12]375; THUMB6-NEXT: ldr r1, [sp, #20]376; THUMB6-NEXT: ldr r4, [sp, #52]377; THUMB6-NEXT: adds r1, r4, r1378; THUMB6-NEXT: adds r1, r1, #1379; THUMB6-NEXT: strh r1, [r0, #10]380; THUMB6-NEXT: ldr r1, [sp, #16]381; THUMB6-NEXT: ldr r4, [sp, #48]382; THUMB6-NEXT: adds r1, r4, r1383; THUMB6-NEXT: adds r1, r1, #1384; THUMB6-NEXT: strh r1, [r0, #8]385; THUMB6-NEXT: ldr r1, [sp, #12]386; THUMB6-NEXT: ldr r4, [sp, #44]387; THUMB6-NEXT: adds r1, r4, r1388; THUMB6-NEXT: adds r1, r1, #1389; THUMB6-NEXT: strh r1, [r0, #6]390; THUMB6-NEXT: ldr r1, [sp, #8]391; THUMB6-NEXT: ldr r4, [sp, #40]392; THUMB6-NEXT: adds r1, r4, r1393; THUMB6-NEXT: adds r1, r1, #1394; THUMB6-NEXT: strh r1, [r0, #4]395; THUMB6-NEXT: ldr r1, [sp, #36]396; THUMB6-NEXT: adds r1, r1, r3397; THUMB6-NEXT: adds r1, r1, #1398; THUMB6-NEXT: strh r1, [r0, #2]399; THUMB6-NEXT: ldr r1, [sp, #32]400; THUMB6-NEXT: adds r1, r1, r2401; THUMB6-NEXT: adds r1, r1, #1402; THUMB6-NEXT: strh r1, [r0]403; THUMB6-NEXT: pop {r4, pc}404;405; THUMB78-LABEL: vector_i128_i16:406; THUMB78: @ %bb.0:407; THUMB78-NEXT: vmov d17, r2, r3408; THUMB78-NEXT: vmov d16, r0, r1409; THUMB78-NEXT: mov r0, sp410; THUMB78-NEXT: vmvn q8, q8411; THUMB78-NEXT: vld1.64 {d18, d19}, [r0]412; THUMB78-NEXT: vsub.i16 q8, q9, q8413; THUMB78-NEXT: vmov r0, r1, d16414; THUMB78-NEXT: vmov r2, r3, d17415; THUMB78-NEXT: bx lr416 %t0 = xor <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>417 %t1 = sub <8 x i16> %y, %t0418 ret <8 x i16> %t1419}420 421define <4 x i32> @vector_i128_i32(<4 x i32> %x, <4 x i32> %y) nounwind {422; ARM6-LABEL: vector_i128_i32:423; ARM6: @ %bb.0:424; ARM6-NEXT: ldr r12, [sp]425; ARM6-NEXT: add r0, r12, r0426; ARM6-NEXT: ldr r12, [sp, #4]427; ARM6-NEXT: add r0, r0, #1428; ARM6-NEXT: add r1, r12, r1429; ARM6-NEXT: ldr r12, [sp, #8]430; ARM6-NEXT: add r1, r1, #1431; ARM6-NEXT: add r2, r12, r2432; ARM6-NEXT: ldr r12, [sp, #12]433; ARM6-NEXT: add r2, r2, #1434; ARM6-NEXT: add r3, r12, r3435; ARM6-NEXT: add r3, r3, #1436; ARM6-NEXT: bx lr437;438; ARM78-LABEL: vector_i128_i32:439; ARM78: @ %bb.0:440; ARM78-NEXT: vmov d17, r2, r3441; ARM78-NEXT: vmov d16, r0, r1442; ARM78-NEXT: mov r0, sp443; ARM78-NEXT: vmvn q8, q8444; ARM78-NEXT: vld1.64 {d18, d19}, [r0]445; ARM78-NEXT: vsub.i32 q8, q9, q8446; ARM78-NEXT: vmov r0, r1, d16447; ARM78-NEXT: vmov r2, r3, d17448; ARM78-NEXT: bx lr449;450; THUMB6-LABEL: vector_i128_i32:451; THUMB6: @ %bb.0:452; THUMB6-NEXT: push {r4, lr}453; THUMB6-NEXT: ldr r4, [sp, #8]454; THUMB6-NEXT: adds r0, r4, r0455; THUMB6-NEXT: adds r0, r0, #1456; THUMB6-NEXT: ldr r4, [sp, #12]457; THUMB6-NEXT: adds r1, r4, r1458; THUMB6-NEXT: adds r1, r1, #1459; THUMB6-NEXT: ldr r4, [sp, #16]460; THUMB6-NEXT: adds r2, r4, r2461; THUMB6-NEXT: adds r2, r2, #1462; THUMB6-NEXT: ldr r4, [sp, #20]463; THUMB6-NEXT: adds r3, r4, r3464; THUMB6-NEXT: adds r3, r3, #1465; THUMB6-NEXT: pop {r4, pc}466;467; THUMB78-LABEL: vector_i128_i32:468; THUMB78: @ %bb.0:469; THUMB78-NEXT: vmov d17, r2, r3470; THUMB78-NEXT: vmov d16, r0, r1471; THUMB78-NEXT: mov r0, sp472; THUMB78-NEXT: vmvn q8, q8473; THUMB78-NEXT: vld1.64 {d18, d19}, [r0]474; THUMB78-NEXT: vsub.i32 q8, q9, q8475; THUMB78-NEXT: vmov r0, r1, d16476; THUMB78-NEXT: vmov r2, r3, d17477; THUMB78-NEXT: bx lr478 %t0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>479 %t1 = sub <4 x i32> %y, %t0480 ret <4 x i32> %t1481}482 483define <2 x i64> @vector_i128_i64(<2 x i64> %x, <2 x i64> %y) nounwind {484; ARM6-LABEL: vector_i128_i64:485; ARM6: @ %bb.0:486; ARM6-NEXT: push {r11, lr}487; ARM6-NEXT: ldr lr, [sp, #8]488; ARM6-NEXT: ldr r12, [sp, #12]489; ARM6-NEXT: adds r0, lr, r0490; ARM6-NEXT: ldr lr, [sp, #16]491; ARM6-NEXT: adc r1, r12, r1492; ARM6-NEXT: adds r0, r0, #1493; ARM6-NEXT: ldr r12, [sp, #20]494; ARM6-NEXT: adc r1, r1, #0495; ARM6-NEXT: adds r2, lr, r2496; ARM6-NEXT: adc r3, r12, r3497; ARM6-NEXT: adds r2, r2, #1498; ARM6-NEXT: adc r3, r3, #0499; ARM6-NEXT: pop {r11, pc}500;501; ARM78-LABEL: vector_i128_i64:502; ARM78: @ %bb.0:503; ARM78-NEXT: vmov d17, r2, r3504; ARM78-NEXT: vmov d16, r0, r1505; ARM78-NEXT: mov r0, sp506; ARM78-NEXT: vmvn q8, q8507; ARM78-NEXT: vld1.64 {d18, d19}, [r0]508; ARM78-NEXT: vsub.i64 q8, q9, q8509; ARM78-NEXT: vmov r0, r1, d16510; ARM78-NEXT: vmov r2, r3, d17511; ARM78-NEXT: bx lr512;513; THUMB6-LABEL: vector_i128_i64:514; THUMB6: @ %bb.0:515; THUMB6-NEXT: push {r4, r5, r7, lr}516; THUMB6-NEXT: mvns r4, r1517; THUMB6-NEXT: mvns r0, r0518; THUMB6-NEXT: ldr r1, [sp, #20]519; THUMB6-NEXT: ldr r5, [sp, #16]520; THUMB6-NEXT: subs r0, r5, r0521; THUMB6-NEXT: sbcs r1, r4522; THUMB6-NEXT: mvns r4, r3523; THUMB6-NEXT: mvns r2, r2524; THUMB6-NEXT: ldr r3, [sp, #28]525; THUMB6-NEXT: ldr r5, [sp, #24]526; THUMB6-NEXT: subs r2, r5, r2527; THUMB6-NEXT: sbcs r3, r4528; THUMB6-NEXT: pop {r4, r5, r7, pc}529;530; THUMB78-LABEL: vector_i128_i64:531; THUMB78: @ %bb.0:532; THUMB78-NEXT: vmov d17, r2, r3533; THUMB78-NEXT: vmov d16, r0, r1534; THUMB78-NEXT: mov r0, sp535; THUMB78-NEXT: vmvn q8, q8536; THUMB78-NEXT: vld1.64 {d18, d19}, [r0]537; THUMB78-NEXT: vsub.i64 q8, q9, q8538; THUMB78-NEXT: vmov r0, r1, d16539; THUMB78-NEXT: vmov r2, r3, d17540; THUMB78-NEXT: bx lr541 %t0 = xor <2 x i64> %x, <i64 -1, i64 -1>542 %t1 = sub <2 x i64> %y, %t0543 ret <2 x i64> %t1544}545