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1; Tests for the two-address instruction pass.2; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -arm-atomic-cfg-tidy=0 %s -o - | FileCheck %s3 4define void @PR13378() nounwind {5; This was orriginally a crasher trying to schedule the instructions.6; CHECK-LABEL: PR13378:7; CHECK: vmov.i328; CHECK-NEXT: vld1.329; CHECK-NEXT: vst1.3210; CHECK-NEXT: vst1.3211; CHECK-NEXT: vmov.f3212; CHECK-NEXT: vmov.f3213; CHECK-NEXT: vst1.3214 15entry:16 %0 = load <4 x float>, ptr undef, align 417 store <4 x float> zeroinitializer, ptr undef, align 418 store <4 x float> %0, ptr undef, align 419 %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 320 store <4 x float> %1, ptr undef, align 421 unreachable22}23