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1; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA2; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52plus | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA3; RUN: llc < %s -mtriple=armv7m-eabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA4; RUN: llc < %s -mtriple=armv8m-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA5; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA6 7; Check we use AA during codegen, so can interleave these loads/stores.8 9; CHECK-LABEL: test10; USEAA: ldr11; USEAA: ldr12; USEAA: str13; USEAA: str14 15define void @test(ptr nocapture %a, ptr noalias nocapture %b) {16entry:17 %0 = load i32, ptr %a, align 418 %add = add nsw i32 %0, 1019 store i32 %add, ptr %a, align 420 %1 = load i32, ptr %b, align 421 %add2 = add nsw i32 %1, 2022 store i32 %add2, ptr %b, align 423 ret void24}25 26