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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple armv6-- -filetype asm -o - %s | FileCheck %s3 4define i32 @test1(i32 %x) {5; CHECK-LABEL: test1:6; CHECK: @ %bb.0:7; CHECK-NEXT: uxtb16 r0, r08; CHECK-NEXT: bx lr9 %tmp1 = and i32 %x, 1671193510 ret i32 %tmp111}12 13define i32 @test2(i32 %x) {14; CHECK-LABEL: test2:15; CHECK: @ %bb.0:16; CHECK-NEXT: uxtb16 r0, r0, ror #817; CHECK-NEXT: bx lr18 %tmp1 = lshr i32 %x, 819 %tmp2 = and i32 %tmp1, 1671193520 ret i32 %tmp221}22 23define i32 @test3(i32 %x) {24; CHECK-LABEL: test3:25; CHECK: @ %bb.0:26; CHECK-NEXT: uxtb16 r0, r0, ror #827; CHECK-NEXT: bx lr28 %tmp1 = lshr i32 %x, 829 %tmp2 = and i32 %tmp1, 1671193530 ret i32 %tmp231}32 33define i32 @test4(i32 %x) {34; CHECK-LABEL: test4:35; CHECK: @ %bb.0:36; CHECK-NEXT: uxtb16 r0, r0, ror #837; CHECK-NEXT: bx lr38 %tmp1 = lshr i32 %x, 839 %tmp6 = and i32 %tmp1, 1671193540 ret i32 %tmp641}42 43define i32 @test5(i32 %x) {44; CHECK-LABEL: test5:45; CHECK: @ %bb.0:46; CHECK-NEXT: uxtb16 r0, r0, ror #847; CHECK-NEXT: bx lr48 %tmp1 = lshr i32 %x, 849 %tmp2 = and i32 %tmp1, 1671193550 ret i32 %tmp251}52 53define i32 @test6(i32 %x) {54; CHECK-LABEL: test6:55; CHECK: @ %bb.0:56; CHECK-NEXT: uxtb16 r0, r0, ror #1657; CHECK-NEXT: bx lr58 %tmp1 = lshr i32 %x, 1659 %tmp2 = and i32 %tmp1, 25560 %tmp4 = shl i32 %x, 1661 %tmp5 = and i32 %tmp4, 1671168062 %tmp6 = or i32 %tmp2, %tmp563 ret i32 %tmp664}65 66define i32 @test7(i32 %x) {67; CHECK-LABEL: test7:68; CHECK: @ %bb.0:69; CHECK-NEXT: uxtb16 r0, r0, ror #1670; CHECK-NEXT: bx lr71 %tmp1 = lshr i32 %x, 1672 %tmp2 = and i32 %tmp1, 25573 %tmp4 = shl i32 %x, 1674 %tmp5 = and i32 %tmp4, 1671168075 %tmp6 = or i32 %tmp2, %tmp576 ret i32 %tmp677}78 79define i32 @test8(i32 %x) {80; CHECK-LABEL: test8:81; CHECK: @ %bb.0:82; CHECK-NEXT: uxtb16 r0, r0, ror #2483; CHECK-NEXT: bx lr84 %tmp1 = shl i32 %x, 885 %tmp2 = and i32 %tmp1, 1671168086 %tmp5 = lshr i32 %x, 2487 %tmp6 = or i32 %tmp2, %tmp588 ret i32 %tmp689}90 91define i32 @test9(i32 %x) {92; CHECK-LABEL: test9:93; CHECK: @ %bb.0:94; CHECK-NEXT: uxtb16 r0, r0, ror #2495; CHECK-NEXT: bx lr96 %tmp1 = lshr i32 %x, 2497 %tmp4 = shl i32 %x, 898 %tmp5 = and i32 %tmp4, 1671168099 %tmp6 = or i32 %tmp5, %tmp1100 ret i32 %tmp6101}102 103; FIXME: Failed to match uxtb16104define i32 @test10(i32 %p0) {105; CHECK-LABEL: test10:106; CHECK: @ %bb.0:107; CHECK-NEXT: mov r1, #248108; CHECK-NEXT: mov r2, #7109; CHECK-NEXT: orr r1, r1, #16252928110; CHECK-NEXT: orr r2, r2, #458752111; CHECK-NEXT: and r1, r1, r0, lsr #7112; CHECK-NEXT: and r0, r2, r0, lsr #12113; CHECK-NEXT: orr r0, r0, r1114; CHECK-NEXT: bx lr115 %tmp1 = lshr i32 %p0, 7116 %tmp2 = and i32 %tmp1, 16253176117 %tmp4 = lshr i32 %p0, 12118 %tmp5 = and i32 %tmp4, 458759119 %tmp7 = or i32 %tmp5, %tmp2120 ret i32 %tmp7121}122 123define i32 @test11(i32 %p0) {124; CHECK-LABEL: test11:125; CHECK: @ %bb.0:126; CHECK-NEXT: mov r1, #1127; CHECK-NEXT: and r0, r0, #3128; CHECK-NEXT: orr r1, r1, #65536129; CHECK-NEXT: lsl r0, r1, r0130; CHECK-NEXT: lsr r0, r0, #1131; CHECK-NEXT: uxtb16 r0, r0132; CHECK-NEXT: bx lr133 %p = and i32 %p0, 3134 %a = shl i32 65537, %p135 %b = lshr i32 %a, 1136 %tmp7 = and i32 %b, 458759137 ret i32 %tmp7138}139