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1; We currently estimate the cost of sext/zext/trunc v8(v16)i32 <-> v8(v16)i82; instructions as expensive. If lowering is improved the cost model needs to3; change.4; RUN: opt < %s -passes='print<cost-model>' -mtriple=arm-apple-ios6.0.0 -mcpu=cortex-a8 -disable-output 2>&1 | FileCheck %s --check-prefix=COST5%T0_5 = type <8 x i8>6%T1_5 = type <8 x i32>7; CHECK-LABEL: func_cvt5:8define void @func_cvt5(ptr %loadaddr, ptr %storeaddr) {9; CHECK: vmovl.s810; CHECK: vmovl.s1611; CHECK: vmovl.s1612 %v0 = load %T0_5, ptr %loadaddr13; COST: func_cvt514; COST: cost of 3 {{.*}} sext15 %r = sext %T0_5 %v0 to %T1_516 store %T1_5 %r, ptr %storeaddr17 ret void18}19;; We currently estimate the cost of this instruction as expensive. If lowering20;; is improved the cost needs to change.21%TA0_5 = type <8 x i8>22%TA1_5 = type <8 x i32>23; CHECK-LABEL: func_cvt1:24define void @func_cvt1(ptr %loadaddr, ptr %storeaddr) {25; CHECK: vmovl.u826; CHECK: vmovl.u1627; CHECK: vmovl.u1628 %v0 = load %TA0_5, ptr %loadaddr29; COST: func_cvt130; COST: cost of 3 {{.*}} zext31 %r = zext %TA0_5 %v0 to %TA1_532 store %TA1_5 %r, ptr %storeaddr33 ret void34}35 36%T0_51 = type <8 x i32>37%T1_51 = type <8 x i8>38; CHECK-LABEL: func_cvt51:39define void @func_cvt51(ptr %loadaddr, ptr %storeaddr) {40; CHECK: vmovn.i3241; CHECK: vmovn.i3242; CHECK: vmovn.i1643 %v0 = load %T0_51, ptr %loadaddr44; COST: func_cvt5145; COST: cost of 3 {{.*}} trunc46 %r = trunc %T0_51 %v0 to %T1_5147 store %T1_51 %r, ptr %storeaddr48 ret void49}50 51%TT0_5 = type <16 x i8>52%TT1_5 = type <16 x i32>53; CHECK-LABEL: func_cvt52:54define void @func_cvt52(ptr %loadaddr, ptr %storeaddr) {55; CHECK: vmovl.s1656; CHECK: vmovl.s1657; CHECK: vmovl.s1658; CHECK: vmovl.s1659 %v0 = load %TT0_5, ptr %loadaddr60; COST: func_cvt5261; COST: cost of 6 {{.*}} sext62 %r = sext %TT0_5 %v0 to %TT1_563 store %TT1_5 %r, ptr %storeaddr64 ret void65}66;; We currently estimate the cost of this instruction as expensive. If lowering67;; is improved the cost needs to change.68%TTA0_5 = type <16 x i8>69%TTA1_5 = type <16 x i32>70; CHECK-LABEL: func_cvt12:71define void @func_cvt12(ptr %loadaddr, ptr %storeaddr) {72; CHECK: vmovl.u1673; CHECK: vmovl.u1674; CHECK: vmovl.u1675; CHECK: vmovl.u1676 %v0 = load %TTA0_5, ptr %loadaddr77; COST: func_cvt1278; COST: cost of 6 {{.*}} zext79 %r = zext %TTA0_5 %v0 to %TTA1_580 store %TTA1_5 %r, ptr %storeaddr81 ret void82}83 84%TT0_51 = type <16 x i32>85%TT1_51 = type <16 x i8>86; CHECK-LABEL: func_cvt512:87define void @func_cvt512(ptr %loadaddr, ptr %storeaddr) {88; CHECK: vmovn.i3289; CHECK: vmovn.i3290; CHECK: vmovn.i3291; CHECK: vmovn.i3292; CHECK: vmovn.i1693; CHECK: vmovn.i1694 %v0 = load %TT0_51, ptr %loadaddr95; COST: func_cvt51296; COST: cost of 6 {{.*}} trunc97 %r = trunc %TT0_51 %v0 to %TT1_5198 store %TT1_51 %r, ptr %storeaddr99 ret void100}101 102; CHECK-LABEL: sext_v4i16_v4i64:103define void @sext_v4i16_v4i64(ptr %loadaddr, ptr %storeaddr) {104; CHECK: vmovl.s32105; CHECK: vmovl.s32106 %v0 = load <4 x i16>, ptr %loadaddr107; COST: sext_v4i16_v4i64108; COST: cost of 3 {{.*}} sext109 %r = sext <4 x i16> %v0 to <4 x i64>110 store <4 x i64> %r, ptr %storeaddr111 ret void112}113 114; CHECK-LABEL: zext_v4i16_v4i64:115define void @zext_v4i16_v4i64(ptr %loadaddr, ptr %storeaddr) {116; CHECK: vmovl.u32117; CHECK: vmovl.u32118 %v0 = load <4 x i16>, ptr %loadaddr119; COST: zext_v4i16_v4i64120; COST: cost of 3 {{.*}} zext121 %r = zext <4 x i16> %v0 to <4 x i64>122 store <4 x i64> %r, ptr %storeaddr123 ret void124}125 126; CHECK-LABEL: sext_v8i16_v8i64:127define void @sext_v8i16_v8i64(ptr %loadaddr, ptr %storeaddr) {128; CHECK: vmovl.s32129; CHECK: vmovl.s32130; CHECK: vmovl.s32131; CHECK: vmovl.s32132 %v0 = load <8 x i16>, ptr %loadaddr133; COST: sext_v8i16_v8i64134; COST: cost of 6 {{.*}} sext135 %r = sext <8 x i16> %v0 to <8 x i64>136 store <8 x i64> %r, ptr %storeaddr137 ret void138}139 140; CHECK-LABEL: zext_v8i16_v8i64:141define void @zext_v8i16_v8i64(ptr %loadaddr, ptr %storeaddr) {142; CHECK: vmovl.u32143; CHECK: vmovl.u32144; CHECK: vmovl.u32145; CHECK: vmovl.u32146 %v0 = load <8 x i16>, ptr %loadaddr147; COST: zext_v8i16_v8i64148; COST: cost of 6 {{.*}} zext149 %r = zext <8 x i16> %v0 to <8 x i64>150 store <8 x i64> %r, ptr %storeaddr151 ret void152}153 154