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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv7-none-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-LE3; RUN: llc < %s -mtriple=thumbebv7-none-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-BE4 5define void @store_v8i8(ptr %ptr, <8 x i8> %val) {6; CHECK-LABEL: store_v8i8:7; CHECK: @ %bb.0:8; CHECK-NEXT: ldr r0, [r0]9; CHECK-NEXT: str r3, [r0, #4]10; CHECK-NEXT: str r2, [r0]11; CHECK-NEXT: bx lr12 %A = load ptr, ptr %ptr13 store <8 x i8> %val, ptr %A, align 114 ret void15}16 17define void @store_v8i8_update(ptr %ptr, <8 x i8> %val) {18; CHECK-LE-LABEL: store_v8i8_update:19; CHECK-LE: @ %bb.0:20; CHECK-LE-NEXT: ldr r1, [r0]21; CHECK-LE-NEXT: vmov d16, r2, r322; CHECK-LE-NEXT: vst1.8 {d16}, [r1]!23; CHECK-LE-NEXT: str r1, [r0]24; CHECK-LE-NEXT: bx lr25;26; CHECK-BE-LABEL: store_v8i8_update:27; CHECK-BE: @ %bb.0:28; CHECK-BE-NEXT: vmov d16, r3, r229; CHECK-BE-NEXT: ldr r1, [r0]30; CHECK-BE-NEXT: vrev64.8 d16, d1631; CHECK-BE-NEXT: vst1.8 {d16}, [r1]!32; CHECK-BE-NEXT: str r1, [r0]33; CHECK-BE-NEXT: bx lr34 %A = load ptr, ptr %ptr35 store <8 x i8> %val, ptr %A, align 136 %inc = getelementptr <8 x i8>, ptr %A, i38 137 store ptr %inc, ptr %ptr38 ret void39}40 41define void @store_v4i16(ptr %ptr, <4 x i16> %val) {42; CHECK-LABEL: store_v4i16:43; CHECK: @ %bb.0:44; CHECK-NEXT: ldr r0, [r0]45; CHECK-NEXT: str r3, [r0, #4]46; CHECK-NEXT: str r2, [r0]47; CHECK-NEXT: bx lr48 %A = load ptr, ptr %ptr49 store <4 x i16> %val, ptr %A, align 150 ret void51}52 53define void @store_v4i16_update(ptr %ptr, <4 x i16> %val) {54; CHECK-LE-LABEL: store_v4i16_update:55; CHECK-LE: @ %bb.0:56; CHECK-LE-NEXT: ldr r1, [r0]57; CHECK-LE-NEXT: vmov d16, r2, r358; CHECK-LE-NEXT: vst1.8 {d16}, [r1]!59; CHECK-LE-NEXT: str r1, [r0]60; CHECK-LE-NEXT: bx lr61;62; CHECK-BE-LABEL: store_v4i16_update:63; CHECK-BE: @ %bb.0:64; CHECK-BE-NEXT: vmov d16, r3, r265; CHECK-BE-NEXT: ldr r1, [r0]66; CHECK-BE-NEXT: vrev64.8 d16, d1667; CHECK-BE-NEXT: vst1.8 {d16}, [r1]!68; CHECK-BE-NEXT: str r1, [r0]69; CHECK-BE-NEXT: bx lr70 %A = load ptr, ptr %ptr71 store <4 x i16> %val, ptr %A, align 172 %inc = getelementptr <4 x i16>, ptr %A, i34 173 store ptr %inc, ptr %ptr74 ret void75}76 77define void @store_v2i32(ptr %ptr, <2 x i32> %val) {78; CHECK-LABEL: store_v2i32:79; CHECK: @ %bb.0:80; CHECK-NEXT: ldr r0, [r0]81; CHECK-NEXT: str r3, [r0, #4]82; CHECK-NEXT: str r2, [r0]83; CHECK-NEXT: bx lr84 %A = load ptr, ptr %ptr85 store <2 x i32> %val, ptr %A, align 186 ret void87}88 89define void @store_v2i32_update(ptr %ptr, <2 x i32> %val) {90; CHECK-LE-LABEL: store_v2i32_update:91; CHECK-LE: @ %bb.0:92; CHECK-LE-NEXT: ldr r1, [r0]93; CHECK-LE-NEXT: vmov d16, r2, r394; CHECK-LE-NEXT: vst1.8 {d16}, [r1]!95; CHECK-LE-NEXT: str r1, [r0]96; CHECK-LE-NEXT: bx lr97;98; CHECK-BE-LABEL: store_v2i32_update:99; CHECK-BE: @ %bb.0:100; CHECK-BE-NEXT: vmov d16, r3, r2101; CHECK-BE-NEXT: ldr r1, [r0]102; CHECK-BE-NEXT: vrev64.8 d16, d16103; CHECK-BE-NEXT: vst1.8 {d16}, [r1]!104; CHECK-BE-NEXT: str r1, [r0]105; CHECK-BE-NEXT: bx lr106 %A = load ptr, ptr %ptr107 store <2 x i32> %val, ptr %A, align 1108 %inc = getelementptr <2 x i32>, ptr %A, i32 1109 store ptr %inc, ptr %ptr110 ret void111}112 113define void @store_v2f32(ptr %ptr, <2 x float> %val) {114; CHECK-LABEL: store_v2f32:115; CHECK: @ %bb.0:116; CHECK-NEXT: ldr r0, [r0]117; CHECK-NEXT: str r3, [r0, #4]118; CHECK-NEXT: str r2, [r0]119; CHECK-NEXT: bx lr120 %A = load ptr, ptr %ptr121 store <2 x float> %val, ptr %A, align 1122 ret void123}124 125define void @store_v2f32_update(ptr %ptr, <2 x float> %val) {126; CHECK-LE-LABEL: store_v2f32_update:127; CHECK-LE: @ %bb.0:128; CHECK-LE-NEXT: ldr r1, [r0]129; CHECK-LE-NEXT: vmov d16, r2, r3130; CHECK-LE-NEXT: vst1.8 {d16}, [r1]!131; CHECK-LE-NEXT: str r1, [r0]132; CHECK-LE-NEXT: bx lr133;134; CHECK-BE-LABEL: store_v2f32_update:135; CHECK-BE: @ %bb.0:136; CHECK-BE-NEXT: vmov d16, r3, r2137; CHECK-BE-NEXT: ldr r1, [r0]138; CHECK-BE-NEXT: vrev64.8 d16, d16139; CHECK-BE-NEXT: vst1.8 {d16}, [r1]!140; CHECK-BE-NEXT: str r1, [r0]141; CHECK-BE-NEXT: bx lr142 %A = load ptr, ptr %ptr143 store <2 x float> %val, ptr %A, align 1144 %inc = getelementptr <2 x float>, ptr %A, i32 1145 store ptr %inc, ptr %ptr146 ret void147}148 149define void @store_v1i64(ptr %ptr, <1 x i64> %val) {150; CHECK-LABEL: store_v1i64:151; CHECK: @ %bb.0:152; CHECK-NEXT: ldr r0, [r0]153; CHECK-NEXT: str r3, [r0, #4]154; CHECK-NEXT: str r2, [r0]155; CHECK-NEXT: bx lr156 %A = load ptr, ptr %ptr157 store <1 x i64> %val, ptr %A, align 1158 ret void159}160 161define void @store_v1i64_update(ptr %ptr, <1 x i64> %val) {162; CHECK-LE-LABEL: store_v1i64_update:163; CHECK-LE: @ %bb.0:164; CHECK-LE-NEXT: ldr r1, [r0]165; CHECK-LE-NEXT: vmov d16, r2, r3166; CHECK-LE-NEXT: vst1.8 {d16}, [r1]!167; CHECK-LE-NEXT: str r1, [r0]168; CHECK-LE-NEXT: bx lr169;170; CHECK-BE-LABEL: store_v1i64_update:171; CHECK-BE: @ %bb.0:172; CHECK-BE-NEXT: vmov d16, r3, r2173; CHECK-BE-NEXT: ldr r1, [r0]174; CHECK-BE-NEXT: vrev64.8 d16, d16175; CHECK-BE-NEXT: vst1.8 {d16}, [r1]!176; CHECK-BE-NEXT: str r1, [r0]177; CHECK-BE-NEXT: bx lr178 %A = load ptr, ptr %ptr179 store <1 x i64> %val, ptr %A, align 1180 %inc = getelementptr <1 x i64>, ptr %A, i31 1181 store ptr %inc, ptr %ptr182 ret void183}184 185define void @store_v16i8(ptr %ptr, <16 x i8> %val) {186; CHECK-LE-LABEL: store_v16i8:187; CHECK-LE: @ %bb.0:188; CHECK-LE-NEXT: vldr d17, [sp]189; CHECK-LE-NEXT: ldr r0, [r0]190; CHECK-LE-NEXT: vmov d16, r2, r3191; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r0]192; CHECK-LE-NEXT: bx lr193;194; CHECK-BE-LABEL: store_v16i8:195; CHECK-BE: @ %bb.0:196; CHECK-BE-NEXT: vldr d17, [sp]197; CHECK-BE-NEXT: vmov d16, r3, r2198; CHECK-BE-NEXT: ldr r0, [r0]199; CHECK-BE-NEXT: vrev64.8 q8, q8200; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r0]201; CHECK-BE-NEXT: bx lr202 %A = load ptr, ptr %ptr203 store <16 x i8> %val, ptr %A, align 1204 ret void205}206 207define void @store_v16i8_update(ptr %ptr, <16 x i8> %val) {208; CHECK-LE-LABEL: store_v16i8_update:209; CHECK-LE: @ %bb.0:210; CHECK-LE-NEXT: vldr d17, [sp]211; CHECK-LE-NEXT: vmov d16, r2, r3212; CHECK-LE-NEXT: ldr r1, [r0]213; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r1]!214; CHECK-LE-NEXT: str r1, [r0]215; CHECK-LE-NEXT: bx lr216;217; CHECK-BE-LABEL: store_v16i8_update:218; CHECK-BE: @ %bb.0:219; CHECK-BE-NEXT: vldr d17, [sp]220; CHECK-BE-NEXT: vmov d16, r3, r2221; CHECK-BE-NEXT: ldr r1, [r0]222; CHECK-BE-NEXT: vrev64.8 q8, q8223; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r1]!224; CHECK-BE-NEXT: str r1, [r0]225; CHECK-BE-NEXT: bx lr226 %A = load ptr, ptr %ptr227 store <16 x i8> %val, ptr %A, align 1228 %inc = getelementptr <16 x i8>, ptr %A, i316 1229 store ptr %inc, ptr %ptr230 ret void231}232 233define void @store_v8i16(ptr %ptr, <8 x i16> %val) {234; CHECK-LE-LABEL: store_v8i16:235; CHECK-LE: @ %bb.0:236; CHECK-LE-NEXT: vldr d17, [sp]237; CHECK-LE-NEXT: ldr r0, [r0]238; CHECK-LE-NEXT: vmov d16, r2, r3239; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r0]240; CHECK-LE-NEXT: bx lr241;242; CHECK-BE-LABEL: store_v8i16:243; CHECK-BE: @ %bb.0:244; CHECK-BE-NEXT: vldr d17, [sp]245; CHECK-BE-NEXT: vmov d16, r3, r2246; CHECK-BE-NEXT: ldr r0, [r0]247; CHECK-BE-NEXT: vrev64.8 q8, q8248; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r0]249; CHECK-BE-NEXT: bx lr250 %A = load ptr, ptr %ptr251 store <8 x i16> %val, ptr %A, align 1252 ret void253}254 255define void @store_v8i16_update(ptr %ptr, <8 x i16> %val) {256; CHECK-LE-LABEL: store_v8i16_update:257; CHECK-LE: @ %bb.0:258; CHECK-LE-NEXT: vldr d17, [sp]259; CHECK-LE-NEXT: vmov d16, r2, r3260; CHECK-LE-NEXT: ldr r1, [r0]261; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r1]!262; CHECK-LE-NEXT: str r1, [r0]263; CHECK-LE-NEXT: bx lr264;265; CHECK-BE-LABEL: store_v8i16_update:266; CHECK-BE: @ %bb.0:267; CHECK-BE-NEXT: vldr d17, [sp]268; CHECK-BE-NEXT: vmov d16, r3, r2269; CHECK-BE-NEXT: ldr r1, [r0]270; CHECK-BE-NEXT: vrev64.8 q8, q8271; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r1]!272; CHECK-BE-NEXT: str r1, [r0]273; CHECK-BE-NEXT: bx lr274 %A = load ptr, ptr %ptr275 store <8 x i16> %val, ptr %A, align 1276 %inc = getelementptr <8 x i16>, ptr %A, i38 1277 store ptr %inc, ptr %ptr278 ret void279}280 281define void @store_v4i32(ptr %ptr, <4 x i32> %val) {282; CHECK-LE-LABEL: store_v4i32:283; CHECK-LE: @ %bb.0:284; CHECK-LE-NEXT: vldr d17, [sp]285; CHECK-LE-NEXT: ldr r0, [r0]286; CHECK-LE-NEXT: vmov d16, r2, r3287; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r0]288; CHECK-LE-NEXT: bx lr289;290; CHECK-BE-LABEL: store_v4i32:291; CHECK-BE: @ %bb.0:292; CHECK-BE-NEXT: vldr d17, [sp]293; CHECK-BE-NEXT: vmov d16, r3, r2294; CHECK-BE-NEXT: ldr r0, [r0]295; CHECK-BE-NEXT: vrev64.8 q8, q8296; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r0]297; CHECK-BE-NEXT: bx lr298 %A = load ptr, ptr %ptr299 store <4 x i32> %val, ptr %A, align 1300 ret void301}302 303define void @store_v4i32_update(ptr %ptr, <4 x i32> %val) {304; CHECK-LE-LABEL: store_v4i32_update:305; CHECK-LE: @ %bb.0:306; CHECK-LE-NEXT: vldr d17, [sp]307; CHECK-LE-NEXT: vmov d16, r2, r3308; CHECK-LE-NEXT: ldr r1, [r0]309; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r1]!310; CHECK-LE-NEXT: str r1, [r0]311; CHECK-LE-NEXT: bx lr312;313; CHECK-BE-LABEL: store_v4i32_update:314; CHECK-BE: @ %bb.0:315; CHECK-BE-NEXT: vldr d17, [sp]316; CHECK-BE-NEXT: vmov d16, r3, r2317; CHECK-BE-NEXT: ldr r1, [r0]318; CHECK-BE-NEXT: vrev64.8 q8, q8319; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r1]!320; CHECK-BE-NEXT: str r1, [r0]321; CHECK-BE-NEXT: bx lr322 %A = load ptr, ptr %ptr323 store <4 x i32> %val, ptr %A, align 1324 %inc = getelementptr <4 x i32>, ptr %A, i34 1325 store ptr %inc, ptr %ptr326 ret void327}328 329define void @store_v4f32(ptr %ptr, <4 x float> %val) {330; CHECK-LE-LABEL: store_v4f32:331; CHECK-LE: @ %bb.0:332; CHECK-LE-NEXT: vldr d17, [sp]333; CHECK-LE-NEXT: ldr r0, [r0]334; CHECK-LE-NEXT: vmov d16, r2, r3335; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r0]336; CHECK-LE-NEXT: bx lr337;338; CHECK-BE-LABEL: store_v4f32:339; CHECK-BE: @ %bb.0:340; CHECK-BE-NEXT: vldr d17, [sp]341; CHECK-BE-NEXT: vmov d16, r3, r2342; CHECK-BE-NEXT: ldr r0, [r0]343; CHECK-BE-NEXT: vrev64.8 q8, q8344; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r0]345; CHECK-BE-NEXT: bx lr346 %A = load ptr, ptr %ptr347 store <4 x float> %val, ptr %A, align 1348 ret void349}350 351define void @store_v4f32_update(ptr %ptr, <4 x float> %val) {352; CHECK-LE-LABEL: store_v4f32_update:353; CHECK-LE: @ %bb.0:354; CHECK-LE-NEXT: vldr d17, [sp]355; CHECK-LE-NEXT: vmov d16, r2, r3356; CHECK-LE-NEXT: ldr r1, [r0]357; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r1]!358; CHECK-LE-NEXT: str r1, [r0]359; CHECK-LE-NEXT: bx lr360;361; CHECK-BE-LABEL: store_v4f32_update:362; CHECK-BE: @ %bb.0:363; CHECK-BE-NEXT: vldr d17, [sp]364; CHECK-BE-NEXT: vmov d16, r3, r2365; CHECK-BE-NEXT: ldr r1, [r0]366; CHECK-BE-NEXT: vrev64.8 q8, q8367; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r1]!368; CHECK-BE-NEXT: str r1, [r0]369; CHECK-BE-NEXT: bx lr370 %A = load ptr, ptr %ptr371 store <4 x float> %val, ptr %A, align 1372 %inc = getelementptr <4 x float>, ptr %A, i34 1373 store ptr %inc, ptr %ptr374 ret void375}376 377define void @store_v2i64(ptr %ptr, <2 x i64> %val) {378; CHECK-LE-LABEL: store_v2i64:379; CHECK-LE: @ %bb.0:380; CHECK-LE-NEXT: vldr d17, [sp]381; CHECK-LE-NEXT: ldr r0, [r0]382; CHECK-LE-NEXT: vmov d16, r2, r3383; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r0]384; CHECK-LE-NEXT: bx lr385;386; CHECK-BE-LABEL: store_v2i64:387; CHECK-BE: @ %bb.0:388; CHECK-BE-NEXT: vldr d17, [sp]389; CHECK-BE-NEXT: vmov d16, r3, r2390; CHECK-BE-NEXT: ldr r0, [r0]391; CHECK-BE-NEXT: vrev64.8 q8, q8392; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r0]393; CHECK-BE-NEXT: bx lr394 %A = load ptr, ptr %ptr395 store <2 x i64> %val, ptr %A, align 1396 ret void397}398 399define void @store_v2i64_update(ptr %ptr, <2 x i64> %val) {400; CHECK-LE-LABEL: store_v2i64_update:401; CHECK-LE: @ %bb.0:402; CHECK-LE-NEXT: vldr d17, [sp]403; CHECK-LE-NEXT: vmov d16, r2, r3404; CHECK-LE-NEXT: ldr r1, [r0]405; CHECK-LE-NEXT: vst1.8 {d16, d17}, [r1]!406; CHECK-LE-NEXT: str r1, [r0]407; CHECK-LE-NEXT: bx lr408;409; CHECK-BE-LABEL: store_v2i64_update:410; CHECK-BE: @ %bb.0:411; CHECK-BE-NEXT: vldr d17, [sp]412; CHECK-BE-NEXT: vmov d16, r3, r2413; CHECK-BE-NEXT: ldr r1, [r0]414; CHECK-BE-NEXT: vrev64.8 q8, q8415; CHECK-BE-NEXT: vst1.8 {d16, d17}, [r1]!416; CHECK-BE-NEXT: str r1, [r0]417; CHECK-BE-NEXT: bx lr418 %A = load ptr, ptr %ptr419 store <2 x i64> %val, ptr %A, align 1420 %inc = getelementptr <2 x i64>, ptr %A, i32 1421 store ptr %inc, ptr %ptr422 ret void423}424 425define void @store_v2i64_update_aligned2(ptr %ptr, <2 x i64> %val) {426; CHECK-LE-LABEL: store_v2i64_update_aligned2:427; CHECK-LE: @ %bb.0:428; CHECK-LE-NEXT: vldr d17, [sp]429; CHECK-LE-NEXT: vmov d16, r2, r3430; CHECK-LE-NEXT: ldr r1, [r0]431; CHECK-LE-NEXT: vst1.16 {d16, d17}, [r1]!432; CHECK-LE-NEXT: str r1, [r0]433; CHECK-LE-NEXT: bx lr434;435; CHECK-BE-LABEL: store_v2i64_update_aligned2:436; CHECK-BE: @ %bb.0:437; CHECK-BE-NEXT: vldr d17, [sp]438; CHECK-BE-NEXT: vmov d16, r3, r2439; CHECK-BE-NEXT: ldr r1, [r0]440; CHECK-BE-NEXT: vrev64.16 q8, q8441; CHECK-BE-NEXT: vst1.16 {d16, d17}, [r1]!442; CHECK-BE-NEXT: str r1, [r0]443; CHECK-BE-NEXT: bx lr444 %A = load ptr, ptr %ptr445 store <2 x i64> %val, ptr %A, align 2446 %inc = getelementptr <2 x i64>, ptr %A, i32 1447 store ptr %inc, ptr %ptr448 ret void449}450 451define void @store_v2i64_update_aligned4(ptr %ptr, <2 x i64> %val) {452; CHECK-LE-LABEL: store_v2i64_update_aligned4:453; CHECK-LE: @ %bb.0:454; CHECK-LE-NEXT: vldr d17, [sp]455; CHECK-LE-NEXT: vmov d16, r2, r3456; CHECK-LE-NEXT: ldr r1, [r0]457; CHECK-LE-NEXT: vst1.32 {d16, d17}, [r1]!458; CHECK-LE-NEXT: str r1, [r0]459; CHECK-LE-NEXT: bx lr460;461; CHECK-BE-LABEL: store_v2i64_update_aligned4:462; CHECK-BE: @ %bb.0:463; CHECK-BE-NEXT: vldr d17, [sp]464; CHECK-BE-NEXT: vmov d16, r3, r2465; CHECK-BE-NEXT: ldr r1, [r0]466; CHECK-BE-NEXT: vrev64.32 q8, q8467; CHECK-BE-NEXT: vst1.32 {d16, d17}, [r1]!468; CHECK-BE-NEXT: str r1, [r0]469; CHECK-BE-NEXT: bx lr470 %A = load ptr, ptr %ptr471 store <2 x i64> %val, ptr %A, align 4472 %inc = getelementptr <2 x i64>, ptr %A, i32 1473 store ptr %inc, ptr %ptr474 ret void475}476 477define void @store_v2i64_update_aligned8(ptr %ptr, <2 x i64> %val) {478; CHECK-LE-LABEL: store_v2i64_update_aligned8:479; CHECK-LE: @ %bb.0:480; CHECK-LE-NEXT: vldr d17, [sp]481; CHECK-LE-NEXT: vmov d16, r2, r3482; CHECK-LE-NEXT: ldr r1, [r0]483; CHECK-LE-NEXT: vst1.64 {d16, d17}, [r1]!484; CHECK-LE-NEXT: str r1, [r0]485; CHECK-LE-NEXT: bx lr486;487; CHECK-BE-LABEL: store_v2i64_update_aligned8:488; CHECK-BE: @ %bb.0:489; CHECK-BE-NEXT: vldr d17, [sp]490; CHECK-BE-NEXT: vmov d16, r3, r2491; CHECK-BE-NEXT: ldr r1, [r0]492; CHECK-BE-NEXT: vst1.64 {d16, d17}, [r1]!493; CHECK-BE-NEXT: str r1, [r0]494; CHECK-BE-NEXT: bx lr495 %A = load ptr, ptr %ptr496 store <2 x i64> %val, ptr %A, align 8497 %inc = getelementptr <2 x i64>, ptr %A, i32 1498 store ptr %inc, ptr %ptr499 ret void500}501 502define void @store_v2i64_update_aligned16(ptr %ptr, <2 x i64> %val) {503; CHECK-LE-LABEL: store_v2i64_update_aligned16:504; CHECK-LE: @ %bb.0:505; CHECK-LE-NEXT: vldr d17, [sp]506; CHECK-LE-NEXT: vmov d16, r2, r3507; CHECK-LE-NEXT: ldr r1, [r0]508; CHECK-LE-NEXT: vst1.64 {d16, d17}, [r1:128]!509; CHECK-LE-NEXT: str r1, [r0]510; CHECK-LE-NEXT: bx lr511;512; CHECK-BE-LABEL: store_v2i64_update_aligned16:513; CHECK-BE: @ %bb.0:514; CHECK-BE-NEXT: vldr d17, [sp]515; CHECK-BE-NEXT: vmov d16, r3, r2516; CHECK-BE-NEXT: ldr r1, [r0]517; CHECK-BE-NEXT: vst1.64 {d16, d17}, [r1:128]!518; CHECK-BE-NEXT: str r1, [r0]519; CHECK-BE-NEXT: bx lr520 %A = load ptr, ptr %ptr521 store <2 x i64> %val, ptr %A, align 16522 %inc = getelementptr <2 x i64>, ptr %A, i32 1523 store ptr %inc, ptr %ptr524 ret void525}526 527define void @truncstore_v4i32tov4i8(ptr %ptr, <4 x i32> %val) {528; CHECK-LE-LABEL: truncstore_v4i32tov4i8:529; CHECK-LE: @ %bb.0:530; CHECK-LE-NEXT: vldr d17, [sp]531; CHECK-LE-NEXT: vmov d16, r2, r3532; CHECK-LE-NEXT: ldr r0, [r0]533; CHECK-LE-NEXT: vmovn.i32 d16, q8534; CHECK-LE-NEXT: vuzp.8 d16, d17535; CHECK-LE-NEXT: vst1.32 {d16[0]}, [r0:32]536; CHECK-LE-NEXT: bx lr537;538; CHECK-BE-LABEL: truncstore_v4i32tov4i8:539; CHECK-BE: @ %bb.0:540; CHECK-BE-NEXT: vldr d17, [sp]541; CHECK-BE-NEXT: vmov d16, r3, r2542; CHECK-BE-NEXT: vrev64.32 q8, q8543; CHECK-BE-NEXT: vmovn.i32 d16, q8544; CHECK-BE-NEXT: vrev16.8 d16, d16545; CHECK-BE-NEXT: vuzp.8 d16, d17546; CHECK-BE-NEXT: ldr r0, [r0]547; CHECK-BE-NEXT: vrev32.8 d16, d17548; CHECK-BE-NEXT: vst1.32 {d16[0]}, [r0:32]549; CHECK-BE-NEXT: bx lr550 %A = load ptr, ptr %ptr551 %trunc = trunc <4 x i32> %val to <4 x i8>552 store <4 x i8> %trunc, ptr %A, align 4553 ret void554}555 556define void @truncstore_v4i32tov4i8_fake_update(ptr %ptr, <4 x i32> %val) {557; CHECK-LE-LABEL: truncstore_v4i32tov4i8_fake_update:558; CHECK-LE: @ %bb.0:559; CHECK-LE-NEXT: vldr d17, [sp]560; CHECK-LE-NEXT: vmov d16, r2, r3561; CHECK-LE-NEXT: ldr r1, [r0]562; CHECK-LE-NEXT: movs r2, #16563; CHECK-LE-NEXT: vmovn.i32 d16, q8564; CHECK-LE-NEXT: vuzp.8 d16, d17565; CHECK-LE-NEXT: vst1.32 {d16[0]}, [r1:32], r2566; CHECK-LE-NEXT: str r1, [r0]567; CHECK-LE-NEXT: bx lr568;569; CHECK-BE-LABEL: truncstore_v4i32tov4i8_fake_update:570; CHECK-BE: @ %bb.0:571; CHECK-BE-NEXT: vldr d17, [sp]572; CHECK-BE-NEXT: vmov d16, r3, r2573; CHECK-BE-NEXT: movs r2, #16574; CHECK-BE-NEXT: vrev64.32 q8, q8575; CHECK-BE-NEXT: vmovn.i32 d16, q8576; CHECK-BE-NEXT: vrev16.8 d16, d16577; CHECK-BE-NEXT: vuzp.8 d16, d17578; CHECK-BE-NEXT: ldr r1, [r0]579; CHECK-BE-NEXT: vrev32.8 d16, d17580; CHECK-BE-NEXT: vst1.32 {d16[0]}, [r1:32], r2581; CHECK-BE-NEXT: str r1, [r0]582; CHECK-BE-NEXT: bx lr583 %A = load ptr, ptr %ptr584 %trunc = trunc <4 x i32> %val to <4 x i8>585 store <4 x i8> %trunc, ptr %A, align 4586 %inc = getelementptr <4 x i8>, ptr %A, i38 4587 store ptr %inc, ptr %ptr588 ret void589}590 591define ptr @test_vst1_1reg(ptr %ptr.in, ptr %ptr.out) {592; CHECK-LE-LABEL: test_vst1_1reg:593; CHECK-LE: @ %bb.0:594; CHECK-LE-NEXT: vld1.64 {d16, d17}, [r0]595; CHECK-LE-NEXT: movs r0, #32596; CHECK-LE-NEXT: vst1.32 {d16, d17}, [r1], r0597; CHECK-LE-NEXT: mov r0, r1598; CHECK-LE-NEXT: bx lr599;600; CHECK-BE-LABEL: test_vst1_1reg:601; CHECK-BE: @ %bb.0:602; CHECK-BE-NEXT: vld1.64 {d16, d17}, [r0]603; CHECK-BE-NEXT: movs r0, #32604; CHECK-BE-NEXT: vrev64.32 q8, q8605; CHECK-BE-NEXT: vst1.32 {d16, d17}, [r1], r0606; CHECK-BE-NEXT: mov r0, r1607; CHECK-BE-NEXT: bx lr608 %val = load <4 x i32>, ptr %ptr.in609 store <4 x i32> %val, ptr %ptr.out610 %next = getelementptr <4 x i32>, ptr %ptr.out, i32 2611 ret ptr %next612}613 614; PR56970615define void @v3i8store(ptr %p) {616; CHECK-LE-LABEL: v3i8store:617; CHECK-LE: @ %bb.0:618; CHECK-LE-NEXT: .pad #4619; CHECK-LE-NEXT: sub sp, #4620; CHECK-LE-NEXT: movs r1, #0621; CHECK-LE-NEXT: mov r2, sp622; CHECK-LE-NEXT: str r1, [sp]623; CHECK-LE-NEXT: vld1.32 {d16[0]}, [r2:32]624; CHECK-LE-NEXT: strb r1, [r0, #2]625; CHECK-LE-NEXT: vmovl.u16 q8, d16626; CHECK-LE-NEXT: vmov.32 r2, d16[0]627; CHECK-LE-NEXT: strh r2, [r0]628; CHECK-LE-NEXT: add sp, #4629; CHECK-LE-NEXT: bx lr630;631; CHECK-BE-LABEL: v3i8store:632; CHECK-BE: @ %bb.0:633; CHECK-BE-NEXT: .pad #4634; CHECK-BE-NEXT: sub sp, #4635; CHECK-BE-NEXT: movs r1, #0636; CHECK-BE-NEXT: mov r2, sp637; CHECK-BE-NEXT: str r1, [sp]638; CHECK-BE-NEXT: vld1.32 {d16[0]}, [r2:32]639; CHECK-BE-NEXT: strb r1, [r0, #2]640; CHECK-BE-NEXT: vrev32.16 d16, d16641; CHECK-BE-NEXT: vmovl.u16 q8, d16642; CHECK-BE-NEXT: vmov.32 r2, d16[0]643; CHECK-BE-NEXT: strh r2, [r0]644; CHECK-BE-NEXT: add sp, #4645; CHECK-BE-NEXT: bx lr646 store <3 x i8> zeroinitializer, ptr %p, align 4647 ret void648}649 650define void @v3i64shuffle(ptr %p, <3 x i64> %a) {651; CHECK-LE-LABEL: v3i64shuffle:652; CHECK-LE: @ %bb.0:653; CHECK-LE-NEXT: vmov.i32 q8, #0x0654; CHECK-LE-NEXT: ldrd r12, r1, [sp, #8]655; CHECK-LE-NEXT: vmov d18, r2, r3656; CHECK-LE-NEXT: vorr d19, d16, d16657; CHECK-LE-NEXT: str r1, [r0, #20]658; CHECK-LE-NEXT: vst1.32 {d18, d19}, [r0]!659; CHECK-LE-NEXT: str.w r12, [r0]660; CHECK-LE-NEXT: bx lr661;662; CHECK-BE-LABEL: v3i64shuffle:663; CHECK-BE: @ %bb.0:664; CHECK-BE-NEXT: vldr d16, [sp, #8]665; CHECK-BE-NEXT: vmov.i32 q9, #0x0666; CHECK-BE-NEXT: vrev64.32 q8, q8667; CHECK-BE-NEXT: vmov r12, r1, d16668; CHECK-BE-NEXT: vmov d16, r3, r2669; CHECK-BE-NEXT: vorr d17, d18, d18670; CHECK-BE-NEXT: vrev64.32 q8, q8671; CHECK-BE-NEXT: str r1, [r0, #20]672; CHECK-BE-NEXT: vst1.32 {d16, d17}, [r0]!673; CHECK-BE-NEXT: str.w r12, [r0]674; CHECK-BE-NEXT: bx lr675 %b = shufflevector <3 x i64> %a, <3 x i64> zeroinitializer, <3 x i32> <i32 0, i32 3, i32 2>676 store <3 x i64> %b, ptr %p, align 4677 ret void678}679 680