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1; RUN: llc < %s -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s2 3target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32-S64"4 5; This test used to test vector spilling using vstmia/vldmia instructions, but6; the changes for PR:18825 prevent that spilling.7 8; VST1 and VLD1 are now used for spilling/restoring.9;10; TODO:11; I think more vldm should be generated, initial ones are used to load some12; elements and then a sequence of vldr are used:13; vldr d15, [r1, #104]14; vldr d13, [r2, #96]15; vldr d9, [r1, #120]16; vldr d11, [r2, #112]17; vldr d14, [r1, #96]18; vldr d12, [r2, #88]19; vldr d8, [r1, #112]20; vldr d10, [r2, #104]21 22; Also this patterns repeats several times which certainly seems like a vld1.6423; should be used to load the data:24; vldr d16, [r1, #16]25; vldr d17, [r1, #24]26; vst1.64 {d16, d17}, [lr:128] @ 16-byte Spill27 28; CHECK: test:29; CHECK: vldmia r{{.*}}, {d{{.*}}, d{{.*}}}30; CHECK: vldmia r{{.*}}, {d{{.*}}, d{{.*}}}31define <16 x i64> @test(ptr %src0, ptr %src1) #0 {32entry:33 %el.0 = load i64, ptr %src0, align 834 %addr.1 = getelementptr inbounds i64, ptr %src0, i32 135 %el.1 = load i64, ptr %addr.1, align 836 %addr.2 = getelementptr inbounds i64, ptr %src0, i32 237 %el.2 = load i64, ptr %addr.2, align 838 %addr.3 = getelementptr inbounds i64, ptr %src0, i32 339 %el.3 = load i64, ptr %addr.3, align 840 %addr.4 = getelementptr inbounds i64, ptr %src0, i32 441 %el.4 = load i64, ptr %addr.4, align 842 %addr.5 = getelementptr inbounds i64, ptr %src0, i32 543 %el.5 = load i64, ptr %addr.5, align 844 %addr.6 = getelementptr inbounds i64, ptr %src0, i32 645 %el.6 = load i64, ptr %addr.6, align 846 %addr.7 = getelementptr inbounds i64, ptr %src0, i32 747 %el.7 = load i64, ptr %addr.7, align 848 %addr.8 = getelementptr inbounds i64, ptr %src0, i32 849 %el.8 = load i64, ptr %addr.8, align 850 %addr.9 = getelementptr inbounds i64, ptr %src0, i32 951 %el.9 = load i64, ptr %addr.9, align 852 %addr.10 = getelementptr inbounds i64, ptr %src0, i32 1053 %el.10 = load i64, ptr %addr.10, align 854 %addr.11 = getelementptr inbounds i64, ptr %src0, i32 1155 %el.11 = load i64, ptr %addr.11, align 856 %addr.12 = getelementptr inbounds i64, ptr %src0, i32 1257 %el.12 = load i64, ptr %addr.12, align 858 %addr.13 = getelementptr inbounds i64, ptr %src0, i32 1359 %el.13 = load i64, ptr %addr.13, align 860 %addr.14 = getelementptr inbounds i64, ptr %src0, i32 1461 %el.14 = load i64, ptr %addr.14, align 862 %addr.15 = getelementptr inbounds i64, ptr %src0, i32 1563 %el.15 = load i64, ptr %addr.15, align 864 65 %el.0.1 = load i64, ptr %src1, align 866 %addr.1.1 = getelementptr inbounds i64, ptr %src1, i32 167 %el.1.1 = load i64, ptr %addr.1.1, align 868 %addr.2.1 = getelementptr inbounds i64, ptr %src1, i32 269 %el.2.1 = load i64, ptr %addr.2.1, align 870 %addr.3.1 = getelementptr inbounds i64, ptr %src1, i32 371 %el.3.1 = load i64, ptr %addr.3.1, align 872 %addr.4.1 = getelementptr inbounds i64, ptr %src1, i32 473 %el.4.1 = load i64, ptr %addr.4.1, align 874 %addr.5.1 = getelementptr inbounds i64, ptr %src1, i32 575 %el.5.1 = load i64, ptr %addr.5.1, align 876 %addr.6.1 = getelementptr inbounds i64, ptr %src1, i32 677 %el.6.1 = load i64, ptr %addr.6.1, align 878 %addr.7.1 = getelementptr inbounds i64, ptr %src1, i32 779 %el.7.1 = load i64, ptr %addr.7.1, align 880 %addr.8.1 = getelementptr inbounds i64, ptr %src1, i32 881 %el.8.1 = load i64, ptr %addr.8.1, align 882 %addr.9.1 = getelementptr inbounds i64, ptr %src1, i32 983 %el.9.1 = load i64, ptr %addr.9.1, align 884 %addr.10.1 = getelementptr inbounds i64, ptr %src1, i32 1085 %el.10.1 = load i64, ptr %addr.10.1, align 886 %addr.11.1 = getelementptr inbounds i64, ptr %src1, i32 1187 %el.11.1 = load i64, ptr %addr.11.1, align 888 %addr.12.1 = getelementptr inbounds i64, ptr %src1, i32 1289 %el.12.1 = load i64, ptr %addr.12.1, align 890 %addr.13.1 = getelementptr inbounds i64, ptr %src1, i32 1391 %el.13.1 = load i64, ptr %addr.13.1, align 892 %addr.14.1 = getelementptr inbounds i64, ptr %src1, i32 1493 %el.14.1 = load i64, ptr %addr.14.1, align 894 %addr.15.1 = getelementptr inbounds i64, ptr %src1, i32 1595 %el.15.1 = load i64, ptr %addr.15.1, align 896 %vec.0 = insertelement <16 x i64> undef, i64 %el.0, i32 097 %vec.1 = insertelement <16 x i64> %vec.0, i64 %el.1, i32 198 %vec.2 = insertelement <16 x i64> %vec.1, i64 %el.2, i32 299 %vec.3 = insertelement <16 x i64> %vec.2, i64 %el.3, i32 3100 %vec.4 = insertelement <16 x i64> %vec.3, i64 %el.4, i32 4101 %vec.5 = insertelement <16 x i64> %vec.4, i64 %el.5, i32 5102 %vec.6 = insertelement <16 x i64> %vec.5, i64 %el.6, i32 6103 %vec.7 = insertelement <16 x i64> %vec.6, i64 %el.7, i32 7104 %vec.8 = insertelement <16 x i64> %vec.7, i64 %el.8, i32 8105 %vec.9 = insertelement <16 x i64> %vec.8, i64 %el.9, i32 9106 %vec.10 = insertelement <16 x i64> %vec.9, i64 %el.10, i32 10107 %vec.11 = insertelement <16 x i64> %vec.10, i64 %el.11, i32 11108 %vec.12 = insertelement <16 x i64> %vec.11, i64 %el.12, i32 12109 %vec.13 = insertelement <16 x i64> %vec.12, i64 %el.13, i32 13110 %vec.14 = insertelement <16 x i64> %vec.13, i64 %el.14, i32 14111 %vec.15 = insertelement <16 x i64> %vec.14, i64 %el.15, i32 15112 call void @capture(ptr %src0, ptr %src1)113 %vec.0.1 = insertelement <16 x i64> undef, i64 %el.0.1, i32 0114 %vec.1.1 = insertelement <16 x i64> %vec.0.1, i64 %el.1.1, i32 1115 %vec.2.1 = insertelement <16 x i64> %vec.1.1, i64 %el.2.1, i32 2116 %vec.3.1 = insertelement <16 x i64> %vec.2.1, i64 %el.3.1, i32 3117 %vec.4.1 = insertelement <16 x i64> %vec.3.1, i64 %el.4.1, i32 4118 %vec.5.1 = insertelement <16 x i64> %vec.4.1, i64 %el.5.1, i32 5119 %vec.6.1 = insertelement <16 x i64> %vec.5.1, i64 %el.6.1, i32 6120 %vec.7.1 = insertelement <16 x i64> %vec.6.1, i64 %el.7.1, i32 7121 %vec.8.1 = insertelement <16 x i64> %vec.7.1, i64 %el.7.1, i32 8122 %vec.9.1 = insertelement <16 x i64> %vec.8.1, i64 %el.8.1, i32 9123 %vec.10.1 = insertelement <16 x i64> %vec.9.1, i64 %el.9.1, i32 10124 %vec.11.1 = insertelement <16 x i64> %vec.10.1, i64 %el.10.1, i32 11125 %vec.12.1 = insertelement <16 x i64> %vec.11.1, i64 %el.11.1, i32 12126 %vec.13.1 = insertelement <16 x i64> %vec.12.1, i64 %el.12.1, i32 13127 %vec.14.1 = insertelement <16 x i64> %vec.13.1, i64 %el.13.1, i32 14128 %vec.15.1 = insertelement <16 x i64> %vec.14.1, i64 %el.14.1, i32 15129 %res = add <16 x i64> %vec.15, %vec.15.1130 ret <16 x i64> %res131}132 133declare void @capture(ptr, ptr)134 135attributes #0 = { noredzone "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" }136