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1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s2 3define <2 x i32> @vrecpei32(ptr %A) nounwind {4;CHECK-LABEL: vrecpei32:5;CHECK: vrecpe.u326 %tmp1 = load <2 x i32>, ptr %A7 %tmp2 = call <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32> %tmp1)8 ret <2 x i32> %tmp29}10 11define <4 x i32> @vrecpeQi32(ptr %A) nounwind {12;CHECK-LABEL: vrecpeQi32:13;CHECK: vrecpe.u3214 %tmp1 = load <4 x i32>, ptr %A15 %tmp2 = call <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32> %tmp1)16 ret <4 x i32> %tmp217}18 19define <2 x float> @vrecpef32(ptr %A) nounwind {20;CHECK-LABEL: vrecpef32:21;CHECK: vrecpe.f3222 %tmp1 = load <2 x float>, ptr %A23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)24 ret <2 x float> %tmp225}26 27define <4 x float> @vrecpeQf32(ptr %A) nounwind {28;CHECK-LABEL: vrecpeQf32:29;CHECK: vrecpe.f3230 %tmp1 = load <4 x float>, ptr %A31 %tmp2 = call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> %tmp1)32 ret <4 x float> %tmp233}34 35declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone36declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone37 38declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone39declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone40 41define <2 x float> @vrecpsf32(ptr %A, ptr %B) nounwind {42;CHECK-LABEL: vrecpsf32:43;CHECK: vrecps.f3244 %tmp1 = load <2 x float>, ptr %A45 %tmp2 = load <2 x float>, ptr %B46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)47 ret <2 x float> %tmp348}49 50define <4 x float> @vrecpsQf32(ptr %A, ptr %B) nounwind {51;CHECK-LABEL: vrecpsQf32:52;CHECK: vrecps.f3253 %tmp1 = load <4 x float>, ptr %A54 %tmp2 = load <4 x float>, ptr %B55 %tmp3 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)56 ret <4 x float> %tmp357}58 59declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone60declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone61 62define <2 x i32> @vrsqrtei32(ptr %A) nounwind {63;CHECK-LABEL: vrsqrtei32:64;CHECK: vrsqrte.u3265 %tmp1 = load <2 x i32>, ptr %A66 %tmp2 = call <2 x i32> @llvm.arm.neon.vrsqrte.v2i32(<2 x i32> %tmp1)67 ret <2 x i32> %tmp268}69 70define <4 x i32> @vrsqrteQi32(ptr %A) nounwind {71;CHECK-LABEL: vrsqrteQi32:72;CHECK: vrsqrte.u3273 %tmp1 = load <4 x i32>, ptr %A74 %tmp2 = call <4 x i32> @llvm.arm.neon.vrsqrte.v4i32(<4 x i32> %tmp1)75 ret <4 x i32> %tmp276}77 78define <2 x float> @vrsqrtef32(ptr %A) nounwind {79;CHECK-LABEL: vrsqrtef32:80;CHECK: vrsqrte.f3281 %tmp1 = load <2 x float>, ptr %A82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)83 ret <2 x float> %tmp284}85 86define <4 x float> @vrsqrteQf32(ptr %A) nounwind {87;CHECK-LABEL: vrsqrteQf32:88;CHECK: vrsqrte.f3289 %tmp1 = load <4 x float>, ptr %A90 %tmp2 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %tmp1)91 ret <4 x float> %tmp292}93 94declare <2 x i32> @llvm.arm.neon.vrsqrte.v2i32(<2 x i32>) nounwind readnone95declare <4 x i32> @llvm.arm.neon.vrsqrte.v4i32(<4 x i32>) nounwind readnone96 97declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone98declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone99 100define <2 x float> @vrsqrtsf32(ptr %A, ptr %B) nounwind {101;CHECK-LABEL: vrsqrtsf32:102;CHECK: vrsqrts.f32103 %tmp1 = load <2 x float>, ptr %A104 %tmp2 = load <2 x float>, ptr %B105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)106 ret <2 x float> %tmp3107}108 109define <4 x float> @vrsqrtsQf32(ptr %A, ptr %B) nounwind {110;CHECK-LABEL: vrsqrtsQf32:111;CHECK: vrsqrts.f32112 %tmp1 = load <4 x float>, ptr %A113 %tmp2 = load <4 x float>, ptr %B114 %tmp3 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)115 ret <4 x float> %tmp3116}117 118declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone119declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone120