130 lines · plain
1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s2 3define void @vst1i8(ptr %A, ptr %B) nounwind {4;CHECK-LABEL: vst1i8:5;Check the alignment value. Max for this instruction is 64 bits:6;CHECK: vst1.8 {d16}, [r0:64]7 %tmp1 = load <8 x i8>, ptr %B8 call void @llvm.arm.neon.vst1.p0.v8i8(ptr %A, <8 x i8> %tmp1, i32 16)9 ret void10}11 12define void @vst1i16(ptr %A, ptr %B) nounwind {13;CHECK-LABEL: vst1i16:14;CHECK: vst1.1615 %tmp1 = load <4 x i16>, ptr %B16 call void @llvm.arm.neon.vst1.p0.v4i16(ptr %A, <4 x i16> %tmp1, i32 1)17 ret void18}19 20define void @vst1i32(ptr %A, ptr %B) nounwind {21;CHECK-LABEL: vst1i32:22;CHECK: vst1.3223 %tmp1 = load <2 x i32>, ptr %B24 call void @llvm.arm.neon.vst1.p0.v2i32(ptr %A, <2 x i32> %tmp1, i32 1)25 ret void26}27 28define void @vst1f(ptr %A, ptr %B) nounwind {29;CHECK-LABEL: vst1f:30;CHECK: vst1.3231 %tmp1 = load <2 x float>, ptr %B32 call void @llvm.arm.neon.vst1.p0.v2f32(ptr %A, <2 x float> %tmp1, i32 1)33 ret void34}35 36;Check for a post-increment updating store.37define void @vst1f_update(ptr %ptr, ptr %B) nounwind {38;CHECK-LABEL: vst1f_update:39;CHECK: vst1.32 {d16}, [r{{[0-9]+}}]!40 %A = load ptr, ptr %ptr41 %tmp1 = load <2 x float>, ptr %B42 call void @llvm.arm.neon.vst1.p0.v2f32(ptr %A, <2 x float> %tmp1, i32 1)43 %tmp2 = getelementptr float, ptr %A, i32 244 store ptr %tmp2, ptr %ptr45 ret void46}47 48define void @vst1i64(ptr %A, ptr %B) nounwind {49;CHECK-LABEL: vst1i64:50;CHECK: vst1.6451 %tmp1 = load <1 x i64>, ptr %B52 call void @llvm.arm.neon.vst1.p0.v1i64(ptr %A, <1 x i64> %tmp1, i32 1)53 ret void54}55 56define void @vst1Qi8(ptr %A, ptr %B) nounwind {57;CHECK-LABEL: vst1Qi8:58;Check the alignment value. Max for this instruction is 128 bits:59;CHECK: vst1.8 {d16, d17}, [r0:64]60 %tmp1 = load <16 x i8>, ptr %B61 call void @llvm.arm.neon.vst1.p0.v16i8(ptr %A, <16 x i8> %tmp1, i32 8)62 ret void63}64 65define void @vst1Qi16(ptr %A, ptr %B) nounwind {66;CHECK-LABEL: vst1Qi16:67;Check the alignment value. Max for this instruction is 128 bits:68;CHECK: vst1.16 {d16, d17}, [r0:128]69 %tmp1 = load <8 x i16>, ptr %B70 call void @llvm.arm.neon.vst1.p0.v8i16(ptr %A, <8 x i16> %tmp1, i32 32)71 ret void72}73 74;Check for a post-increment updating store with register increment.75define void @vst1Qi16_update(ptr %ptr, ptr %B, i32 %inc) nounwind {76;CHECK-LABEL: vst1Qi16_update:77;CHECK: vst1.16 {d16, d17}, [r1:64], r278 %A = load ptr, ptr %ptr79 %tmp1 = load <8 x i16>, ptr %B80 call void @llvm.arm.neon.vst1.p0.v8i16(ptr %A, <8 x i16> %tmp1, i32 8)81 %tmp2 = getelementptr i16, ptr %A, i32 %inc82 store ptr %tmp2, ptr %ptr83 ret void84}85 86define void @vst1Qi32(ptr %A, ptr %B) nounwind {87;CHECK-LABEL: vst1Qi32:88;CHECK: vst1.3289 %tmp1 = load <4 x i32>, ptr %B90 call void @llvm.arm.neon.vst1.p0.v4i32(ptr %A, <4 x i32> %tmp1, i32 1)91 ret void92}93 94define void @vst1Qf(ptr %A, ptr %B) nounwind {95;CHECK-LABEL: vst1Qf:96;CHECK: vst1.3297 %tmp1 = load <4 x float>, ptr %B98 call void @llvm.arm.neon.vst1.p0.v4f32(ptr %A, <4 x float> %tmp1, i32 1)99 ret void100}101 102define void @vst1Qi64(ptr %A, ptr %B) nounwind {103;CHECK-LABEL: vst1Qi64:104;CHECK: vst1.64105 %tmp1 = load <2 x i64>, ptr %B106 call void @llvm.arm.neon.vst1.p0.v2i64(ptr %A, <2 x i64> %tmp1, i32 1)107 ret void108}109 110define void @vst1Qf64(ptr %A, ptr %B) nounwind {111;CHECK-LABEL: vst1Qf64:112;CHECK: vst1.64113 %tmp1 = load <2 x double>, ptr %B114 call void @llvm.arm.neon.vst1.p0.v2f64(ptr %A, <2 x double> %tmp1, i32 1)115 ret void116}117 118declare void @llvm.arm.neon.vst1.p0.v8i8(ptr, <8 x i8>, i32) nounwind119declare void @llvm.arm.neon.vst1.p0.v4i16(ptr, <4 x i16>, i32) nounwind120declare void @llvm.arm.neon.vst1.p0.v2i32(ptr, <2 x i32>, i32) nounwind121declare void @llvm.arm.neon.vst1.p0.v2f32(ptr, <2 x float>, i32) nounwind122declare void @llvm.arm.neon.vst1.p0.v1i64(ptr, <1 x i64>, i32) nounwind123 124declare void @llvm.arm.neon.vst1.p0.v16i8(ptr, <16 x i8>, i32) nounwind125declare void @llvm.arm.neon.vst1.p0.v8i16(ptr, <8 x i16>, i32) nounwind126declare void @llvm.arm.neon.vst1.p0.v4i32(ptr, <4 x i32>, i32) nounwind127declare void @llvm.arm.neon.vst1.p0.v4f32(ptr, <4 x float>, i32) nounwind128declare void @llvm.arm.neon.vst1.p0.v2i64(ptr, <2 x i64>, i32) nounwind129declare void @llvm.arm.neon.vst1.p0.v2f64(ptr, <2 x double>, i32) nounwind130