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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s3 4define signext i16 @testmsws(float %x) {5; CHECK-LABEL: testmsws:6; CHECK: ; %bb.0: ; %entry7; CHECK-NEXT: call lroundf8; CHECK-NEXT: movw r24, r229; CHECK-NEXT: ret10entry:11 %0 = tail call i32 @llvm.lround.i32.f32(float %x)12 %conv = trunc i32 %0 to i1613 ret i16 %conv14}15 16define i32 @testmsxs(float %x) {17; CHECK-LABEL: testmsxs:18; CHECK: ; %bb.0: ; %entry19; CHECK-NEXT: call lroundf20; CHECK-NEXT: ret21entry:22 %0 = tail call i32 @llvm.lround.i32.f32(float %x)23 ret i32 %024}25 26define signext i16 @testmswd(double %x) {27; CHECK-LABEL: testmswd:28; CHECK: ; %bb.0: ; %entry29; CHECK-NEXT: call lround30; CHECK-NEXT: movw r24, r2231; CHECK-NEXT: ret32entry:33 %0 = tail call i32 @llvm.lround.i32.f64(double %x)34 %conv = trunc i32 %0 to i1635 ret i16 %conv36}37 38define i32 @testmsxd(double %x) {39; CHECK-LABEL: testmsxd:40; CHECK: ; %bb.0: ; %entry41; CHECK-NEXT: call lround42; CHECK-NEXT: ret43entry:44 %0 = tail call i32 @llvm.lround.i32.f64(double %x)45 ret i32 %046}47 48declare i32 @llvm.lround.i32.f32(float) nounwind readnone49declare i32 @llvm.lround.i32.f64(double) nounwind readnone50