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1; RUN: llc < %s -mtriple=bpfel -mcpu=v1 -show-mc-encoding | FileCheck %s2 3define void @test() #0 {4entry:5; CHECK: test:6 7; CHECK: r1 = 123 # encoding: [0xb7,0x01,0x00,0x00,0x7b,0x00,0x00,0x00]8; CHECK: call f_i169 call void @f_i16(i16 123)10 11; CHECK: r1 = 12345678 # encoding: [0xb7,0x01,0x00,0x00,0x4e,0x61,0xbc,0x00]12; CHECK: call f_i3213 call void @f_i32(i32 12345678)14 15; CHECK: r1 = 72623859790382856 ll # encoding: [0x18,0x01,0x00,0x00,0x08,0x07,0x06,0x05,0x00,0x00,0x00,0x00,0x04,0x03,0x02,0x01]16; CHECK: call f_i6417 call void @f_i64(i64 72623859790382856)18 19; CHECK: r1 = 123420; CHECK: r2 = 567821; CHECK: call f_i32_i3222 call void @f_i32_i32(i32 1234, i32 5678)23 24; CHECK: r1 = 225; CHECK: r2 = 326; CHECK: r3 = 427; CHECK: call f_i16_i32_i1628 call void @f_i16_i32_i16(i16 2, i32 3, i16 4)29 30; CHECK: r1 = 531; CHECK: r2 = 7262385979038285 ll32; CHECK: r3 = 633; CHECK: call f_i16_i64_i1634 call void @f_i16_i64_i16(i16 5, i64 7262385979038285, i16 6)35 36 ret void37}38 39@g_i16 = common global i16 0, align 240@g_i32 = common global i32 0, align 241@g_i64 = common global i64 0, align 442 43define void @f_i16(i16 %a) #0 {44; CHECK: f_i16:45; CHECK: *(u16 *)(r2 + 0) = r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]46 store volatile i16 %a, ptr @g_i16, align 247 ret void48}49 50define void @f_i32(i32 %a) #0 {51; CHECK: f_i32:52; CHECK: *(u16 *)(r2 + 0) = r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]53; CHECK: *(u16 *)(r2 + 2) = r1 # encoding: [0x6b,0x12,0x02,0x00,0x00,0x00,0x00,0x00]54 store volatile i32 %a, ptr @g_i32, align 255 ret void56}57 58define void @f_i64(i64 %a) #0 {59; CHECK: f_i64:60; CHECK: *(u32 *)(r2 + 0) = r161; CHECK: *(u32 *)(r2 + 4) = r1 # encoding: [0x63,0x12,0x04,0x00,0x00,0x00,0x00,0x00]62 store volatile i64 %a, ptr @g_i64, align 263 ret void64}65 66define void @f_i32_i32(i32 %a, i32 %b) #0 {67; CHECK: f_i32_i32:68; CHECK: *(u32 *)(r3 + 0) = r169 store volatile i32 %a, ptr @g_i32, align 470; CHECK: *(u32 *)(r3 + 0) = r271 store volatile i32 %b, ptr @g_i32, align 472 ret void73}74 75define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {76; CHECK: f_i16_i32_i16:77; CHECK: *(u16 *)(r4 + 0) = r178 store volatile i16 %a, ptr @g_i16, align 279; CHECK: *(u32 *)(r1 + 0) = r280 store volatile i32 %b, ptr @g_i32, align 481; CHECK: *(u16 *)(r4 + 0) = r382 store volatile i16 %c, ptr @g_i16, align 283 ret void84}85 86define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {87; CHECK: f_i16_i64_i16:88; CHECK: *(u16 *)(r4 + 0) = r189 store volatile i16 %a, ptr @g_i16, align 290; CHECK: *(u64 *)(r1 + 0) = r2 # encoding: [0x7b,0x21,0x00,0x00,0x00,0x00,0x00,0x00]91 store volatile i64 %b, ptr @g_i64, align 892; CHECK: *(u16 *)(r4 + 0) = r393 store volatile i16 %c, ptr @g_i16, align 294 ret void95}96