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1; RUN: llc < %s -mtriple=bpfel -verify-machineinstrs -bpf-expand-memcpy-in-order | FileCheck %s2; RUN: llc < %s -mtriple=bpfeb -verify-machineinstrs -bpf-expand-memcpy-in-order | FileCheck %s3;4; #define COPY_LEN 95;6; void cal_align1(ptr a, ptr b)7; {8; __builtin_memcpy(a, b, COPY_LEN);9; }10;11; void cal_align2(short *a, short *b)12; {13; __builtin_memcpy(a, b, COPY_LEN);14; }15;16; #undef COPY_LEN17; #define COPY_LEN 1918; void cal_align4(int *a, int *b)19; {20; __builtin_memcpy(a, b, COPY_LEN);21; }22;23; #undef COPY_LEN24; #define COPY_LEN 2725; void cal_align8(long long *a, long long *b)26; {27; __builtin_memcpy(a, b, COPY_LEN);28; }29 30; Function Attrs: nounwind31define dso_local void @cal_align1(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {32entry:33 tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 %a, ptr align 1 %b, i64 9, i1 false)34 ret void35}36 37; Function Attrs: argmemonly nounwind38declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #139 40; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u8 *)([[SRC_REG:r[0-9]]] + 0)41; CHECK: *(u8 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]42; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 1)43; CHECK: *(u8 *)([[DST_REG]] + 1) = [[SCRATCH_REG]]44; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 2)45; CHECK: *(u8 *)([[DST_REG]] + 2) = [[SCRATCH_REG]]46; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 3)47; CHECK: *(u8 *)([[DST_REG]] + 3) = [[SCRATCH_REG]]48; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 4)49; CHECK: *(u8 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]50; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 5)51; CHECK: *(u8 *)([[DST_REG]] + 5) = [[SCRATCH_REG]]52; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 6)53; CHECK: *(u8 *)([[DST_REG]] + 6) = [[SCRATCH_REG]]54; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 7)55; CHECK: *(u8 *)([[DST_REG]] + 7) = [[SCRATCH_REG]]56; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 8)57; CHECK: *(u8 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]58 59; Function Attrs: nounwind60define dso_local void @cal_align2(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {61entry:62 tail call void @llvm.memcpy.p0.p0.i64(ptr align 2 %a, ptr align 2 %b, i64 9, i1 false)63 ret void64}65; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u16 *)([[SRC_REG:r[0-9]]] + 0)66; CHECK: *(u16 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]67; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 2)68; CHECK: *(u16 *)([[DST_REG]] + 2) = [[SCRATCH_REG]]69; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 4)70; CHECK: *(u16 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]71; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 6)72; CHECK: *(u16 *)([[DST_REG]] + 6) = [[SCRATCH_REG]]73; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 8)74; CHECK: *(u8 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]75 76; Function Attrs: nounwind77define dso_local void @cal_align4(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {78entry:79 tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %a, ptr align 4 %b, i64 19, i1 false)80 ret void81}82; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u32 *)([[SRC_REG:r[0-9]]] + 0)83; CHECK: *(u32 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]84; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 4)85; CHECK: *(u32 *)([[DST_REG]] + 4) = [[SCRATCH_REG]]86; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 8)87; CHECK: *(u32 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]88; CHECK: [[SCRATCH_REG]] = *(u32 *)([[SRC_REG]] + 12)89; CHECK: *(u32 *)([[DST_REG]] + 12) = [[SCRATCH_REG]]90; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 16)91; CHECK: *(u16 *)([[DST_REG]] + 16) = [[SCRATCH_REG]]92; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 18)93; CHECK: *(u8 *)([[DST_REG]] + 18) = [[SCRATCH_REG]]94 95; Function Attrs: nounwind96define dso_local void @cal_align8(ptr nocapture %a, ptr nocapture readonly %b) local_unnamed_addr #0 {97entry:98 tail call void @llvm.memcpy.p0.p0.i64(ptr align 8 %a, ptr align 8 %b, i64 27, i1 false)99 ret void100}101; CHECK: [[SCRATCH_REG:r[0-9]]] = *(u64 *)([[SRC_REG:r[0-9]]] + 0)102; CHECK: *(u64 *)([[DST_REG:r[0-9]]] + 0) = [[SCRATCH_REG]]103; CHECK: [[SCRATCH_REG]] = *(u64 *)([[SRC_REG]] + 8)104; CHECK: *(u64 *)([[DST_REG]] + 8) = [[SCRATCH_REG]]105; CHECK: [[SCRATCH_REG]] = *(u64 *)([[SRC_REG]] + 16)106; CHECK: *(u64 *)([[DST_REG]] + 16) = [[SCRATCH_REG]]107; CHECK: [[SCRATCH_REG]] = *(u16 *)([[SRC_REG]] + 24)108; CHECK: *(u16 *)([[DST_REG]] + 24) = [[SCRATCH_REG]]109; CHECK: [[SCRATCH_REG]] = *(u8 *)([[SRC_REG]] + 26)110; CHECK: *(u8 *)([[DST_REG]] + 26) = [[SCRATCH_REG]]111