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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52 3; RUN: llc -mtriple=bpfel -mattr=+allows-misaligned-mem-access -verify-machineinstrs %s -o - \4; RUN: | FileCheck --check-prefixes=ALL,MISALIGN %s5; RUN: llc -mtriple=bpfeb -mattr=+allows-misaligned-mem-access -verify-machineinstrs %s -o - \6; RUN: | FileCheck --check-prefixes=ALL,MISALIGN %s7 8; RUN: llc -mtriple=bpfel -verify-machineinstrs %s -o - \9; RUN: | FileCheck --check-prefixes=ALL,ALIGN %s10; RUN: llc -mtriple=bpfeb -verify-machineinstrs %s -o - \11; RUN: | FileCheck --check-prefixes=ALL,ALIGN %s12; NOTE:13; This test verifies that the new +bpf-allow-misaligned-mem-access14; feature allows the BPF backend to emit direct unaligned load/store15; instructions instead of byte-by-byte emulation sequences.16 17; ---------------------------------------------------------------------18; i8 load19; ---------------------------------------------------------------------20define i8 @test_load_i8(i8* %p) {21; ALL-LABEL: test_load_i8:22; ALL: # %bb.0:23; ALL-NEXT: w{{[0-9]+}} = *(u8 *)(r1 + 0)24; ALL-NEXT: exit25 %v = load i8, i8* %p, align 126 ret i8 %v27}28 29; ---------------------------------------------------------------------30; i8 store31; ---------------------------------------------------------------------32define void @test_store_i8(i8* %p, i8 %v) {33; ALL-LABEL: test_store_i8:34; ALL: # %bb.0:35; ALL-NEXT: *(u8 *)(r1 + 0) = w{{[0-9]+}}36; ALL-NEXT: exit37 store i8 %v, i8* %p, align 138 ret void39}40 41; ---------------------------------------------------------------------42; i16 load43; ---------------------------------------------------------------------44define i16 @test_load_i16(i16* %p) {45; MISALIGN-LABEL: test_load_i16:46; MISALIGN: # %bb.0:47; MISALIGN: w{{[0-9]+}} = *(u16 *)(r1 + 0)48; MISALIGN: exit49;50; ALIGN-LABEL: test_load_i16:51; ALIGN: # %bb.0:52; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 0)53; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 1)54; ALIGN-DAG: w{{[0-9]+}} <<= 855; ALIGN-DAG: w{{[0-9]+}} |= w{{[0-9]+}}56; ALIGN: exit57 %v = load i16, i16* %p, align 158 ret i16 %v59}60 61; ---------------------------------------------------------------------62; i16 store63; ---------------------------------------------------------------------64define void @test_store_i16(i16* %p, i16 %v) {65; MISALIGN-LABEL: test_store_i16:66; MISALIGN: # %bb.0:67; MISALIGN: *(u16 *)(r1 + 0) = w{{[0-9]+}}68; MISALIGN: exit69;70; ALIGN-LABEL: test_store_i16:71; ALIGN: # %bb.0:72; ALIGN-DAG: *(u8 *)(r1 + 0) = w{{[0-9]+}}73; ALIGN-DAG: w{{[0-9]+}} >>= 874; ALIGN-DAG: *(u8 *)(r1 + 1) = w{{[0-9]+}}75; ALIGN: exit76 store i16 %v, i16* %p, align 177 ret void78}79 80; ---------------------------------------------------------------------81; i32 load82; ---------------------------------------------------------------------83 84define i32 @test_load_i32(i32* %p) {85; MISALIGN-LABEL: test_load_i32:86; MISALIGN: # %bb.0:87; MISALIGN: w{{[0-9]+}} = *(u32 *)(r1 + 0)88; MISALIGN: exit89;90; ALIGN-LABEL: test_load_i32:91; ALIGN: # %bb.0:92; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 0)93; ALIGN-DAG: w{{[0-9]+}} <<= 894; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 1)95; ALIGN-DAG: w{{[0-9]+}} |= w{{[0-9]+}}96; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 2)97; ALIGN-DAG: w{{[0-9]+}} <<= 1698; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 3)99; ALIGN-DAG: w{{[0-9]+}} <<= 24100; ALIGN: exit101 %v = load i32, i32* %p, align 1102 ret i32 %v103}104 105; ---------------------------------------------------------------------106; i32 store107; ---------------------------------------------------------------------108 109define void @test_store_i32(i32* %p, i32 %v) {110; MISALIGN-LABEL: test_store_i32:111; MISALIGN: # %bb.0:112; MISALIGN: *(u32 *)(r1 + 0) = w{{[0-9]+}}113; MISALIGN: exit114;115; ALIGN-LABEL: test_store_i32:116; ALIGN: # %bb.0:117; ALIGN-DAG: w{{[0-9]+}} = w{{[0-9]+}}118; ALIGN-DAG: w{{[0-9]+}} >>= 24119; ALIGN-DAG: *(u8 *)(r1 + 0) = w{{[0-9]+}}120; ALIGN-DAG: w{{[0-9]+}} = w{{[0-9]+}}121; ALIGN-DAG: w{{[0-9]+}} >>= 16122; ALIGN-DAG: *(u8 *)(r1 + 1) = w{{[0-9]+}}123; ALIGN-DAG: *(u8 *)(r1 + 2) = w{{[0-9]+}}124; ALIGN-DAG: w{{[0-9]+}} >>= 8125; ALIGN-DAG: *(u8 *)(r1 + 3) = w{{[0-9]+}}126; ALIGN: exit127 store i32 %v, i32* %p, align 1128 ret void129}130 131; ---------------------------------------------------------------------132; i64 load133; ---------------------------------------------------------------------134 135define i64 @test_load_i64(i64* %p) {136; MISALIGN-LABEL: test_load_i64:137; MISALIGN: # %bb.0:138; MISALIGN: r0 = *(u64 *)(r1 + 0)139; MISALIGN: exit140;141; ALIGN-LABEL: test_load_i64:142; ALIGN: # %bb.0:143; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 0)144; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 1)145; ALIGN-DAG: r{{[0-9]+}} <<= 8146; ALIGN-DAG: r{{[0-9]+}} |= r{{[0-9]+}}147; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 2)148; ALIGN-DAG: r{{[0-9]+}} <<= 16149; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 3)150; ALIGN-DAG: r{{[0-9]+}} <<= 24151; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 4)152; ALIGN-DAG: w{{[0-9]+}} <<= 8153; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 5)154; ALIGN-DAG: w{{[0-9]+}} |= w{{[0-9]+}}155; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 6)156; ALIGN-DAG: w{{[0-9]+}} <<= 16157; ALIGN-DAG: w{{[0-9]+}} = *(u8 *)(r1 + 7)158; ALIGN-DAG: w{{[0-9]+}} <<= 24159; ALIGN-DAG: r{{[0-9]+}} <<= 32160; ALIGN: exit161 %v = load i64, i64* %p, align 1162 ret i64 %v163}164 165; ---------------------------------------------------------------------166; i64 store167; ---------------------------------------------------------------------168 169define void @test_store_i64(i64* %p, i64 %v) {170; MISALIGN-LABEL: test_store_i64:171; MISALIGN: # %bb.0:172; MISALIGN: *(u64 *)(r1 + 0) = r2173; MISALIGN: exit174;175; ALIGN-LABEL: test_store_i64:176; ALIGN: # %bb.0:177; ALIGN-DAG: *(u8 *)(r1 + 0) = w{{[0-9]+}}178; ALIGN-DAG: r{{[0-9]+}} = r{{[0-9]+}}179; ALIGN-DAG: r{{[0-9]+}} >>= 56180; ALIGN-DAG: *(u8 *)(r1 + 1) = w{{[0-9]+}}181; ALIGN-DAG: r{{[0-9]+}} >>= 48182; ALIGN-DAG: *(u8 *)(r1 + 2) = w{{[0-9]+}}183; ALIGN-DAG: r{{[0-9]+}} >>= 40184; ALIGN-DAG: *(u8 *)(r1 + 3) = w{{[0-9]+}}185; ALIGN-DAG: r{{[0-9]+}} >>= 32186; ALIGN-DAG: *(u8 *)(r1 + 4) = w{{[0-9]+}}187; ALIGN-DAG: r{{[0-9]+}} >>= 24188; ALIGN-DAG: *(u8 *)(r1 + 5) = w{{[0-9]+}}189; ALIGN-DAG: r{{[0-9]+}} >>= 16190; ALIGN-DAG: *(u8 *)(r1 + 6) = w{{[0-9]+}}191; ALIGN-DAG: r{{[0-9]+}} >>= 8192; ALIGN-DAG: *(u8 *)(r1 + 7) = w{{[0-9]+}}193; ALIGN: exit194 store i64 %v, i64* %p, align 1195 ret void196}197