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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf | FileCheck %s --check-prefix=CHECK-SF3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf | FileCheck %s --check-prefix=CHECK-SF24 5;OEQ6define i32 @brRR_oeq(float %x, float %y) {7;8; CHECK-SF-LABEL: brRR_oeq:9; CHECK-SF: # %bb.0: # %entry10; CHECK-SF-NEXT: fcmpnes vr1, vr011; CHECK-SF-NEXT: bt32 .LBB0_212; CHECK-SF-NEXT: # %bb.1: # %label113; CHECK-SF-NEXT: movi16 a0, 114; CHECK-SF-NEXT: rts1615; CHECK-SF-NEXT: .LBB0_2: # %label216; CHECK-SF-NEXT: movi16 a0, 017; CHECK-SF-NEXT: rts1618;19; CHECK-SF2-LABEL: brRR_oeq:20; CHECK-SF2: # %bb.0: # %entry21; CHECK-SF2-NEXT: fcmpne.32 vr1, vr022; CHECK-SF2-NEXT: bt32 .LBB0_223; CHECK-SF2-NEXT: # %bb.1: # %label124; CHECK-SF2-NEXT: movi16 a0, 125; CHECK-SF2-NEXT: rts1626; CHECK-SF2-NEXT: .LBB0_2: # %label227; CHECK-SF2-NEXT: movi16 a0, 028; CHECK-SF2-NEXT: rts1629entry:30 %fcmp = fcmp oeq float %y, %x31 br i1 %fcmp, label %label1, label %label232label1:33 ret i32 134label2:35 ret i32 036}37 38define i32 @brRI_oeq(float %x) {39;40; CHECK-SF-LABEL: brRI_oeq:41; CHECK-SF: # %bb.0: # %entry42; CHECK-SF-NEXT: movih32 a0, 1667243; CHECK-SF-NEXT: fmtvrl vr1, a044; CHECK-SF-NEXT: fcmpnes vr0, vr145; CHECK-SF-NEXT: bt32 .LBB1_246; CHECK-SF-NEXT: # %bb.1: # %label147; CHECK-SF-NEXT: movi16 a0, 148; CHECK-SF-NEXT: rts1649; CHECK-SF-NEXT: .LBB1_2: # %label250; CHECK-SF-NEXT: movi16 a0, 051; CHECK-SF-NEXT: rts1652;53; CHECK-SF2-LABEL: brRI_oeq:54; CHECK-SF2: # %bb.0: # %entry55; CHECK-SF2-NEXT: movih32 a0, 1667256; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a057; CHECK-SF2-NEXT: fcmpne.32 vr0, vr158; CHECK-SF2-NEXT: bt32 .LBB1_259; CHECK-SF2-NEXT: # %bb.1: # %label160; CHECK-SF2-NEXT: movi16 a0, 161; CHECK-SF2-NEXT: rts1662; CHECK-SF2-NEXT: .LBB1_2: # %label263; CHECK-SF2-NEXT: movi16 a0, 064; CHECK-SF2-NEXT: rts1665entry:66 %fcmp = fcmp oeq float %x, 10.067 br i1 %fcmp, label %label1, label %label268label1:69 ret i32 170label2:71 ret i32 072}73 74define i32 @brR0_oeq(float %x) {75;76; CHECK-SF-LABEL: brR0_oeq:77; CHECK-SF: # %bb.0: # %entry78; CHECK-SF-NEXT: fcmpznes vr079; CHECK-SF-NEXT: bt32 .LBB2_280; CHECK-SF-NEXT: # %bb.1: # %label181; CHECK-SF-NEXT: movi16 a0, 182; CHECK-SF-NEXT: rts1683; CHECK-SF-NEXT: .LBB2_2: # %label284; CHECK-SF-NEXT: movi16 a0, 085; CHECK-SF-NEXT: rts1686;87; CHECK-SF2-LABEL: brR0_oeq:88; CHECK-SF2: # %bb.0: # %entry89; CHECK-SF2-NEXT: fcmpnez.32 vr090; CHECK-SF2-NEXT: bt32 .LBB2_291; CHECK-SF2-NEXT: # %bb.1: # %label192; CHECK-SF2-NEXT: movi16 a0, 193; CHECK-SF2-NEXT: rts1694; CHECK-SF2-NEXT: .LBB2_2: # %label295; CHECK-SF2-NEXT: movi16 a0, 096; CHECK-SF2-NEXT: rts1697entry:98 %fcmp = fcmp oeq float %x, 0.099 br i1 %fcmp, label %label1, label %label2100label1:101 ret i32 1102label2:103 ret i32 0104}105 106;NE107define i32 @brRR_one(float %x, float %y) {108;109; CHECK-SF-LABEL: brRR_one:110; CHECK-SF: # %bb.0: # %entry111; CHECK-SF-NEXT: fcmpuos vr1, vr0112; CHECK-SF-NEXT: mvc32 a0113; CHECK-SF-NEXT: fcmpnes vr1, vr0114; CHECK-SF-NEXT: mvcv16 a1115; CHECK-SF-NEXT: or16 a0, a1116; CHECK-SF-NEXT: btsti16 a0, 0117; CHECK-SF-NEXT: bt32 .LBB3_2118; CHECK-SF-NEXT: # %bb.1: # %label1119; CHECK-SF-NEXT: movi16 a0, 1120; CHECK-SF-NEXT: rts16121; CHECK-SF-NEXT: .LBB3_2: # %label2122; CHECK-SF-NEXT: movi16 a0, 0123; CHECK-SF-NEXT: rts16124;125; CHECK-SF2-LABEL: brRR_one:126; CHECK-SF2: # %bb.0: # %entry127; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr0128; CHECK-SF2-NEXT: mvc32 a0129; CHECK-SF2-NEXT: fcmpne.32 vr1, vr0130; CHECK-SF2-NEXT: mvcv16 a1131; CHECK-SF2-NEXT: or16 a0, a1132; CHECK-SF2-NEXT: btsti16 a0, 0133; CHECK-SF2-NEXT: bt32 .LBB3_2134; CHECK-SF2-NEXT: # %bb.1: # %label1135; CHECK-SF2-NEXT: movi16 a0, 1136; CHECK-SF2-NEXT: rts16137; CHECK-SF2-NEXT: .LBB3_2: # %label2138; CHECK-SF2-NEXT: movi16 a0, 0139; CHECK-SF2-NEXT: rts16140entry:141 %fcmp = fcmp one float %y, %x142 br i1 %fcmp, label %label1, label %label2143label1:144 ret i32 1145label2:146 ret i32 0147}148 149define i32 @brRI_one(float %x) {150;151; CHECK-SF-LABEL: brRI_one:152; CHECK-SF: # %bb.0: # %entry153; CHECK-SF-NEXT: movih32 a0, 16672154; CHECK-SF-NEXT: fmtvrl vr1, a0155; CHECK-SF-NEXT: fcmpnes vr0, vr1156; CHECK-SF-NEXT: mvcv16 a0157; CHECK-SF-NEXT: fcmpuos vr0, vr0158; CHECK-SF-NEXT: mvc32 a1159; CHECK-SF-NEXT: or16 a0, a1160; CHECK-SF-NEXT: btsti16 a0, 0161; CHECK-SF-NEXT: bt32 .LBB4_2162; CHECK-SF-NEXT: # %bb.1: # %label1163; CHECK-SF-NEXT: movi16 a0, 1164; CHECK-SF-NEXT: rts16165; CHECK-SF-NEXT: .LBB4_2: # %label2166; CHECK-SF-NEXT: movi16 a0, 0167; CHECK-SF-NEXT: rts16168;169; CHECK-SF2-LABEL: brRI_one:170; CHECK-SF2: # %bb.0: # %entry171; CHECK-SF2-NEXT: movih32 a0, 16672172; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0173; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1174; CHECK-SF2-NEXT: mvcv16 a0175; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0176; CHECK-SF2-NEXT: mvc32 a1177; CHECK-SF2-NEXT: or16 a0, a1178; CHECK-SF2-NEXT: btsti16 a0, 0179; CHECK-SF2-NEXT: bt32 .LBB4_2180; CHECK-SF2-NEXT: # %bb.1: # %label1181; CHECK-SF2-NEXT: movi16 a0, 1182; CHECK-SF2-NEXT: rts16183; CHECK-SF2-NEXT: .LBB4_2: # %label2184; CHECK-SF2-NEXT: movi16 a0, 0185; CHECK-SF2-NEXT: rts16186entry:187 %fcmp = fcmp one float %x, 10.0188 br i1 %fcmp, label %label1, label %label2189label1:190 ret i32 1191label2:192 ret i32 0193}194 195define i32 @brR0_one(float %x) {196;197; CHECK-SF-LABEL: brR0_one:198; CHECK-SF: # %bb.0: # %entry199; CHECK-SF-NEXT: fcmpuos vr0, vr0200; CHECK-SF-NEXT: mvc32 a0201; CHECK-SF-NEXT: fcmpznes vr0202; CHECK-SF-NEXT: mvcv16 a1203; CHECK-SF-NEXT: or16 a0, a1204; CHECK-SF-NEXT: btsti16 a0, 0205; CHECK-SF-NEXT: bt32 .LBB5_2206; CHECK-SF-NEXT: # %bb.1: # %label1207; CHECK-SF-NEXT: movi16 a0, 1208; CHECK-SF-NEXT: rts16209; CHECK-SF-NEXT: .LBB5_2: # %label2210; CHECK-SF-NEXT: movi16 a0, 0211; CHECK-SF-NEXT: rts16212;213; CHECK-SF2-LABEL: brR0_one:214; CHECK-SF2: # %bb.0: # %entry215; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0216; CHECK-SF2-NEXT: mvc32 a0217; CHECK-SF2-NEXT: fcmpnez.32 vr0218; CHECK-SF2-NEXT: mvcv16 a1219; CHECK-SF2-NEXT: or16 a0, a1220; CHECK-SF2-NEXT: btsti16 a0, 0221; CHECK-SF2-NEXT: bt32 .LBB5_2222; CHECK-SF2-NEXT: # %bb.1: # %label1223; CHECK-SF2-NEXT: movi16 a0, 1224; CHECK-SF2-NEXT: rts16225; CHECK-SF2-NEXT: .LBB5_2: # %label2226; CHECK-SF2-NEXT: movi16 a0, 0227; CHECK-SF2-NEXT: rts16228entry:229 %fcmp = fcmp one float %x, 0.0230 br i1 %fcmp, label %label1, label %label2231label1:232 ret i32 1233label2:234 ret i32 0235}236 237;UGT238define i32 @brRR_ugt(float %x, float %y) {239;240; CHECK-SF-LABEL: brRR_ugt:241; CHECK-SF: # %bb.0: # %entry242; CHECK-SF-NEXT: fcmphss vr0, vr1243; CHECK-SF-NEXT: bt32 .LBB6_2244; CHECK-SF-NEXT: # %bb.1: # %label1245; CHECK-SF-NEXT: movi16 a0, 1246; CHECK-SF-NEXT: rts16247; CHECK-SF-NEXT: .LBB6_2: # %label2248; CHECK-SF-NEXT: movi16 a0, 0249; CHECK-SF-NEXT: rts16250;251; CHECK-SF2-LABEL: brRR_ugt:252; CHECK-SF2: # %bb.0: # %entry253; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1254; CHECK-SF2-NEXT: bt32 .LBB6_2255; CHECK-SF2-NEXT: # %bb.1: # %label1256; CHECK-SF2-NEXT: movi16 a0, 1257; CHECK-SF2-NEXT: rts16258; CHECK-SF2-NEXT: .LBB6_2: # %label2259; CHECK-SF2-NEXT: movi16 a0, 0260; CHECK-SF2-NEXT: rts16261entry:262 %fcmp = fcmp ugt float %y, %x263 br i1 %fcmp, label %label1, label %label2264label1:265 ret i32 1266label2:267 ret i32 0268}269 270define i32 @brRI_ugt(float %x) {271;272; CHECK-SF-LABEL: brRI_ugt:273; CHECK-SF: # %bb.0: # %entry274; CHECK-SF-NEXT: movih32 a0, 16672275; CHECK-SF-NEXT: fmtvrl vr1, a0276; CHECK-SF-NEXT: fcmphss vr1, vr0277; CHECK-SF-NEXT: bt32 .LBB7_2278; CHECK-SF-NEXT: # %bb.1: # %label1279; CHECK-SF-NEXT: movi16 a0, 1280; CHECK-SF-NEXT: rts16281; CHECK-SF-NEXT: .LBB7_2: # %label2282; CHECK-SF-NEXT: movi16 a0, 0283; CHECK-SF-NEXT: rts16284;285; CHECK-SF2-LABEL: brRI_ugt:286; CHECK-SF2: # %bb.0: # %entry287; CHECK-SF2-NEXT: movih32 a0, 16672288; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0289; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0290; CHECK-SF2-NEXT: bt32 .LBB7_2291; CHECK-SF2-NEXT: # %bb.1: # %label1292; CHECK-SF2-NEXT: movi16 a0, 1293; CHECK-SF2-NEXT: rts16294; CHECK-SF2-NEXT: .LBB7_2: # %label2295; CHECK-SF2-NEXT: movi16 a0, 0296; CHECK-SF2-NEXT: rts16297entry:298 %fcmp = fcmp ugt float %x, 10.0299 br i1 %fcmp, label %label1, label %label2300label1:301 ret i32 1302label2:303 ret i32 0304}305 306define i32 @brR0_ugt(float %x) {307;308; CHECK-SF-LABEL: brR0_ugt:309; CHECK-SF: # %bb.0: # %entry310; CHECK-SF-NEXT: fcmpzlss vr0311; CHECK-SF-NEXT: bt32 .LBB8_2312; CHECK-SF-NEXT: # %bb.1: # %label1313; CHECK-SF-NEXT: movi16 a0, 1314; CHECK-SF-NEXT: rts16315; CHECK-SF-NEXT: .LBB8_2: # %label2316; CHECK-SF-NEXT: movi16 a0, 0317; CHECK-SF-NEXT: rts16318;319; CHECK-SF2-LABEL: brR0_ugt:320; CHECK-SF2: # %bb.0: # %entry321; CHECK-SF2-NEXT: fcmplsz.32 vr0322; CHECK-SF2-NEXT: bt32 .LBB8_2323; CHECK-SF2-NEXT: # %bb.1: # %label1324; CHECK-SF2-NEXT: movi16 a0, 1325; CHECK-SF2-NEXT: rts16326; CHECK-SF2-NEXT: .LBB8_2: # %label2327; CHECK-SF2-NEXT: movi16 a0, 0328; CHECK-SF2-NEXT: rts16329entry:330 %fcmp = fcmp ugt float %x, 0.0331 br i1 %fcmp, label %label1, label %label2332label1:333 ret i32 1334label2:335 ret i32 0336}337 338;UGE339define i32 @brRR_uge(float %x, float %y) {340;341; CHECK-SF-LABEL: brRR_uge:342; CHECK-SF: # %bb.0: # %entry343; CHECK-SF-NEXT: fcmplts vr1, vr0344; CHECK-SF-NEXT: bt32 .LBB9_2345; CHECK-SF-NEXT: # %bb.1: # %label1346; CHECK-SF-NEXT: movi16 a0, 1347; CHECK-SF-NEXT: rts16348; CHECK-SF-NEXT: .LBB9_2: # %label2349; CHECK-SF-NEXT: movi16 a0, 0350; CHECK-SF-NEXT: rts16351;352; CHECK-SF2-LABEL: brRR_uge:353; CHECK-SF2: # %bb.0: # %entry354; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0355; CHECK-SF2-NEXT: bt32 .LBB9_2356; CHECK-SF2-NEXT: # %bb.1: # %label1357; CHECK-SF2-NEXT: movi16 a0, 1358; CHECK-SF2-NEXT: rts16359; CHECK-SF2-NEXT: .LBB9_2: # %label2360; CHECK-SF2-NEXT: movi16 a0, 0361; CHECK-SF2-NEXT: rts16362entry:363 %fcmp = fcmp uge float %y, %x364 br i1 %fcmp, label %label1, label %label2365label1:366 ret i32 1367label2:368 ret i32 0369}370 371define i32 @brRI_uge(float %x) {372;373; CHECK-SF-LABEL: brRI_uge:374; CHECK-SF: # %bb.0: # %entry375; CHECK-SF-NEXT: movih32 a0, 16672376; CHECK-SF-NEXT: fmtvrl vr1, a0377; CHECK-SF-NEXT: fcmplts vr0, vr1378; CHECK-SF-NEXT: bt32 .LBB10_2379; CHECK-SF-NEXT: # %bb.1: # %label1380; CHECK-SF-NEXT: movi16 a0, 1381; CHECK-SF-NEXT: rts16382; CHECK-SF-NEXT: .LBB10_2: # %label2383; CHECK-SF-NEXT: movi16 a0, 0384; CHECK-SF-NEXT: rts16385;386; CHECK-SF2-LABEL: brRI_uge:387; CHECK-SF2: # %bb.0: # %entry388; CHECK-SF2-NEXT: movih32 a0, 16672389; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0390; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1391; CHECK-SF2-NEXT: bt32 .LBB10_2392; CHECK-SF2-NEXT: # %bb.1: # %label1393; CHECK-SF2-NEXT: movi16 a0, 1394; CHECK-SF2-NEXT: rts16395; CHECK-SF2-NEXT: .LBB10_2: # %label2396; CHECK-SF2-NEXT: movi16 a0, 0397; CHECK-SF2-NEXT: rts16398entry:399 %fcmp = fcmp uge float %x, 10.0400 br i1 %fcmp, label %label1, label %label2401label1:402 ret i32 1403label2:404 ret i32 0405}406 407define i32 @brR0_uge(float %x) {408;409; CHECK-SF-LABEL: brR0_uge:410; CHECK-SF: # %bb.0: # %entry411; CHECK-SF-NEXT: fcmpzhss vr0412; CHECK-SF-NEXT: bf32 .LBB11_2413; CHECK-SF-NEXT: # %bb.1: # %label1414; CHECK-SF-NEXT: movi16 a0, 1415; CHECK-SF-NEXT: rts16416; CHECK-SF-NEXT: .LBB11_2: # %label2417; CHECK-SF-NEXT: movi16 a0, 0418; CHECK-SF-NEXT: rts16419;420; CHECK-SF2-LABEL: brR0_uge:421; CHECK-SF2: # %bb.0: # %entry422; CHECK-SF2-NEXT: fcmpltz.32 vr0423; CHECK-SF2-NEXT: bt32 .LBB11_2424; CHECK-SF2-NEXT: # %bb.1: # %label1425; CHECK-SF2-NEXT: movi16 a0, 1426; CHECK-SF2-NEXT: rts16427; CHECK-SF2-NEXT: .LBB11_2: # %label2428; CHECK-SF2-NEXT: movi16 a0, 0429; CHECK-SF2-NEXT: rts16430entry:431 %fcmp = fcmp uge float %x, 0.0432 br i1 %fcmp, label %label1, label %label2433label1:434 ret i32 1435label2:436 ret i32 0437}438 439;ULT440define i32 @brRR_ult(float %x, float %y) {441;442; CHECK-SF-LABEL: brRR_ult:443; CHECK-SF: # %bb.0: # %entry444; CHECK-SF-NEXT: fcmphss vr1, vr0445; CHECK-SF-NEXT: bt32 .LBB12_2446; CHECK-SF-NEXT: # %bb.1: # %label1447; CHECK-SF-NEXT: movi16 a0, 1448; CHECK-SF-NEXT: rts16449; CHECK-SF-NEXT: .LBB12_2: # %label2450; CHECK-SF-NEXT: movi16 a0, 0451; CHECK-SF-NEXT: rts16452;453; CHECK-SF2-LABEL: brRR_ult:454; CHECK-SF2: # %bb.0: # %entry455; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0456; CHECK-SF2-NEXT: bt32 .LBB12_2457; CHECK-SF2-NEXT: # %bb.1: # %label1458; CHECK-SF2-NEXT: movi16 a0, 1459; CHECK-SF2-NEXT: rts16460; CHECK-SF2-NEXT: .LBB12_2: # %label2461; CHECK-SF2-NEXT: movi16 a0, 0462; CHECK-SF2-NEXT: rts16463entry:464 %fcmp = fcmp ult float %y, %x465 br i1 %fcmp, label %label1, label %label2466label1:467 ret i32 1468label2:469 ret i32 0470}471 472define i32 @brRI_ult(float %x) {473;474; CHECK-SF-LABEL: brRI_ult:475; CHECK-SF: # %bb.0: # %entry476; CHECK-SF-NEXT: movih32 a0, 16672477; CHECK-SF-NEXT: fmtvrl vr1, a0478; CHECK-SF-NEXT: fcmphss vr0, vr1479; CHECK-SF-NEXT: bt32 .LBB13_2480; CHECK-SF-NEXT: # %bb.1: # %label1481; CHECK-SF-NEXT: movi16 a0, 1482; CHECK-SF-NEXT: rts16483; CHECK-SF-NEXT: .LBB13_2: # %label2484; CHECK-SF-NEXT: movi16 a0, 0485; CHECK-SF-NEXT: rts16486;487; CHECK-SF2-LABEL: brRI_ult:488; CHECK-SF2: # %bb.0: # %entry489; CHECK-SF2-NEXT: movih32 a0, 16672490; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0491; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1492; CHECK-SF2-NEXT: bt32 .LBB13_2493; CHECK-SF2-NEXT: # %bb.1: # %label1494; CHECK-SF2-NEXT: movi16 a0, 1495; CHECK-SF2-NEXT: rts16496; CHECK-SF2-NEXT: .LBB13_2: # %label2497; CHECK-SF2-NEXT: movi16 a0, 0498; CHECK-SF2-NEXT: rts16499entry:500 %fcmp = fcmp ult float %x, 10.0501 br i1 %fcmp, label %label1, label %label2502label1:503 ret i32 1504label2:505 ret i32 0506}507 508define i32 @brR0_ult(float %x) {509;510; CHECK-SF-LABEL: brR0_ult:511; CHECK-SF: # %bb.0: # %entry512; CHECK-SF-NEXT: fcmpzhss vr0513; CHECK-SF-NEXT: bt32 .LBB14_2514; CHECK-SF-NEXT: # %bb.1: # %label1515; CHECK-SF-NEXT: movi16 a0, 1516; CHECK-SF-NEXT: rts16517; CHECK-SF-NEXT: .LBB14_2: # %label2518; CHECK-SF-NEXT: movi16 a0, 0519; CHECK-SF-NEXT: rts16520;521; CHECK-SF2-LABEL: brR0_ult:522; CHECK-SF2: # %bb.0: # %entry523; CHECK-SF2-NEXT: fcmphsz.32 vr0524; CHECK-SF2-NEXT: bt32 .LBB14_2525; CHECK-SF2-NEXT: # %bb.1: # %label1526; CHECK-SF2-NEXT: movi16 a0, 1527; CHECK-SF2-NEXT: rts16528; CHECK-SF2-NEXT: .LBB14_2: # %label2529; CHECK-SF2-NEXT: movi16 a0, 0530; CHECK-SF2-NEXT: rts16531entry:532 %fcmp = fcmp ult float %x, 0.0533 br i1 %fcmp, label %label1, label %label2534label1:535 ret i32 1536label2:537 ret i32 0538}539 540;ULE541define i32 @brRR_ule(float %x, float %y) {542;543; CHECK-SF-LABEL: brRR_ule:544; CHECK-SF: # %bb.0: # %entry545; CHECK-SF-NEXT: fcmplts vr0, vr1546; CHECK-SF-NEXT: bt32 .LBB15_2547; CHECK-SF-NEXT: # %bb.1: # %label1548; CHECK-SF-NEXT: movi16 a0, 1549; CHECK-SF-NEXT: rts16550; CHECK-SF-NEXT: .LBB15_2: # %label2551; CHECK-SF-NEXT: movi16 a0, 0552; CHECK-SF-NEXT: rts16553;554; CHECK-SF2-LABEL: brRR_ule:555; CHECK-SF2: # %bb.0: # %entry556; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1557; CHECK-SF2-NEXT: bt32 .LBB15_2558; CHECK-SF2-NEXT: # %bb.1: # %label1559; CHECK-SF2-NEXT: movi16 a0, 1560; CHECK-SF2-NEXT: rts16561; CHECK-SF2-NEXT: .LBB15_2: # %label2562; CHECK-SF2-NEXT: movi16 a0, 0563; CHECK-SF2-NEXT: rts16564entry:565 %fcmp = fcmp ule float %y, %x566 br i1 %fcmp, label %label1, label %label2567label1:568 ret i32 1569label2:570 ret i32 0571}572 573define i32 @brRI_ule(float %x) {574;575; CHECK-SF-LABEL: brRI_ule:576; CHECK-SF: # %bb.0: # %entry577; CHECK-SF-NEXT: movih32 a0, 16672578; CHECK-SF-NEXT: fmtvrl vr1, a0579; CHECK-SF-NEXT: fcmplts vr1, vr0580; CHECK-SF-NEXT: bt32 .LBB16_2581; CHECK-SF-NEXT: # %bb.1: # %label1582; CHECK-SF-NEXT: movi16 a0, 1583; CHECK-SF-NEXT: rts16584; CHECK-SF-NEXT: .LBB16_2: # %label2585; CHECK-SF-NEXT: movi16 a0, 0586; CHECK-SF-NEXT: rts16587;588; CHECK-SF2-LABEL: brRI_ule:589; CHECK-SF2: # %bb.0: # %entry590; CHECK-SF2-NEXT: movih32 a0, 16672591; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0592; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0593; CHECK-SF2-NEXT: bt32 .LBB16_2594; CHECK-SF2-NEXT: # %bb.1: # %label1595; CHECK-SF2-NEXT: movi16 a0, 1596; CHECK-SF2-NEXT: rts16597; CHECK-SF2-NEXT: .LBB16_2: # %label2598; CHECK-SF2-NEXT: movi16 a0, 0599; CHECK-SF2-NEXT: rts16600entry:601 %fcmp = fcmp ule float %x, 10.0602 br i1 %fcmp, label %label1, label %label2603label1:604 ret i32 1605label2:606 ret i32 0607}608 609define i32 @brR0_ule(float %x) {610;611; CHECK-SF-LABEL: brR0_ule:612; CHECK-SF: # %bb.0: # %entry613; CHECK-SF-NEXT: fcmpzlss vr0614; CHECK-SF-NEXT: bf32 .LBB17_2615; CHECK-SF-NEXT: # %bb.1: # %label1616; CHECK-SF-NEXT: movi16 a0, 1617; CHECK-SF-NEXT: rts16618; CHECK-SF-NEXT: .LBB17_2: # %label2619; CHECK-SF-NEXT: movi16 a0, 0620; CHECK-SF-NEXT: rts16621;622; CHECK-SF2-LABEL: brR0_ule:623; CHECK-SF2: # %bb.0: # %entry624; CHECK-SF2-NEXT: fcmphz.32 vr0625; CHECK-SF2-NEXT: bt32 .LBB17_2626; CHECK-SF2-NEXT: # %bb.1: # %label1627; CHECK-SF2-NEXT: movi16 a0, 1628; CHECK-SF2-NEXT: rts16629; CHECK-SF2-NEXT: .LBB17_2: # %label2630; CHECK-SF2-NEXT: movi16 a0, 0631; CHECK-SF2-NEXT: rts16632entry:633 %fcmp = fcmp ule float %x, 0.0634 br i1 %fcmp, label %label1, label %label2635label1:636 ret i32 1637label2:638 ret i32 0639}640 641;SGT642define i32 @brRR_ogt(float %x, float %y) {643;644; CHECK-SF-LABEL: brRR_ogt:645; CHECK-SF: # %bb.0: # %entry646; CHECK-SF-NEXT: fcmplts vr0, vr1647; CHECK-SF-NEXT: bf32 .LBB18_2648; CHECK-SF-NEXT: # %bb.1: # %label1649; CHECK-SF-NEXT: movi16 a0, 1650; CHECK-SF-NEXT: rts16651; CHECK-SF-NEXT: .LBB18_2: # %label2652; CHECK-SF-NEXT: movi16 a0, 0653; CHECK-SF-NEXT: rts16654;655; CHECK-SF2-LABEL: brRR_ogt:656; CHECK-SF2: # %bb.0: # %entry657; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1658; CHECK-SF2-NEXT: bf32 .LBB18_2659; CHECK-SF2-NEXT: # %bb.1: # %label1660; CHECK-SF2-NEXT: movi16 a0, 1661; CHECK-SF2-NEXT: rts16662; CHECK-SF2-NEXT: .LBB18_2: # %label2663; CHECK-SF2-NEXT: movi16 a0, 0664; CHECK-SF2-NEXT: rts16665entry:666 %fcmp = fcmp ogt float %y, %x667 br i1 %fcmp, label %label1, label %label2668label1:669 ret i32 1670label2:671 ret i32 0672}673 674define i32 @brRI_ogt(float %x) {675;676; CHECK-SF-LABEL: brRI_ogt:677; CHECK-SF: # %bb.0: # %entry678; CHECK-SF-NEXT: movih32 a0, 16672679; CHECK-SF-NEXT: fmtvrl vr1, a0680; CHECK-SF-NEXT: fcmplts vr1, vr0681; CHECK-SF-NEXT: bf32 .LBB19_2682; CHECK-SF-NEXT: # %bb.1: # %label1683; CHECK-SF-NEXT: movi16 a0, 1684; CHECK-SF-NEXT: rts16685; CHECK-SF-NEXT: .LBB19_2: # %label2686; CHECK-SF-NEXT: movi16 a0, 0687; CHECK-SF-NEXT: rts16688;689; CHECK-SF2-LABEL: brRI_ogt:690; CHECK-SF2: # %bb.0: # %entry691; CHECK-SF2-NEXT: movih32 a0, 16672692; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0693; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0694; CHECK-SF2-NEXT: bf32 .LBB19_2695; CHECK-SF2-NEXT: # %bb.1: # %label1696; CHECK-SF2-NEXT: movi16 a0, 1697; CHECK-SF2-NEXT: rts16698; CHECK-SF2-NEXT: .LBB19_2: # %label2699; CHECK-SF2-NEXT: movi16 a0, 0700; CHECK-SF2-NEXT: rts16701entry:702 %fcmp = fcmp ogt float %x, 10.0703 br i1 %fcmp, label %label1, label %label2704label1:705 ret i32 1706label2:707 ret i32 0708}709 710define i32 @brR0_ogt(float %x) {711;712; CHECK-SF-LABEL: brR0_ogt:713; CHECK-SF: # %bb.0: # %entry714; CHECK-SF-NEXT: movi16 a0, 0715; CHECK-SF-NEXT: fmtvrl vr1, a0716; CHECK-SF-NEXT: fcmplts vr1, vr0717; CHECK-SF-NEXT: bf32 .LBB20_2718; CHECK-SF-NEXT: # %bb.1: # %label1719; CHECK-SF-NEXT: movi16 a0, 1720; CHECK-SF-NEXT: .LBB20_2: # %label2721; CHECK-SF-NEXT: rts16722;723; CHECK-SF2-LABEL: brR0_ogt:724; CHECK-SF2: # %bb.0: # %entry725; CHECK-SF2-NEXT: movi16 a0, 0726; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0727; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0728; CHECK-SF2-NEXT: bf32 .LBB20_2729; CHECK-SF2-NEXT: # %bb.1: # %label1730; CHECK-SF2-NEXT: movi16 a0, 1731; CHECK-SF2-NEXT: .LBB20_2: # %label2732; CHECK-SF2-NEXT: rts16733entry:734 %fcmp = fcmp ogt float %x, 0.0735 br i1 %fcmp, label %label1, label %label2736label1:737 ret i32 1738label2:739 ret i32 0740}741 742;SGE743define i32 @brRR_oge(float %x, float %y) {744;745; CHECK-SF-LABEL: brRR_oge:746; CHECK-SF: # %bb.0: # %entry747; CHECK-SF-NEXT: fcmphss vr1, vr0748; CHECK-SF-NEXT: bf32 .LBB21_2749; CHECK-SF-NEXT: # %bb.1: # %label1750; CHECK-SF-NEXT: movi16 a0, 1751; CHECK-SF-NEXT: rts16752; CHECK-SF-NEXT: .LBB21_2: # %label2753; CHECK-SF-NEXT: movi16 a0, 0754; CHECK-SF-NEXT: rts16755;756; CHECK-SF2-LABEL: brRR_oge:757; CHECK-SF2: # %bb.0: # %entry758; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0759; CHECK-SF2-NEXT: bf32 .LBB21_2760; CHECK-SF2-NEXT: # %bb.1: # %label1761; CHECK-SF2-NEXT: movi16 a0, 1762; CHECK-SF2-NEXT: rts16763; CHECK-SF2-NEXT: .LBB21_2: # %label2764; CHECK-SF2-NEXT: movi16 a0, 0765; CHECK-SF2-NEXT: rts16766entry:767 %fcmp = fcmp oge float %y, %x768 br i1 %fcmp, label %label1, label %label2769label1:770 ret i32 1771label2:772 ret i32 0773}774 775define i32 @brRI_oge(float %x) {776;777; CHECK-SF-LABEL: brRI_oge:778; CHECK-SF: # %bb.0: # %entry779; CHECK-SF-NEXT: movih32 a0, 16672780; CHECK-SF-NEXT: fmtvrl vr1, a0781; CHECK-SF-NEXT: fcmphss vr0, vr1782; CHECK-SF-NEXT: bf32 .LBB22_2783; CHECK-SF-NEXT: # %bb.1: # %label1784; CHECK-SF-NEXT: movi16 a0, 1785; CHECK-SF-NEXT: rts16786; CHECK-SF-NEXT: .LBB22_2: # %label2787; CHECK-SF-NEXT: movi16 a0, 0788; CHECK-SF-NEXT: rts16789;790; CHECK-SF2-LABEL: brRI_oge:791; CHECK-SF2: # %bb.0: # %entry792; CHECK-SF2-NEXT: movih32 a0, 16672793; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0794; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1795; CHECK-SF2-NEXT: bf32 .LBB22_2796; CHECK-SF2-NEXT: # %bb.1: # %label1797; CHECK-SF2-NEXT: movi16 a0, 1798; CHECK-SF2-NEXT: rts16799; CHECK-SF2-NEXT: .LBB22_2: # %label2800; CHECK-SF2-NEXT: movi16 a0, 0801; CHECK-SF2-NEXT: rts16802entry:803 %fcmp = fcmp oge float %x, 10.0804 br i1 %fcmp, label %label1, label %label2805label1:806 ret i32 1807label2:808 ret i32 0809}810 811define i32 @brR0_oge(float %x) {812;813; CHECK-SF-LABEL: brR0_oge:814; CHECK-SF: # %bb.0: # %entry815; CHECK-SF-NEXT: movi16 a0, 0816; CHECK-SF-NEXT: fmtvrl vr1, a0817; CHECK-SF-NEXT: fcmphss vr0, vr1818; CHECK-SF-NEXT: bf32 .LBB23_2819; CHECK-SF-NEXT: # %bb.1: # %label1820; CHECK-SF-NEXT: movi16 a0, 1821; CHECK-SF-NEXT: .LBB23_2: # %label2822; CHECK-SF-NEXT: rts16823;824; CHECK-SF2-LABEL: brR0_oge:825; CHECK-SF2: # %bb.0: # %entry826; CHECK-SF2-NEXT: movi16 a0, 0827; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0828; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1829; CHECK-SF2-NEXT: bf32 .LBB23_2830; CHECK-SF2-NEXT: # %bb.1: # %label1831; CHECK-SF2-NEXT: movi16 a0, 1832; CHECK-SF2-NEXT: .LBB23_2: # %label2833; CHECK-SF2-NEXT: rts16834entry:835 %fcmp = fcmp oge float %x, 0.0836 br i1 %fcmp, label %label1, label %label2837label1:838 ret i32 1839label2:840 ret i32 0841}842 843;SLT844define i32 @brRR_olt(float %x, float %y) {845;846; CHECK-SF-LABEL: brRR_olt:847; CHECK-SF: # %bb.0: # %entry848; CHECK-SF-NEXT: fcmplts vr1, vr0849; CHECK-SF-NEXT: bf32 .LBB24_2850; CHECK-SF-NEXT: # %bb.1: # %label1851; CHECK-SF-NEXT: movi16 a0, 1852; CHECK-SF-NEXT: rts16853; CHECK-SF-NEXT: .LBB24_2: # %label2854; CHECK-SF-NEXT: movi16 a0, 0855; CHECK-SF-NEXT: rts16856;857; CHECK-SF2-LABEL: brRR_olt:858; CHECK-SF2: # %bb.0: # %entry859; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0860; CHECK-SF2-NEXT: bf32 .LBB24_2861; CHECK-SF2-NEXT: # %bb.1: # %label1862; CHECK-SF2-NEXT: movi16 a0, 1863; CHECK-SF2-NEXT: rts16864; CHECK-SF2-NEXT: .LBB24_2: # %label2865; CHECK-SF2-NEXT: movi16 a0, 0866; CHECK-SF2-NEXT: rts16867entry:868 %fcmp = fcmp olt float %y, %x869 br i1 %fcmp, label %label1, label %label2870label1:871 ret i32 1872label2:873 ret i32 0874}875 876define i32 @brRI_olt(float %x) {877;878; CHECK-SF-LABEL: brRI_olt:879; CHECK-SF: # %bb.0: # %entry880; CHECK-SF-NEXT: movih32 a0, 16672881; CHECK-SF-NEXT: fmtvrl vr1, a0882; CHECK-SF-NEXT: fcmplts vr0, vr1883; CHECK-SF-NEXT: bf32 .LBB25_2884; CHECK-SF-NEXT: # %bb.1: # %label1885; CHECK-SF-NEXT: movi16 a0, 1886; CHECK-SF-NEXT: rts16887; CHECK-SF-NEXT: .LBB25_2: # %label2888; CHECK-SF-NEXT: movi16 a0, 0889; CHECK-SF-NEXT: rts16890;891; CHECK-SF2-LABEL: brRI_olt:892; CHECK-SF2: # %bb.0: # %entry893; CHECK-SF2-NEXT: movih32 a0, 16672894; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0895; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1896; CHECK-SF2-NEXT: bf32 .LBB25_2897; CHECK-SF2-NEXT: # %bb.1: # %label1898; CHECK-SF2-NEXT: movi16 a0, 1899; CHECK-SF2-NEXT: rts16900; CHECK-SF2-NEXT: .LBB25_2: # %label2901; CHECK-SF2-NEXT: movi16 a0, 0902; CHECK-SF2-NEXT: rts16903entry:904 %fcmp = fcmp olt float %x, 10.0905 br i1 %fcmp, label %label1, label %label2906label1:907 ret i32 1908label2:909 ret i32 0910}911 912define i32 @brR0_olt(float %x) {913;914; CHECK-SF-LABEL: brR0_olt:915; CHECK-SF: # %bb.0: # %entry916; CHECK-SF-NEXT: movi16 a0, 0917; CHECK-SF-NEXT: fmtvrl vr1, a0918; CHECK-SF-NEXT: fcmplts vr0, vr1919; CHECK-SF-NEXT: bf32 .LBB26_2920; CHECK-SF-NEXT: # %bb.1: # %label1921; CHECK-SF-NEXT: movi16 a0, 1922; CHECK-SF-NEXT: .LBB26_2: # %label2923; CHECK-SF-NEXT: rts16924;925; CHECK-SF2-LABEL: brR0_olt:926; CHECK-SF2: # %bb.0: # %entry927; CHECK-SF2-NEXT: movi16 a0, 0928; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0929; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1930; CHECK-SF2-NEXT: bf32 .LBB26_2931; CHECK-SF2-NEXT: # %bb.1: # %label1932; CHECK-SF2-NEXT: movi16 a0, 1933; CHECK-SF2-NEXT: .LBB26_2: # %label2934; CHECK-SF2-NEXT: rts16935entry:936 %fcmp = fcmp olt float %x, 0.0937 br i1 %fcmp, label %label1, label %label2938label1:939 ret i32 1940label2:941 ret i32 0942}943 944;SLE945define i32 @brRR_ole(float %x, float %y) {946;947; CHECK-SF-LABEL: brRR_ole:948; CHECK-SF: # %bb.0: # %entry949; CHECK-SF-NEXT: fcmphss vr0, vr1950; CHECK-SF-NEXT: bf32 .LBB27_2951; CHECK-SF-NEXT: # %bb.1: # %label1952; CHECK-SF-NEXT: movi16 a0, 1953; CHECK-SF-NEXT: rts16954; CHECK-SF-NEXT: .LBB27_2: # %label2955; CHECK-SF-NEXT: movi16 a0, 0956; CHECK-SF-NEXT: rts16957;958; CHECK-SF2-LABEL: brRR_ole:959; CHECK-SF2: # %bb.0: # %entry960; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1961; CHECK-SF2-NEXT: bf32 .LBB27_2962; CHECK-SF2-NEXT: # %bb.1: # %label1963; CHECK-SF2-NEXT: movi16 a0, 1964; CHECK-SF2-NEXT: rts16965; CHECK-SF2-NEXT: .LBB27_2: # %label2966; CHECK-SF2-NEXT: movi16 a0, 0967; CHECK-SF2-NEXT: rts16968entry:969 %fcmp = fcmp ole float %y, %x970 br i1 %fcmp, label %label1, label %label2971label1:972 ret i32 1973label2:974 ret i32 0975}976 977define i32 @brRI_ole(float %x) {978;979; CHECK-SF-LABEL: brRI_ole:980; CHECK-SF: # %bb.0: # %entry981; CHECK-SF-NEXT: movih32 a0, 16672982; CHECK-SF-NEXT: fmtvrl vr1, a0983; CHECK-SF-NEXT: fcmphss vr1, vr0984; CHECK-SF-NEXT: bf32 .LBB28_2985; CHECK-SF-NEXT: # %bb.1: # %label1986; CHECK-SF-NEXT: movi16 a0, 1987; CHECK-SF-NEXT: rts16988; CHECK-SF-NEXT: .LBB28_2: # %label2989; CHECK-SF-NEXT: movi16 a0, 0990; CHECK-SF-NEXT: rts16991;992; CHECK-SF2-LABEL: brRI_ole:993; CHECK-SF2: # %bb.0: # %entry994; CHECK-SF2-NEXT: movih32 a0, 16672995; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0996; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0997; CHECK-SF2-NEXT: bf32 .LBB28_2998; CHECK-SF2-NEXT: # %bb.1: # %label1999; CHECK-SF2-NEXT: movi16 a0, 11000; CHECK-SF2-NEXT: rts161001; CHECK-SF2-NEXT: .LBB28_2: # %label21002; CHECK-SF2-NEXT: movi16 a0, 01003; CHECK-SF2-NEXT: rts161004entry:1005 %fcmp = fcmp ole float %x, 10.01006 br i1 %fcmp, label %label1, label %label21007label1:1008 ret i32 11009label2:1010 ret i32 01011}1012 1013define i32 @brR0_ole(float %x) {1014;1015; CHECK-SF-LABEL: brR0_ole:1016; CHECK-SF: # %bb.0: # %entry1017; CHECK-SF-NEXT: movi16 a0, 01018; CHECK-SF-NEXT: fmtvrl vr1, a01019; CHECK-SF-NEXT: fcmphss vr1, vr01020; CHECK-SF-NEXT: bf32 .LBB29_21021; CHECK-SF-NEXT: # %bb.1: # %label11022; CHECK-SF-NEXT: movi16 a0, 11023; CHECK-SF-NEXT: .LBB29_2: # %label21024; CHECK-SF-NEXT: rts161025;1026; CHECK-SF2-LABEL: brR0_ole:1027; CHECK-SF2: # %bb.0: # %entry1028; CHECK-SF2-NEXT: movi16 a0, 01029; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a01030; CHECK-SF2-NEXT: fcmphs.32 vr1, vr01031; CHECK-SF2-NEXT: bf32 .LBB29_21032; CHECK-SF2-NEXT: # %bb.1: # %label11033; CHECK-SF2-NEXT: movi16 a0, 11034; CHECK-SF2-NEXT: .LBB29_2: # %label21035; CHECK-SF2-NEXT: rts161036entry:1037 %fcmp = fcmp ole float %x, 0.01038 br i1 %fcmp, label %label1, label %label21039label1:1040 ret i32 11041label2:1042 ret i32 01043}1044 1045;False1046define i32 @brRR_false(float %x, float %y) {1047;1048; CHECK-SF-LABEL: brRR_false:1049; CHECK-SF: # %bb.0: # %entry1050; CHECK-SF-NEXT: movi16 a0, 11051; CHECK-SF-NEXT: btsti16 a0, 01052; CHECK-SF-NEXT: bt32 .LBB30_21053; CHECK-SF-NEXT: # %bb.1: # %label11054; CHECK-SF-NEXT: rts161055; CHECK-SF-NEXT: .LBB30_2: # %label21056; CHECK-SF-NEXT: movi16 a0, 01057; CHECK-SF-NEXT: rts161058;1059; CHECK-SF2-LABEL: brRR_false:1060; CHECK-SF2: # %bb.0: # %entry1061; CHECK-SF2-NEXT: movi16 a0, 11062; CHECK-SF2-NEXT: btsti16 a0, 01063; CHECK-SF2-NEXT: bt32 .LBB30_21064; CHECK-SF2-NEXT: # %bb.1: # %label11065; CHECK-SF2-NEXT: rts161066; CHECK-SF2-NEXT: .LBB30_2: # %label21067; CHECK-SF2-NEXT: movi16 a0, 01068; CHECK-SF2-NEXT: rts161069entry:1070 %fcmp = fcmp false float %y, %x1071 br i1 %fcmp, label %label1, label %label21072label1:1073 ret i32 11074label2:1075 ret i32 01076}1077 1078define i32 @brRI_false(float %x) {1079;1080; CHECK-SF-LABEL: brRI_false:1081; CHECK-SF: # %bb.0: # %entry1082; CHECK-SF-NEXT: movi16 a0, 11083; CHECK-SF-NEXT: btsti16 a0, 01084; CHECK-SF-NEXT: bt32 .LBB31_21085; CHECK-SF-NEXT: # %bb.1: # %label11086; CHECK-SF-NEXT: rts161087; CHECK-SF-NEXT: .LBB31_2: # %label21088; CHECK-SF-NEXT: movi16 a0, 01089; CHECK-SF-NEXT: rts161090;1091; CHECK-SF2-LABEL: brRI_false:1092; CHECK-SF2: # %bb.0: # %entry1093; CHECK-SF2-NEXT: movi16 a0, 11094; CHECK-SF2-NEXT: btsti16 a0, 01095; CHECK-SF2-NEXT: bt32 .LBB31_21096; CHECK-SF2-NEXT: # %bb.1: # %label11097; CHECK-SF2-NEXT: rts161098; CHECK-SF2-NEXT: .LBB31_2: # %label21099; CHECK-SF2-NEXT: movi16 a0, 01100; CHECK-SF2-NEXT: rts161101entry:1102 %fcmp = fcmp false float %x, 10.01103 br i1 %fcmp, label %label1, label %label21104label1:1105 ret i32 11106label2:1107 ret i32 01108}1109 1110define i32 @brR0_false(float %x) {1111;1112; CHECK-SF-LABEL: brR0_false:1113; CHECK-SF: # %bb.0: # %entry1114; CHECK-SF-NEXT: movi16 a0, 11115; CHECK-SF-NEXT: btsti16 a0, 01116; CHECK-SF-NEXT: bt32 .LBB32_21117; CHECK-SF-NEXT: # %bb.1: # %label11118; CHECK-SF-NEXT: rts161119; CHECK-SF-NEXT: .LBB32_2: # %label21120; CHECK-SF-NEXT: movi16 a0, 01121; CHECK-SF-NEXT: rts161122;1123; CHECK-SF2-LABEL: brR0_false:1124; CHECK-SF2: # %bb.0: # %entry1125; CHECK-SF2-NEXT: movi16 a0, 11126; CHECK-SF2-NEXT: btsti16 a0, 01127; CHECK-SF2-NEXT: bt32 .LBB32_21128; CHECK-SF2-NEXT: # %bb.1: # %label11129; CHECK-SF2-NEXT: rts161130; CHECK-SF2-NEXT: .LBB32_2: # %label21131; CHECK-SF2-NEXT: movi16 a0, 01132; CHECK-SF2-NEXT: rts161133entry:1134 %fcmp = fcmp false float %x, 0.01135 br i1 %fcmp, label %label1, label %label21136label1:1137 ret i32 11138label2:1139 ret i32 01140}1141 1142 1143;ORD1144define i32 @brRR_ord(float %x, float %y) {1145;1146; CHECK-SF-LABEL: brRR_ord:1147; CHECK-SF: # %bb.0: # %entry1148; CHECK-SF-NEXT: fcmpuos vr1, vr01149; CHECK-SF-NEXT: bt32 .LBB33_21150; CHECK-SF-NEXT: # %bb.1: # %label11151; CHECK-SF-NEXT: movi16 a0, 11152; CHECK-SF-NEXT: rts161153; CHECK-SF-NEXT: .LBB33_2: # %label21154; CHECK-SF-NEXT: movi16 a0, 01155; CHECK-SF-NEXT: rts161156;1157; CHECK-SF2-LABEL: brRR_ord:1158; CHECK-SF2: # %bb.0: # %entry1159; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr01160; CHECK-SF2-NEXT: bt32 .LBB33_21161; CHECK-SF2-NEXT: # %bb.1: # %label11162; CHECK-SF2-NEXT: movi16 a0, 11163; CHECK-SF2-NEXT: rts161164; CHECK-SF2-NEXT: .LBB33_2: # %label21165; CHECK-SF2-NEXT: movi16 a0, 01166; CHECK-SF2-NEXT: rts161167entry:1168 %fcmp = fcmp ord float %y, %x1169 br i1 %fcmp, label %label1, label %label21170label1:1171 ret i32 11172label2:1173 ret i32 01174}1175 1176define i32 @brRI_ord(float %x) {1177;1178; CHECK-SF-LABEL: brRI_ord:1179; CHECK-SF: # %bb.0: # %entry1180; CHECK-SF-NEXT: fcmpuos vr0, vr01181; CHECK-SF-NEXT: bt32 .LBB34_21182; CHECK-SF-NEXT: # %bb.1: # %label11183; CHECK-SF-NEXT: movi16 a0, 11184; CHECK-SF-NEXT: rts161185; CHECK-SF-NEXT: .LBB34_2: # %label21186; CHECK-SF-NEXT: movi16 a0, 01187; CHECK-SF-NEXT: rts161188;1189; CHECK-SF2-LABEL: brRI_ord:1190; CHECK-SF2: # %bb.0: # %entry1191; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01192; CHECK-SF2-NEXT: bt32 .LBB34_21193; CHECK-SF2-NEXT: # %bb.1: # %label11194; CHECK-SF2-NEXT: movi16 a0, 11195; CHECK-SF2-NEXT: rts161196; CHECK-SF2-NEXT: .LBB34_2: # %label21197; CHECK-SF2-NEXT: movi16 a0, 01198; CHECK-SF2-NEXT: rts161199entry:1200 %fcmp = fcmp ord float %x, 10.01201 br i1 %fcmp, label %label1, label %label21202label1:1203 ret i32 11204label2:1205 ret i32 01206}1207 1208define i32 @brR0_ord(float %x) {1209;1210; CHECK-SF-LABEL: brR0_ord:1211; CHECK-SF: # %bb.0: # %entry1212; CHECK-SF-NEXT: fcmpuos vr0, vr01213; CHECK-SF-NEXT: bt32 .LBB35_21214; CHECK-SF-NEXT: # %bb.1: # %label11215; CHECK-SF-NEXT: movi16 a0, 11216; CHECK-SF-NEXT: rts161217; CHECK-SF-NEXT: .LBB35_2: # %label21218; CHECK-SF-NEXT: movi16 a0, 01219; CHECK-SF-NEXT: rts161220;1221; CHECK-SF2-LABEL: brR0_ord:1222; CHECK-SF2: # %bb.0: # %entry1223; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01224; CHECK-SF2-NEXT: bt32 .LBB35_21225; CHECK-SF2-NEXT: # %bb.1: # %label11226; CHECK-SF2-NEXT: movi16 a0, 11227; CHECK-SF2-NEXT: rts161228; CHECK-SF2-NEXT: .LBB35_2: # %label21229; CHECK-SF2-NEXT: movi16 a0, 01230; CHECK-SF2-NEXT: rts161231entry:1232 %fcmp = fcmp ord float %x, 0.01233 br i1 %fcmp, label %label1, label %label21234label1:1235 ret i32 11236label2:1237 ret i32 01238}1239 1240 1241;UEQ1242define i32 @brRR_ueq(float %x, float %y) {1243;1244; CHECK-SF-LABEL: brRR_ueq:1245; CHECK-SF: # %bb.0: # %entry1246; CHECK-SF-NEXT: fcmpuos vr1, vr01247; CHECK-SF-NEXT: mvcv16 a01248; CHECK-SF-NEXT: fcmpnes vr1, vr01249; CHECK-SF-NEXT: mvc32 a11250; CHECK-SF-NEXT: and16 a0, a11251; CHECK-SF-NEXT: btsti16 a0, 01252; CHECK-SF-NEXT: bf32 .LBB36_21253; CHECK-SF-NEXT: # %bb.1: # %label21254; CHECK-SF-NEXT: movi16 a0, 01255; CHECK-SF-NEXT: rts161256; CHECK-SF-NEXT: .LBB36_2: # %label11257; CHECK-SF-NEXT: movi16 a0, 11258; CHECK-SF-NEXT: rts161259;1260; CHECK-SF2-LABEL: brRR_ueq:1261; CHECK-SF2: # %bb.0: # %entry1262; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr01263; CHECK-SF2-NEXT: mvcv16 a01264; CHECK-SF2-NEXT: fcmpne.32 vr1, vr01265; CHECK-SF2-NEXT: mvc32 a11266; CHECK-SF2-NEXT: and16 a0, a11267; CHECK-SF2-NEXT: btsti16 a0, 01268; CHECK-SF2-NEXT: bf32 .LBB36_21269; CHECK-SF2-NEXT: # %bb.1: # %label21270; CHECK-SF2-NEXT: movi16 a0, 01271; CHECK-SF2-NEXT: rts161272; CHECK-SF2-NEXT: .LBB36_2: # %label11273; CHECK-SF2-NEXT: movi16 a0, 11274; CHECK-SF2-NEXT: rts161275entry:1276 %fcmp = fcmp ueq float %y, %x1277 br i1 %fcmp, label %label1, label %label21278label1:1279 ret i32 11280label2:1281 ret i32 01282}1283 1284define i32 @brRI_ueq(float %x) {1285;1286; CHECK-SF-LABEL: brRI_ueq:1287; CHECK-SF: # %bb.0: # %entry1288; CHECK-SF-NEXT: movih32 a0, 166721289; CHECK-SF-NEXT: fmtvrl vr1, a01290; CHECK-SF-NEXT: fcmpnes vr0, vr11291; CHECK-SF-NEXT: mvc32 a01292; CHECK-SF-NEXT: fcmpuos vr0, vr01293; CHECK-SF-NEXT: mvcv16 a11294; CHECK-SF-NEXT: and16 a0, a11295; CHECK-SF-NEXT: btsti16 a0, 01296; CHECK-SF-NEXT: bf32 .LBB37_21297; CHECK-SF-NEXT: # %bb.1: # %label21298; CHECK-SF-NEXT: movi16 a0, 01299; CHECK-SF-NEXT: rts161300; CHECK-SF-NEXT: .LBB37_2: # %label11301; CHECK-SF-NEXT: movi16 a0, 11302; CHECK-SF-NEXT: rts161303;1304; CHECK-SF2-LABEL: brRI_ueq:1305; CHECK-SF2: # %bb.0: # %entry1306; CHECK-SF2-NEXT: movih32 a0, 166721307; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a01308; CHECK-SF2-NEXT: fcmpne.32 vr0, vr11309; CHECK-SF2-NEXT: mvc32 a01310; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01311; CHECK-SF2-NEXT: mvcv16 a11312; CHECK-SF2-NEXT: and16 a0, a11313; CHECK-SF2-NEXT: btsti16 a0, 01314; CHECK-SF2-NEXT: bf32 .LBB37_21315; CHECK-SF2-NEXT: # %bb.1: # %label21316; CHECK-SF2-NEXT: movi16 a0, 01317; CHECK-SF2-NEXT: rts161318; CHECK-SF2-NEXT: .LBB37_2: # %label11319; CHECK-SF2-NEXT: movi16 a0, 11320; CHECK-SF2-NEXT: rts161321entry:1322 %fcmp = fcmp ueq float %x, 10.01323 br i1 %fcmp, label %label1, label %label21324label1:1325 ret i32 11326label2:1327 ret i32 01328}1329 1330define i32 @brR0_ueq(float %x) {1331;1332; CHECK-SF-LABEL: brR0_ueq:1333; CHECK-SF: # %bb.0: # %entry1334; CHECK-SF-NEXT: fcmpuos vr0, vr01335; CHECK-SF-NEXT: mvcv16 a01336; CHECK-SF-NEXT: fcmpznes vr01337; CHECK-SF-NEXT: mvc32 a11338; CHECK-SF-NEXT: and16 a0, a11339; CHECK-SF-NEXT: btsti16 a0, 01340; CHECK-SF-NEXT: bf32 .LBB38_21341; CHECK-SF-NEXT: # %bb.1: # %label21342; CHECK-SF-NEXT: movi16 a0, 01343; CHECK-SF-NEXT: rts161344; CHECK-SF-NEXT: .LBB38_2: # %label11345; CHECK-SF-NEXT: movi16 a0, 11346; CHECK-SF-NEXT: rts161347;1348; CHECK-SF2-LABEL: brR0_ueq:1349; CHECK-SF2: # %bb.0: # %entry1350; CHECK-SF2-NEXT: movi16 a0, 01351; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a01352; CHECK-SF2-NEXT: fcmpne.32 vr0, vr11353; CHECK-SF2-NEXT: mvc32 a01354; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01355; CHECK-SF2-NEXT: mvcv16 a11356; CHECK-SF2-NEXT: and16 a0, a11357; CHECK-SF2-NEXT: btsti16 a0, 01358; CHECK-SF2-NEXT: bf32 .LBB38_21359; CHECK-SF2-NEXT: # %bb.1: # %label21360; CHECK-SF2-NEXT: movi16 a0, 01361; CHECK-SF2-NEXT: rts161362; CHECK-SF2-NEXT: .LBB38_2: # %label11363; CHECK-SF2-NEXT: movi16 a0, 11364; CHECK-SF2-NEXT: rts161365entry:1366 %fcmp = fcmp ueq float %x, 0.01367 br i1 %fcmp, label %label1, label %label21368label1:1369 ret i32 11370label2:1371 ret i32 01372}1373 1374;UNE1375define i32 @brRR_une(float %x, float %y) {1376;1377; CHECK-SF-LABEL: brRR_une:1378; CHECK-SF: # %bb.0: # %entry1379; CHECK-SF-NEXT: fcmpnes vr1, vr01380; CHECK-SF-NEXT: bf32 .LBB39_21381; CHECK-SF-NEXT: # %bb.1: # %label11382; CHECK-SF-NEXT: movi16 a0, 11383; CHECK-SF-NEXT: rts161384; CHECK-SF-NEXT: .LBB39_2: # %label21385; CHECK-SF-NEXT: movi16 a0, 01386; CHECK-SF-NEXT: rts161387;1388; CHECK-SF2-LABEL: brRR_une:1389; CHECK-SF2: # %bb.0: # %entry1390; CHECK-SF2-NEXT: fcmpne.32 vr1, vr01391; CHECK-SF2-NEXT: bf32 .LBB39_21392; CHECK-SF2-NEXT: # %bb.1: # %label11393; CHECK-SF2-NEXT: movi16 a0, 11394; CHECK-SF2-NEXT: rts161395; CHECK-SF2-NEXT: .LBB39_2: # %label21396; CHECK-SF2-NEXT: movi16 a0, 01397; CHECK-SF2-NEXT: rts161398entry:1399 %fcmp = fcmp une float %y, %x1400 br i1 %fcmp, label %label1, label %label21401label1:1402 ret i32 11403label2:1404 ret i32 01405}1406 1407define i32 @brRI_une(float %x) {1408;1409; CHECK-SF-LABEL: brRI_une:1410; CHECK-SF: # %bb.0: # %entry1411; CHECK-SF-NEXT: movih32 a0, 166721412; CHECK-SF-NEXT: fmtvrl vr1, a01413; CHECK-SF-NEXT: fcmpnes vr0, vr11414; CHECK-SF-NEXT: bf32 .LBB40_21415; CHECK-SF-NEXT: # %bb.1: # %label11416; CHECK-SF-NEXT: movi16 a0, 11417; CHECK-SF-NEXT: rts161418; CHECK-SF-NEXT: .LBB40_2: # %label21419; CHECK-SF-NEXT: movi16 a0, 01420; CHECK-SF-NEXT: rts161421;1422; CHECK-SF2-LABEL: brRI_une:1423; CHECK-SF2: # %bb.0: # %entry1424; CHECK-SF2-NEXT: movih32 a0, 166721425; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a01426; CHECK-SF2-NEXT: fcmpne.32 vr0, vr11427; CHECK-SF2-NEXT: bf32 .LBB40_21428; CHECK-SF2-NEXT: # %bb.1: # %label11429; CHECK-SF2-NEXT: movi16 a0, 11430; CHECK-SF2-NEXT: rts161431; CHECK-SF2-NEXT: .LBB40_2: # %label21432; CHECK-SF2-NEXT: movi16 a0, 01433; CHECK-SF2-NEXT: rts161434entry:1435 %fcmp = fcmp une float %x, 10.01436 br i1 %fcmp, label %label1, label %label21437label1:1438 ret i32 11439label2:1440 ret i32 01441}1442 1443define i32 @brR0_une(float %x) {1444;1445; CHECK-SF-LABEL: brR0_une:1446; CHECK-SF: # %bb.0: # %entry1447; CHECK-SF-NEXT: fcmpznes vr01448; CHECK-SF-NEXT: bf32 .LBB41_21449; CHECK-SF-NEXT: # %bb.1: # %label11450; CHECK-SF-NEXT: movi16 a0, 11451; CHECK-SF-NEXT: rts161452; CHECK-SF-NEXT: .LBB41_2: # %label21453; CHECK-SF-NEXT: movi16 a0, 01454; CHECK-SF-NEXT: rts161455;1456; CHECK-SF2-LABEL: brR0_une:1457; CHECK-SF2: # %bb.0: # %entry1458; CHECK-SF2-NEXT: fcmpnez.32 vr01459; CHECK-SF2-NEXT: bf32 .LBB41_21460; CHECK-SF2-NEXT: # %bb.1: # %label11461; CHECK-SF2-NEXT: movi16 a0, 11462; CHECK-SF2-NEXT: rts161463; CHECK-SF2-NEXT: .LBB41_2: # %label21464; CHECK-SF2-NEXT: movi16 a0, 01465; CHECK-SF2-NEXT: rts161466entry:1467 %fcmp = fcmp une float %x, 0.01468 br i1 %fcmp, label %label1, label %label21469label1:1470 ret i32 11471label2:1472 ret i32 01473}1474 1475;UNO1476define i32 @brRR_uno(float %x, float %y) {1477;1478; CHECK-SF-LABEL: brRR_uno:1479; CHECK-SF: # %bb.0: # %entry1480; CHECK-SF-NEXT: fcmpuos vr1, vr01481; CHECK-SF-NEXT: bt32 .LBB42_21482; CHECK-SF-NEXT: # %bb.1: # %label21483; CHECK-SF-NEXT: movi16 a0, 01484; CHECK-SF-NEXT: rts161485; CHECK-SF-NEXT: .LBB42_2: # %label11486; CHECK-SF-NEXT: movi16 a0, 11487; CHECK-SF-NEXT: rts161488;1489; CHECK-SF2-LABEL: brRR_uno:1490; CHECK-SF2: # %bb.0: # %entry1491; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr01492; CHECK-SF2-NEXT: bt32 .LBB42_21493; CHECK-SF2-NEXT: # %bb.1: # %label21494; CHECK-SF2-NEXT: movi16 a0, 01495; CHECK-SF2-NEXT: rts161496; CHECK-SF2-NEXT: .LBB42_2: # %label11497; CHECK-SF2-NEXT: movi16 a0, 11498; CHECK-SF2-NEXT: rts161499entry:1500 %fcmp = fcmp uno float %y, %x1501 br i1 %fcmp, label %label1, label %label21502label1:1503 ret i32 11504label2:1505 ret i32 01506}1507 1508define i32 @brRI_uno(float %x) {1509;1510; CHECK-SF-LABEL: brRI_uno:1511; CHECK-SF: # %bb.0: # %entry1512; CHECK-SF-NEXT: fcmpuos vr0, vr01513; CHECK-SF-NEXT: bt32 .LBB43_21514; CHECK-SF-NEXT: # %bb.1: # %label21515; CHECK-SF-NEXT: movi16 a0, 01516; CHECK-SF-NEXT: rts161517; CHECK-SF-NEXT: .LBB43_2: # %label11518; CHECK-SF-NEXT: movi16 a0, 11519; CHECK-SF-NEXT: rts161520;1521; CHECK-SF2-LABEL: brRI_uno:1522; CHECK-SF2: # %bb.0: # %entry1523; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01524; CHECK-SF2-NEXT: bt32 .LBB43_21525; CHECK-SF2-NEXT: # %bb.1: # %label21526; CHECK-SF2-NEXT: movi16 a0, 01527; CHECK-SF2-NEXT: rts161528; CHECK-SF2-NEXT: .LBB43_2: # %label11529; CHECK-SF2-NEXT: movi16 a0, 11530; CHECK-SF2-NEXT: rts161531entry:1532 %fcmp = fcmp uno float %x, 10.01533 br i1 %fcmp, label %label1, label %label21534label1:1535 ret i32 11536label2:1537 ret i32 01538}1539 1540define i32 @brR0_uno(float %x) {1541;1542; CHECK-SF-LABEL: brR0_uno:1543; CHECK-SF: # %bb.0: # %entry1544; CHECK-SF-NEXT: fcmpuos vr0, vr01545; CHECK-SF-NEXT: bt32 .LBB44_21546; CHECK-SF-NEXT: # %bb.1: # %label21547; CHECK-SF-NEXT: movi16 a0, 01548; CHECK-SF-NEXT: rts161549; CHECK-SF-NEXT: .LBB44_2: # %label11550; CHECK-SF-NEXT: movi16 a0, 11551; CHECK-SF-NEXT: rts161552;1553; CHECK-SF2-LABEL: brR0_uno:1554; CHECK-SF2: # %bb.0: # %entry1555; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr01556; CHECK-SF2-NEXT: bt32 .LBB44_21557; CHECK-SF2-NEXT: # %bb.1: # %label21558; CHECK-SF2-NEXT: movi16 a0, 01559; CHECK-SF2-NEXT: rts161560; CHECK-SF2-NEXT: .LBB44_2: # %label11561; CHECK-SF2-NEXT: movi16 a0, 11562; CHECK-SF2-NEXT: rts161563entry:1564 %fcmp = fcmp uno float %x, 0.01565 br i1 %fcmp, label %label1, label %label21566label1:1567 ret i32 11568label2:1569 ret i32 01570}1571 1572;True1573define i32 @brRR_true(float %x, float %y) {1574;1575; CHECK-SF-LABEL: brRR_true:1576; CHECK-SF: # %bb.0: # %entry1577; CHECK-SF-NEXT: movi16 a0, 01578; CHECK-SF-NEXT: btsti16 a0, 01579; CHECK-SF-NEXT: bt32 .LBB45_21580; CHECK-SF-NEXT: # %bb.1: # %label11581; CHECK-SF-NEXT: movi16 a0, 11582; CHECK-SF-NEXT: .LBB45_2: # %label21583; CHECK-SF-NEXT: rts161584;1585; CHECK-SF2-LABEL: brRR_true:1586; CHECK-SF2: # %bb.0: # %entry1587; CHECK-SF2-NEXT: movi16 a0, 01588; CHECK-SF2-NEXT: btsti16 a0, 01589; CHECK-SF2-NEXT: bt32 .LBB45_21590; CHECK-SF2-NEXT: # %bb.1: # %label11591; CHECK-SF2-NEXT: movi16 a0, 11592; CHECK-SF2-NEXT: .LBB45_2: # %label21593; CHECK-SF2-NEXT: rts161594entry:1595 %fcmp = fcmp true float %y, %x1596 br i1 %fcmp, label %label1, label %label21597label1:1598 ret i32 11599label2:1600 ret i32 01601}1602 1603define i32 @brRI_true(float %x) {1604;1605; CHECK-SF-LABEL: brRI_true:1606; CHECK-SF: # %bb.0: # %entry1607; CHECK-SF-NEXT: movi16 a0, 01608; CHECK-SF-NEXT: btsti16 a0, 01609; CHECK-SF-NEXT: bt32 .LBB46_21610; CHECK-SF-NEXT: # %bb.1: # %label11611; CHECK-SF-NEXT: movi16 a0, 11612; CHECK-SF-NEXT: .LBB46_2: # %label21613; CHECK-SF-NEXT: rts161614;1615; CHECK-SF2-LABEL: brRI_true:1616; CHECK-SF2: # %bb.0: # %entry1617; CHECK-SF2-NEXT: movi16 a0, 01618; CHECK-SF2-NEXT: btsti16 a0, 01619; CHECK-SF2-NEXT: bt32 .LBB46_21620; CHECK-SF2-NEXT: # %bb.1: # %label11621; CHECK-SF2-NEXT: movi16 a0, 11622; CHECK-SF2-NEXT: .LBB46_2: # %label21623; CHECK-SF2-NEXT: rts161624entry:1625 %fcmp = fcmp true float %x, 10.01626 br i1 %fcmp, label %label1, label %label21627label1:1628 ret i32 11629label2:1630 ret i32 01631}1632 1633define i32 @brR0_true(float %x) {1634;1635; CHECK-SF-LABEL: brR0_true:1636; CHECK-SF: # %bb.0: # %entry1637; CHECK-SF-NEXT: movi16 a0, 01638; CHECK-SF-NEXT: btsti16 a0, 01639; CHECK-SF-NEXT: bt32 .LBB47_21640; CHECK-SF-NEXT: # %bb.1: # %label11641; CHECK-SF-NEXT: movi16 a0, 11642; CHECK-SF-NEXT: .LBB47_2: # %label21643; CHECK-SF-NEXT: rts161644;1645; CHECK-SF2-LABEL: brR0_true:1646; CHECK-SF2: # %bb.0: # %entry1647; CHECK-SF2-NEXT: movi16 a0, 01648; CHECK-SF2-NEXT: btsti16 a0, 01649; CHECK-SF2-NEXT: bt32 .LBB47_21650; CHECK-SF2-NEXT: # %bb.1: # %label11651; CHECK-SF2-NEXT: movi16 a0, 11652; CHECK-SF2-NEXT: .LBB47_2: # %label21653; CHECK-SF2-NEXT: rts161654entry:1655 %fcmp = fcmp true float %x, 0.01656 br i1 %fcmp, label %label1, label %label21657label1:1658 ret i32 11659label2:1660 ret i32 01661}1662