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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2 3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf -mattr=+fpuv2_df | FileCheck %s --check-prefix=CHECK-DF4; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf -mattr=+fpuv3_df | FileCheck %s --check-prefix=CHECK-DF25 6 7;ueq8 9define i1 @FCMP_DOUBLE_ueq(double %x, double %y) {10;11;12; CHECK-DF-LABEL: FCMP_DOUBLE_ueq:13; CHECK-DF: # %bb.0: # %entry14; CHECK-DF-NEXT: fcmpuod vr1, vr015; CHECK-DF-NEXT: mvc32 a016; CHECK-DF-NEXT: fcmpned vr1, vr017; CHECK-DF-NEXT: mvcv16 a118; CHECK-DF-NEXT: or16 a0, a119; CHECK-DF-NEXT: rts1620;21; CHECK-DF2-LABEL: FCMP_DOUBLE_ueq:22; CHECK-DF2: # %bb.0: # %entry23; CHECK-DF2-NEXT: fcmpuo.64 vr1, vr024; CHECK-DF2-NEXT: mvc32 a025; CHECK-DF2-NEXT: fcmpne.64 vr1, vr026; CHECK-DF2-NEXT: mvcv16 a127; CHECK-DF2-NEXT: or16 a0, a128; CHECK-DF2-NEXT: rts1629entry:30 %fcmp = fcmp ueq double %y, %x31 ret i1 %fcmp32}33 34define i1 @FCMP_DOUBLE_I_ueq(double %x) {35;36;37; CHECK-DF-LABEL: FCMP_DOUBLE_I_ueq:38; CHECK-DF: # %bb.0: # %entry39; CHECK-DF-NEXT: grs32 a0, .LCPI1_040; CHECK-DF-NEXT: fldd vr1, (a0, 0)41; CHECK-DF-NEXT: fcmpuod vr0, vr142; CHECK-DF-NEXT: mvc32 a043; CHECK-DF-NEXT: fcmpned vr0, vr144; CHECK-DF-NEXT: mvcv16 a145; CHECK-DF-NEXT: or16 a0, a146; CHECK-DF-NEXT: rts1647; CHECK-DF-NEXT: .p2align 148; CHECK-DF-NEXT: # %bb.1:49; CHECK-DF-NEXT: .p2align 250; CHECK-DF-NEXT: .LCPI1_0:51; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 052;53; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ueq:54; CHECK-DF2: # %bb.0: # %entry55; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI1_0]56; CHECK-DF2-NEXT: fcmpuo.64 vr0, vr157; CHECK-DF2-NEXT: mvc32 a058; CHECK-DF2-NEXT: fcmpne.64 vr0, vr159; CHECK-DF2-NEXT: mvcv16 a160; CHECK-DF2-NEXT: or16 a0, a161; CHECK-DF2-NEXT: rts1662; CHECK-DF2-NEXT: .p2align 163; CHECK-DF2-NEXT: # %bb.1:64; CHECK-DF2-NEXT: .p2align 265; CHECK-DF2-NEXT: .LCPI1_0:66; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 067entry:68 %fcmp = fcmp ueq double %x, 0.069 ret i1 %fcmp70}71 72;une73 74define i1 @FCMP_DOUBLE_une(double %x, double %y) {75;76;77; CHECK-DF-LABEL: FCMP_DOUBLE_une:78; CHECK-DF: # %bb.0: # %entry79; CHECK-DF-NEXT: fcmpned vr1, vr080; CHECK-DF-NEXT: mvc32 a081; CHECK-DF-NEXT: rts1682;83; CHECK-DF2-LABEL: FCMP_DOUBLE_une:84; CHECK-DF2: # %bb.0: # %entry85; CHECK-DF2-NEXT: fcmpne.64 vr1, vr086; CHECK-DF2-NEXT: mvc32 a087; CHECK-DF2-NEXT: rts1688entry:89 %fcmp = fcmp une double %y, %x90 ret i1 %fcmp91}92 93define i1 @FCMP_DOUBLE_I_une(double %x) {94;95;96; CHECK-DF-LABEL: FCMP_DOUBLE_I_une:97; CHECK-DF: # %bb.0: # %entry98; CHECK-DF-NEXT: grs32 a0, .LCPI3_099; CHECK-DF-NEXT: fldd vr1, (a0, 0)100; CHECK-DF-NEXT: fcmpned vr0, vr1101; CHECK-DF-NEXT: mvc32 a0102; CHECK-DF-NEXT: rts16103; CHECK-DF-NEXT: .p2align 1104; CHECK-DF-NEXT: # %bb.1:105; CHECK-DF-NEXT: .p2align 2106; CHECK-DF-NEXT: .LCPI3_0:107; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0108;109; CHECK-DF2-LABEL: FCMP_DOUBLE_I_une:110; CHECK-DF2: # %bb.0: # %entry111; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI3_0]112; CHECK-DF2-NEXT: fcmpne.64 vr0, vr1113; CHECK-DF2-NEXT: mvc32 a0114; CHECK-DF2-NEXT: rts16115; CHECK-DF2-NEXT: .p2align 1116; CHECK-DF2-NEXT: # %bb.1:117; CHECK-DF2-NEXT: .p2align 2118; CHECK-DF2-NEXT: .LCPI3_0:119; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0120entry:121 %fcmp = fcmp une double %x, 0.0122 ret i1 %fcmp123}124 125;ugt126 127define i1 @FCMP_DOUBLE_ugt(double %x, double %y) {128;129;130; CHECK-DF-LABEL: FCMP_DOUBLE_ugt:131; CHECK-DF: # %bb.0: # %entry132; CHECK-DF-NEXT: fcmphsd vr0, vr1133; CHECK-DF-NEXT: mvc32 a0134; CHECK-DF-NEXT: xori32 a0, a0, 1135; CHECK-DF-NEXT: rts16136;137; CHECK-DF2-LABEL: FCMP_DOUBLE_ugt:138; CHECK-DF2: # %bb.0: # %entry139; CHECK-DF2-NEXT: fcmphs.64 vr0, vr1140; CHECK-DF2-NEXT: mvc32 a0141; CHECK-DF2-NEXT: xori32 a0, a0, 1142; CHECK-DF2-NEXT: rts16143entry:144 %fcmp = fcmp ugt double %y, %x145 ret i1 %fcmp146}147 148define i1 @FCMP_DOUBLE_I_ugt(double %x) {149;150;151; CHECK-DF-LABEL: FCMP_DOUBLE_I_ugt:152; CHECK-DF: # %bb.0: # %entry153; CHECK-DF-NEXT: grs32 a0, .LCPI5_0154; CHECK-DF-NEXT: fldd vr1, (a0, 0)155; CHECK-DF-NEXT: fcmphsd vr1, vr0156; CHECK-DF-NEXT: mvc32 a0157; CHECK-DF-NEXT: xori32 a0, a0, 1158; CHECK-DF-NEXT: rts16159; CHECK-DF-NEXT: .p2align 1160; CHECK-DF-NEXT: # %bb.1:161; CHECK-DF-NEXT: .p2align 2162; CHECK-DF-NEXT: .LCPI5_0:163; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0164;165; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ugt:166; CHECK-DF2: # %bb.0: # %entry167; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI5_0]168; CHECK-DF2-NEXT: fcmphs.64 vr1, vr0169; CHECK-DF2-NEXT: mvc32 a0170; CHECK-DF2-NEXT: xori32 a0, a0, 1171; CHECK-DF2-NEXT: rts16172; CHECK-DF2-NEXT: .p2align 1173; CHECK-DF2-NEXT: # %bb.1:174; CHECK-DF2-NEXT: .p2align 2175; CHECK-DF2-NEXT: .LCPI5_0:176; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0177entry:178 %fcmp = fcmp ugt double %x, 0.0179 ret i1 %fcmp180}181 182 183;uge184 185define i1 @FCMP_DOUBLE_uge(double %x, double %y) {186;187;188; CHECK-DF-LABEL: FCMP_DOUBLE_uge:189; CHECK-DF: # %bb.0: # %entry190; CHECK-DF-NEXT: fcmpltd vr1, vr0191; CHECK-DF-NEXT: mvc32 a0192; CHECK-DF-NEXT: xori32 a0, a0, 1193; CHECK-DF-NEXT: rts16194;195; CHECK-DF2-LABEL: FCMP_DOUBLE_uge:196; CHECK-DF2: # %bb.0: # %entry197; CHECK-DF2-NEXT: fcmplt.64 vr1, vr0198; CHECK-DF2-NEXT: mvc32 a0199; CHECK-DF2-NEXT: xori32 a0, a0, 1200; CHECK-DF2-NEXT: rts16201entry:202 %fcmp = fcmp uge double %y, %x203 ret i1 %fcmp204}205 206define i1 @FCMP_DOUBLE_I_uge(double %x) {207;208;209; CHECK-DF-LABEL: FCMP_DOUBLE_I_uge:210; CHECK-DF: # %bb.0: # %entry211; CHECK-DF-NEXT: grs32 a0, .LCPI7_0212; CHECK-DF-NEXT: fldd vr1, (a0, 0)213; CHECK-DF-NEXT: fcmpltd vr0, vr1214; CHECK-DF-NEXT: mvc32 a0215; CHECK-DF-NEXT: xori32 a0, a0, 1216; CHECK-DF-NEXT: rts16217; CHECK-DF-NEXT: .p2align 1218; CHECK-DF-NEXT: # %bb.1:219; CHECK-DF-NEXT: .p2align 2220; CHECK-DF-NEXT: .LCPI7_0:221; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0222;223; CHECK-DF2-LABEL: FCMP_DOUBLE_I_uge:224; CHECK-DF2: # %bb.0: # %entry225; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI7_0]226; CHECK-DF2-NEXT: fcmplt.64 vr0, vr1227; CHECK-DF2-NEXT: mvc32 a0228; CHECK-DF2-NEXT: xori32 a0, a0, 1229; CHECK-DF2-NEXT: rts16230; CHECK-DF2-NEXT: .p2align 1231; CHECK-DF2-NEXT: # %bb.1:232; CHECK-DF2-NEXT: .p2align 2233; CHECK-DF2-NEXT: .LCPI7_0:234; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0235entry:236 %fcmp = fcmp uge double %x, 0.0237 ret i1 %fcmp238}239 240 241;ult242 243define i1 @FCMP_DOUBLE_ult(double %x, double %y) {244;245;246; CHECK-DF-LABEL: FCMP_DOUBLE_ult:247; CHECK-DF: # %bb.0: # %entry248; CHECK-DF-NEXT: fcmphsd vr1, vr0249; CHECK-DF-NEXT: mvc32 a0250; CHECK-DF-NEXT: xori32 a0, a0, 1251; CHECK-DF-NEXT: rts16252;253; CHECK-DF2-LABEL: FCMP_DOUBLE_ult:254; CHECK-DF2: # %bb.0: # %entry255; CHECK-DF2-NEXT: fcmphs.64 vr1, vr0256; CHECK-DF2-NEXT: mvc32 a0257; CHECK-DF2-NEXT: xori32 a0, a0, 1258; CHECK-DF2-NEXT: rts16259entry:260 %fcmp = fcmp ult double %y, %x261 ret i1 %fcmp262}263 264define i1 @FCMP_DOUBLE_I_ult(double %x) {265;266;267; CHECK-DF-LABEL: FCMP_DOUBLE_I_ult:268; CHECK-DF: # %bb.0: # %entry269; CHECK-DF-NEXT: grs32 a0, .LCPI9_0270; CHECK-DF-NEXT: fldd vr1, (a0, 0)271; CHECK-DF-NEXT: fcmphsd vr0, vr1272; CHECK-DF-NEXT: mvc32 a0273; CHECK-DF-NEXT: xori32 a0, a0, 1274; CHECK-DF-NEXT: rts16275; CHECK-DF-NEXT: .p2align 1276; CHECK-DF-NEXT: # %bb.1:277; CHECK-DF-NEXT: .p2align 2278; CHECK-DF-NEXT: .LCPI9_0:279; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0280;281; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ult:282; CHECK-DF2: # %bb.0: # %entry283; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI9_0]284; CHECK-DF2-NEXT: fcmphs.64 vr0, vr1285; CHECK-DF2-NEXT: mvc32 a0286; CHECK-DF2-NEXT: xori32 a0, a0, 1287; CHECK-DF2-NEXT: rts16288; CHECK-DF2-NEXT: .p2align 1289; CHECK-DF2-NEXT: # %bb.1:290; CHECK-DF2-NEXT: .p2align 2291; CHECK-DF2-NEXT: .LCPI9_0:292; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0293entry:294 %fcmp = fcmp ult double %x, 0.0295 ret i1 %fcmp296}297 298 299;ule300 301define i1 @FCMP_DOUBLE_ule(double %x, double %y) {302;303;304; CHECK-DF-LABEL: FCMP_DOUBLE_ule:305; CHECK-DF: # %bb.0: # %entry306; CHECK-DF-NEXT: fcmpltd vr0, vr1307; CHECK-DF-NEXT: mvc32 a0308; CHECK-DF-NEXT: xori32 a0, a0, 1309; CHECK-DF-NEXT: rts16310;311; CHECK-DF2-LABEL: FCMP_DOUBLE_ule:312; CHECK-DF2: # %bb.0: # %entry313; CHECK-DF2-NEXT: fcmplt.64 vr0, vr1314; CHECK-DF2-NEXT: mvc32 a0315; CHECK-DF2-NEXT: xori32 a0, a0, 1316; CHECK-DF2-NEXT: rts16317entry:318 %fcmp = fcmp ule double %y, %x319 ret i1 %fcmp320}321 322define i1 @FCMP_DOUBLE_I_ule(double %x) {323;324;325; CHECK-DF-LABEL: FCMP_DOUBLE_I_ule:326; CHECK-DF: # %bb.0: # %entry327; CHECK-DF-NEXT: grs32 a0, .LCPI11_0328; CHECK-DF-NEXT: fldd vr1, (a0, 0)329; CHECK-DF-NEXT: fcmpltd vr1, vr0330; CHECK-DF-NEXT: mvc32 a0331; CHECK-DF-NEXT: xori32 a0, a0, 1332; CHECK-DF-NEXT: rts16333; CHECK-DF-NEXT: .p2align 1334; CHECK-DF-NEXT: # %bb.1:335; CHECK-DF-NEXT: .p2align 2336; CHECK-DF-NEXT: .LCPI11_0:337; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0338;339; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ule:340; CHECK-DF2: # %bb.0: # %entry341; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI11_0]342; CHECK-DF2-NEXT: fcmplt.64 vr1, vr0343; CHECK-DF2-NEXT: mvc32 a0344; CHECK-DF2-NEXT: xori32 a0, a0, 1345; CHECK-DF2-NEXT: rts16346; CHECK-DF2-NEXT: .p2align 1347; CHECK-DF2-NEXT: # %bb.1:348; CHECK-DF2-NEXT: .p2align 2349; CHECK-DF2-NEXT: .LCPI11_0:350; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0351entry:352 %fcmp = fcmp ule double %x, 0.0353 ret i1 %fcmp354}355 356 357;ogt358 359define i1 @FCMP_DOUBLE_ogt(double %x, double %y) {360;361;362; CHECK-DF-LABEL: FCMP_DOUBLE_ogt:363; CHECK-DF: # %bb.0: # %entry364; CHECK-DF-NEXT: fcmpltd vr0, vr1365; CHECK-DF-NEXT: mvc32 a0366; CHECK-DF-NEXT: rts16367;368; CHECK-DF2-LABEL: FCMP_DOUBLE_ogt:369; CHECK-DF2: # %bb.0: # %entry370; CHECK-DF2-NEXT: fcmplt.64 vr0, vr1371; CHECK-DF2-NEXT: mvc32 a0372; CHECK-DF2-NEXT: rts16373entry:374 %fcmp = fcmp ogt double %y, %x375 ret i1 %fcmp376}377 378define i1 @FCMP_DOUBLE_I_ogt(double %x) {379;380;381; CHECK-DF-LABEL: FCMP_DOUBLE_I_ogt:382; CHECK-DF: # %bb.0: # %entry383; CHECK-DF-NEXT: grs32 a0, .LCPI13_0384; CHECK-DF-NEXT: fldd vr1, (a0, 0)385; CHECK-DF-NEXT: fcmpltd vr1, vr0386; CHECK-DF-NEXT: mvc32 a0387; CHECK-DF-NEXT: rts16388; CHECK-DF-NEXT: .p2align 1389; CHECK-DF-NEXT: # %bb.1:390; CHECK-DF-NEXT: .p2align 2391; CHECK-DF-NEXT: .LCPI13_0:392; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0393;394; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ogt:395; CHECK-DF2: # %bb.0: # %entry396; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI13_0]397; CHECK-DF2-NEXT: fcmplt.64 vr1, vr0398; CHECK-DF2-NEXT: mvc32 a0399; CHECK-DF2-NEXT: rts16400; CHECK-DF2-NEXT: .p2align 1401; CHECK-DF2-NEXT: # %bb.1:402; CHECK-DF2-NEXT: .p2align 2403; CHECK-DF2-NEXT: .LCPI13_0:404; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0405entry:406 %fcmp = fcmp ogt double %x, 0.0407 ret i1 %fcmp408}409 410;oge411 412define i1 @FCMP_DOUBLE_oge(double %x, double %y) {413;414;415; CHECK-DF-LABEL: FCMP_DOUBLE_oge:416; CHECK-DF: # %bb.0: # %entry417; CHECK-DF-NEXT: fcmphsd vr1, vr0418; CHECK-DF-NEXT: mvc32 a0419; CHECK-DF-NEXT: rts16420;421; CHECK-DF2-LABEL: FCMP_DOUBLE_oge:422; CHECK-DF2: # %bb.0: # %entry423; CHECK-DF2-NEXT: fcmphs.64 vr1, vr0424; CHECK-DF2-NEXT: mvc32 a0425; CHECK-DF2-NEXT: rts16426entry:427 %fcmp = fcmp oge double %y, %x428 ret i1 %fcmp429}430 431define i1 @FCMP_DOUBLE_I_oge(double %x) {432;433;434; CHECK-DF-LABEL: FCMP_DOUBLE_I_oge:435; CHECK-DF: # %bb.0: # %entry436; CHECK-DF-NEXT: grs32 a0, .LCPI15_0437; CHECK-DF-NEXT: fldd vr1, (a0, 0)438; CHECK-DF-NEXT: fcmphsd vr0, vr1439; CHECK-DF-NEXT: mvc32 a0440; CHECK-DF-NEXT: rts16441; CHECK-DF-NEXT: .p2align 1442; CHECK-DF-NEXT: # %bb.1:443; CHECK-DF-NEXT: .p2align 2444; CHECK-DF-NEXT: .LCPI15_0:445; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0446;447; CHECK-DF2-LABEL: FCMP_DOUBLE_I_oge:448; CHECK-DF2: # %bb.0: # %entry449; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI15_0]450; CHECK-DF2-NEXT: fcmphs.64 vr0, vr1451; CHECK-DF2-NEXT: mvc32 a0452; CHECK-DF2-NEXT: rts16453; CHECK-DF2-NEXT: .p2align 1454; CHECK-DF2-NEXT: # %bb.1:455; CHECK-DF2-NEXT: .p2align 2456; CHECK-DF2-NEXT: .LCPI15_0:457; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0458entry:459 %fcmp = fcmp oge double %x, 0.0460 ret i1 %fcmp461}462 463 464;olt465 466define i1 @FCMP_DOUBLE_olt(double %x, double %y) {467;468;469; CHECK-DF-LABEL: FCMP_DOUBLE_olt:470; CHECK-DF: # %bb.0: # %entry471; CHECK-DF-NEXT: fcmpltd vr1, vr0472; CHECK-DF-NEXT: mvc32 a0473; CHECK-DF-NEXT: rts16474;475; CHECK-DF2-LABEL: FCMP_DOUBLE_olt:476; CHECK-DF2: # %bb.0: # %entry477; CHECK-DF2-NEXT: fcmplt.64 vr1, vr0478; CHECK-DF2-NEXT: mvc32 a0479; CHECK-DF2-NEXT: rts16480entry:481 %fcmp = fcmp olt double %y, %x482 ret i1 %fcmp483}484 485define i1 @FCMP_DOUBLE_I_olt(double %x) {486;487;488; CHECK-DF-LABEL: FCMP_DOUBLE_I_olt:489; CHECK-DF: # %bb.0: # %entry490; CHECK-DF-NEXT: grs32 a0, .LCPI17_0491; CHECK-DF-NEXT: fldd vr1, (a0, 0)492; CHECK-DF-NEXT: fcmpltd vr0, vr1493; CHECK-DF-NEXT: mvc32 a0494; CHECK-DF-NEXT: rts16495; CHECK-DF-NEXT: .p2align 1496; CHECK-DF-NEXT: # %bb.1:497; CHECK-DF-NEXT: .p2align 2498; CHECK-DF-NEXT: .LCPI17_0:499; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0500;501; CHECK-DF2-LABEL: FCMP_DOUBLE_I_olt:502; CHECK-DF2: # %bb.0: # %entry503; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI17_0]504; CHECK-DF2-NEXT: fcmplt.64 vr0, vr1505; CHECK-DF2-NEXT: mvc32 a0506; CHECK-DF2-NEXT: rts16507; CHECK-DF2-NEXT: .p2align 1508; CHECK-DF2-NEXT: # %bb.1:509; CHECK-DF2-NEXT: .p2align 2510; CHECK-DF2-NEXT: .LCPI17_0:511; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0512entry:513 %fcmp = fcmp olt double %x, 0.0514 ret i1 %fcmp515}516 517;ole518 519define i1 @FCMP_DOUBLE_ole(double %x, double %y) {520;521;522; CHECK-DF-LABEL: FCMP_DOUBLE_ole:523; CHECK-DF: # %bb.0: # %entry524; CHECK-DF-NEXT: fcmphsd vr0, vr1525; CHECK-DF-NEXT: mvc32 a0526; CHECK-DF-NEXT: rts16527;528; CHECK-DF2-LABEL: FCMP_DOUBLE_ole:529; CHECK-DF2: # %bb.0: # %entry530; CHECK-DF2-NEXT: fcmphs.64 vr0, vr1531; CHECK-DF2-NEXT: mvc32 a0532; CHECK-DF2-NEXT: rts16533entry:534 %fcmp = fcmp ole double %y, %x535 ret i1 %fcmp536}537 538define i1 @FCMP_DOUBLE_I_ole(double %x) {539;540;541; CHECK-DF-LABEL: FCMP_DOUBLE_I_ole:542; CHECK-DF: # %bb.0: # %entry543; CHECK-DF-NEXT: grs32 a0, .LCPI19_0544; CHECK-DF-NEXT: fldd vr1, (a0, 0)545; CHECK-DF-NEXT: fcmphsd vr1, vr0546; CHECK-DF-NEXT: mvc32 a0547; CHECK-DF-NEXT: rts16548; CHECK-DF-NEXT: .p2align 1549; CHECK-DF-NEXT: # %bb.1:550; CHECK-DF-NEXT: .p2align 2551; CHECK-DF-NEXT: .LCPI19_0:552; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0553;554; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ole:555; CHECK-DF2: # %bb.0: # %entry556; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI19_0]557; CHECK-DF2-NEXT: fcmphs.64 vr1, vr0558; CHECK-DF2-NEXT: mvc32 a0559; CHECK-DF2-NEXT: rts16560; CHECK-DF2-NEXT: .p2align 1561; CHECK-DF2-NEXT: # %bb.1:562; CHECK-DF2-NEXT: .p2align 2563; CHECK-DF2-NEXT: .LCPI19_0:564; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0565entry:566 %fcmp = fcmp ole double %x, 0.0567 ret i1 %fcmp568}569 570;one571 572define i1 @FCMP_DOUBLE_one(double %x, double %y) {573;574;575; CHECK-DF-LABEL: FCMP_DOUBLE_one:576; CHECK-DF: # %bb.0: # %entry577; CHECK-DF-NEXT: fcmpuod vr1, vr0578; CHECK-DF-NEXT: mvcv16 a0579; CHECK-DF-NEXT: fcmpned vr1, vr0580; CHECK-DF-NEXT: mvc32 a1581; CHECK-DF-NEXT: and16 a0, a1582; CHECK-DF-NEXT: rts16583;584; CHECK-DF2-LABEL: FCMP_DOUBLE_one:585; CHECK-DF2: # %bb.0: # %entry586; CHECK-DF2-NEXT: fcmpuo.64 vr1, vr0587; CHECK-DF2-NEXT: mvcv16 a0588; CHECK-DF2-NEXT: fcmpne.64 vr1, vr0589; CHECK-DF2-NEXT: mvc32 a1590; CHECK-DF2-NEXT: and16 a0, a1591; CHECK-DF2-NEXT: rts16592entry:593 %fcmp = fcmp one double %y, %x594 ret i1 %fcmp595}596 597define i1 @FCMP_DOUBLE_I_one(double %x) {598;599;600; CHECK-DF-LABEL: FCMP_DOUBLE_I_one:601; CHECK-DF: # %bb.0: # %entry602; CHECK-DF-NEXT: grs32 a0, .LCPI21_0603; CHECK-DF-NEXT: fldd vr1, (a0, 0)604; CHECK-DF-NEXT: fcmpuod vr0, vr1605; CHECK-DF-NEXT: mvcv16 a0606; CHECK-DF-NEXT: fcmpned vr0, vr1607; CHECK-DF-NEXT: mvc32 a1608; CHECK-DF-NEXT: and16 a0, a1609; CHECK-DF-NEXT: rts16610; CHECK-DF-NEXT: .p2align 1611; CHECK-DF-NEXT: # %bb.1:612; CHECK-DF-NEXT: .p2align 2613; CHECK-DF-NEXT: .LCPI21_0:614; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0615;616; CHECK-DF2-LABEL: FCMP_DOUBLE_I_one:617; CHECK-DF2: # %bb.0: # %entry618; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI21_0]619; CHECK-DF2-NEXT: fcmpuo.64 vr0, vr1620; CHECK-DF2-NEXT: mvcv16 a0621; CHECK-DF2-NEXT: fcmpne.64 vr0, vr1622; CHECK-DF2-NEXT: mvc32 a1623; CHECK-DF2-NEXT: and16 a0, a1624; CHECK-DF2-NEXT: rts16625; CHECK-DF2-NEXT: .p2align 1626; CHECK-DF2-NEXT: # %bb.1:627; CHECK-DF2-NEXT: .p2align 2628; CHECK-DF2-NEXT: .LCPI21_0:629; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0630entry:631 %fcmp = fcmp one double %x, 0.0632 ret i1 %fcmp633}634 635;oeq636 637define i1 @FCMP_DOUBLE_oeq(double %x, double %y) {638;639;640; CHECK-DF-LABEL: FCMP_DOUBLE_oeq:641; CHECK-DF: # %bb.0: # %entry642; CHECK-DF-NEXT: fcmpned vr1, vr0643; CHECK-DF-NEXT: mvcv16 a0644; CHECK-DF-NEXT: rts16645;646; CHECK-DF2-LABEL: FCMP_DOUBLE_oeq:647; CHECK-DF2: # %bb.0: # %entry648; CHECK-DF2-NEXT: fcmpne.64 vr1, vr0649; CHECK-DF2-NEXT: mvcv16 a0650; CHECK-DF2-NEXT: rts16651entry:652 %fcmp = fcmp oeq double %y, %x653 ret i1 %fcmp654}655 656define i1 @FCMP_DOUBLE_I_oeq(double %x) {657;658;659; CHECK-DF-LABEL: FCMP_DOUBLE_I_oeq:660; CHECK-DF: # %bb.0: # %entry661; CHECK-DF-NEXT: grs32 a0, .LCPI23_0662; CHECK-DF-NEXT: fldd vr1, (a0, 0)663; CHECK-DF-NEXT: fcmpned vr0, vr1664; CHECK-DF-NEXT: mvcv16 a0665; CHECK-DF-NEXT: rts16666; CHECK-DF-NEXT: .p2align 1667; CHECK-DF-NEXT: # %bb.1:668; CHECK-DF-NEXT: .p2align 2669; CHECK-DF-NEXT: .LCPI23_0:670; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0671;672; CHECK-DF2-LABEL: FCMP_DOUBLE_I_oeq:673; CHECK-DF2: # %bb.0: # %entry674; CHECK-DF2-NEXT: flrw.64 vr1, [.LCPI23_0]675; CHECK-DF2-NEXT: fcmpne.64 vr0, vr1676; CHECK-DF2-NEXT: mvcv16 a0677; CHECK-DF2-NEXT: rts16678; CHECK-DF2-NEXT: .p2align 1679; CHECK-DF2-NEXT: # %bb.1:680; CHECK-DF2-NEXT: .p2align 2681; CHECK-DF2-NEXT: .LCPI23_0:682; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0683entry:684 %fcmp = fcmp oeq double %x, 0.0685 ret i1 %fcmp686}687 688;ord689 690define i1 @FCMP_DOUBLE_ord(double %x, double %y) {691;692;693; CHECK-DF-LABEL: FCMP_DOUBLE_ord:694; CHECK-DF: # %bb.0: # %entry695; CHECK-DF-NEXT: fcmpuod vr1, vr0696; CHECK-DF-NEXT: mvcv16 a0697; CHECK-DF-NEXT: rts16698;699; CHECK-DF2-LABEL: FCMP_DOUBLE_ord:700; CHECK-DF2: # %bb.0: # %entry701; CHECK-DF2-NEXT: fcmpuo.64 vr1, vr0702; CHECK-DF2-NEXT: mvcv16 a0703; CHECK-DF2-NEXT: rts16704entry:705 %fcmp = fcmp ord double %y, %x706 ret i1 %fcmp707}708 709define i1 @FCMP_DOUBLE_I_ord(double %x) {710;711;712; CHECK-DF-LABEL: FCMP_DOUBLE_I_ord:713; CHECK-DF: # %bb.0: # %entry714; CHECK-DF-NEXT: fcmpuod vr0, vr0715; CHECK-DF-NEXT: mvcv16 a0716; CHECK-DF-NEXT: rts16717;718; CHECK-DF2-LABEL: FCMP_DOUBLE_I_ord:719; CHECK-DF2: # %bb.0: # %entry720; CHECK-DF2-NEXT: fcmpuo.64 vr0, vr0721; CHECK-DF2-NEXT: mvcv16 a0722; CHECK-DF2-NEXT: rts16723entry:724 %fcmp = fcmp ord double %x, 0.0725 ret i1 %fcmp726}727 728;uno729 730define i1 @FCMP_DOUBLE_uno(double %x, double %y) {731;732;733; CHECK-DF-LABEL: FCMP_DOUBLE_uno:734; CHECK-DF: # %bb.0: # %entry735; CHECK-DF-NEXT: fcmpuod vr1, vr0736; CHECK-DF-NEXT: mvc32 a0737; CHECK-DF-NEXT: rts16738;739; CHECK-DF2-LABEL: FCMP_DOUBLE_uno:740; CHECK-DF2: # %bb.0: # %entry741; CHECK-DF2-NEXT: fcmpuo.64 vr1, vr0742; CHECK-DF2-NEXT: mvc32 a0743; CHECK-DF2-NEXT: rts16744entry:745 %fcmp = fcmp uno double %y, %x746 ret i1 %fcmp747}748 749define i1 @FCMP_DOUBLE_I_uno(double %x) {750;751;752; CHECK-DF-LABEL: FCMP_DOUBLE_I_uno:753; CHECK-DF: # %bb.0: # %entry754; CHECK-DF-NEXT: fcmpuod vr0, vr0755; CHECK-DF-NEXT: mvc32 a0756; CHECK-DF-NEXT: rts16757;758; CHECK-DF2-LABEL: FCMP_DOUBLE_I_uno:759; CHECK-DF2: # %bb.0: # %entry760; CHECK-DF2-NEXT: fcmpuo.64 vr0, vr0761; CHECK-DF2-NEXT: mvc32 a0762; CHECK-DF2-NEXT: rts16763entry:764 %fcmp = fcmp uno double %x, 0.0765 ret i1 %fcmp766}767