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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf,+fpuv2_df | FileCheck %s --check-prefix=CHECK-FPUV23; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf,+fpuv3_df | FileCheck %s --check-prefix=CHECK-FPUV34 5define void @test_load_store(ptr %p, ptr %q) nounwind {6; CHECK-FPUV2-LABEL: test_load_store:7; CHECK-FPUV2: # %bb.0:8; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)9; CHECK-FPUV2-NEXT: st16.h a0, (a1, 0)10; CHECK-FPUV2-NEXT: rts1611;12; CHECK-FPUV3-LABEL: test_load_store:13; CHECK-FPUV3: # %bb.0:14; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)15; CHECK-FPUV3-NEXT: st16.h a0, (a1, 0)16; CHECK-FPUV3-NEXT: rts1617 %a = load half, ptr %p18 store half %a, ptr %q19 ret void20}21 22define float @test_fpextend_float(ptr %p) nounwind {23; CHECK-FPUV2-LABEL: test_fpextend_float:24; CHECK-FPUV2: # %bb.0:25; CHECK-FPUV2-NEXT: subi16 sp, sp, 426; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill27; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)28; CHECK-FPUV2-NEXT: jsri32 [.LCPI1_0]29; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload30; CHECK-FPUV2-NEXT: addi16 sp, sp, 431; CHECK-FPUV2-NEXT: rts1632; CHECK-FPUV2-NEXT: .p2align 133; CHECK-FPUV2-NEXT: # %bb.1:34; CHECK-FPUV2-NEXT: .p2align 2, 0x035; CHECK-FPUV2-NEXT: .LCPI1_0:36; CHECK-FPUV2-NEXT: .long __extendhfsf237;38; CHECK-FPUV3-LABEL: test_fpextend_float:39; CHECK-FPUV3: # %bb.0:40; CHECK-FPUV3-NEXT: subi16 sp, sp, 441; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill42; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)43; CHECK-FPUV3-NEXT: jsri32 [.LCPI1_0]44; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload45; CHECK-FPUV3-NEXT: addi16 sp, sp, 446; CHECK-FPUV3-NEXT: rts1647; CHECK-FPUV3-NEXT: .p2align 148; CHECK-FPUV3-NEXT: # %bb.1:49; CHECK-FPUV3-NEXT: .p2align 2, 0x050; CHECK-FPUV3-NEXT: .LCPI1_0:51; CHECK-FPUV3-NEXT: .long __extendhfsf252 %a = load half, ptr %p53 %r = fpext half %a to float54 ret float %r55}56 57define double @test_fpextend_double(ptr %p) nounwind {58; CHECK-FPUV2-LABEL: test_fpextend_double:59; CHECK-FPUV2: # %bb.0:60; CHECK-FPUV2-NEXT: subi16 sp, sp, 461; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill62; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)63; CHECK-FPUV2-NEXT: jsri32 [.LCPI2_0]64; CHECK-FPUV2-NEXT: fstod vr0, vr065; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload66; CHECK-FPUV2-NEXT: addi16 sp, sp, 467; CHECK-FPUV2-NEXT: rts1668; CHECK-FPUV2-NEXT: .p2align 169; CHECK-FPUV2-NEXT: # %bb.1:70; CHECK-FPUV2-NEXT: .p2align 2, 0x071; CHECK-FPUV2-NEXT: .LCPI2_0:72; CHECK-FPUV2-NEXT: .long __extendhfsf273;74; CHECK-FPUV3-LABEL: test_fpextend_double:75; CHECK-FPUV3: # %bb.0:76; CHECK-FPUV3-NEXT: subi16 sp, sp, 477; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill78; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)79; CHECK-FPUV3-NEXT: jsri32 [.LCPI2_0]80; CHECK-FPUV3-NEXT: fstod vr0, vr081; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload82; CHECK-FPUV3-NEXT: addi16 sp, sp, 483; CHECK-FPUV3-NEXT: rts1684; CHECK-FPUV3-NEXT: .p2align 185; CHECK-FPUV3-NEXT: # %bb.1:86; CHECK-FPUV3-NEXT: .p2align 2, 0x087; CHECK-FPUV3-NEXT: .LCPI2_0:88; CHECK-FPUV3-NEXT: .long __extendhfsf289 %a = load half, ptr %p90 %r = fpext half %a to double91 ret double %r92}93 94define void @test_fptrunc_float(float %f, ptr %p) nounwind {95; CHECK-FPUV2-LABEL: test_fptrunc_float:96; CHECK-FPUV2: # %bb.0:97; CHECK-FPUV2-NEXT: subi16 sp, sp, 898; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill99; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill100; CHECK-FPUV2-NEXT: mov16 l0, a0101; CHECK-FPUV2-NEXT: jsri32 [.LCPI3_0]102; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)103; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload104; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload105; CHECK-FPUV2-NEXT: addi16 sp, sp, 8106; CHECK-FPUV2-NEXT: rts16107; CHECK-FPUV2-NEXT: .p2align 1108; CHECK-FPUV2-NEXT: # %bb.1:109; CHECK-FPUV2-NEXT: .p2align 2, 0x0110; CHECK-FPUV2-NEXT: .LCPI3_0:111; CHECK-FPUV2-NEXT: .long __truncsfhf2112;113; CHECK-FPUV3-LABEL: test_fptrunc_float:114; CHECK-FPUV3: # %bb.0:115; CHECK-FPUV3-NEXT: subi16 sp, sp, 8116; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill117; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill118; CHECK-FPUV3-NEXT: mov16 l0, a0119; CHECK-FPUV3-NEXT: jsri32 [.LCPI3_0]120; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)121; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload122; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload123; CHECK-FPUV3-NEXT: addi16 sp, sp, 8124; CHECK-FPUV3-NEXT: rts16125; CHECK-FPUV3-NEXT: .p2align 1126; CHECK-FPUV3-NEXT: # %bb.1:127; CHECK-FPUV3-NEXT: .p2align 2, 0x0128; CHECK-FPUV3-NEXT: .LCPI3_0:129; CHECK-FPUV3-NEXT: .long __truncsfhf2130 %a = fptrunc float %f to half131 store half %a, ptr %p132 ret void133}134 135define void @test_fptrunc_double(double %d, ptr %p) nounwind {136; CHECK-FPUV2-LABEL: test_fptrunc_double:137; CHECK-FPUV2: # %bb.0:138; CHECK-FPUV2-NEXT: subi16 sp, sp, 8139; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill140; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill141; CHECK-FPUV2-NEXT: mov16 l0, a0142; CHECK-FPUV2-NEXT: jsri32 [.LCPI4_0]143; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)144; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload145; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload146; CHECK-FPUV2-NEXT: addi16 sp, sp, 8147; CHECK-FPUV2-NEXT: rts16148; CHECK-FPUV2-NEXT: .p2align 1149; CHECK-FPUV2-NEXT: # %bb.1:150; CHECK-FPUV2-NEXT: .p2align 2, 0x0151; CHECK-FPUV2-NEXT: .LCPI4_0:152; CHECK-FPUV2-NEXT: .long __truncdfhf2153;154; CHECK-FPUV3-LABEL: test_fptrunc_double:155; CHECK-FPUV3: # %bb.0:156; CHECK-FPUV3-NEXT: subi16 sp, sp, 8157; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill158; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill159; CHECK-FPUV3-NEXT: mov16 l0, a0160; CHECK-FPUV3-NEXT: jsri32 [.LCPI4_0]161; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)162; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload163; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload164; CHECK-FPUV3-NEXT: addi16 sp, sp, 8165; CHECK-FPUV3-NEXT: rts16166; CHECK-FPUV3-NEXT: .p2align 1167; CHECK-FPUV3-NEXT: # %bb.1:168; CHECK-FPUV3-NEXT: .p2align 2, 0x0169; CHECK-FPUV3-NEXT: .LCPI4_0:170; CHECK-FPUV3-NEXT: .long __truncdfhf2171 %a = fptrunc double %d to half172 store half %a, ptr %p173 ret void174}175 176define void @test_fadd(ptr %p, ptr %q) nounwind {177; CHECK-FPUV2-LABEL: test_fadd:178; CHECK-FPUV2: # %bb.0:179; CHECK-FPUV2-NEXT: subi16 sp, sp, 20180; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill181; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill182; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill183; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill184; CHECK-FPUV2-NEXT: mov16 l0, a1185; CHECK-FPUV2-NEXT: mov16 l1, a0186; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)187; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]188; CHECK-FPUV2-NEXT: fmovs vr8, vr0189; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)190; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]191; CHECK-FPUV2-NEXT: fadds vr0, vr8, vr0192; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_1]193; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)194; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload195; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload196; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload197; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload198; CHECK-FPUV2-NEXT: addi16 sp, sp, 20199; CHECK-FPUV2-NEXT: rts16200; CHECK-FPUV2-NEXT: .p2align 1201; CHECK-FPUV2-NEXT: # %bb.1:202; CHECK-FPUV2-NEXT: .p2align 2, 0x0203; CHECK-FPUV2-NEXT: .LCPI5_0:204; CHECK-FPUV2-NEXT: .long __extendhfsf2205; CHECK-FPUV2-NEXT: .LCPI5_1:206; CHECK-FPUV2-NEXT: .long __truncsfhf2207;208; CHECK-FPUV3-LABEL: test_fadd:209; CHECK-FPUV3: # %bb.0:210; CHECK-FPUV3-NEXT: subi16 sp, sp, 20211; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill212; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill213; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill214; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill215; CHECK-FPUV3-NEXT: mov16 l0, a1216; CHECK-FPUV3-NEXT: mov16 l1, a0217; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)218; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]219; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0220; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)221; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]222; CHECK-FPUV3-NEXT: fadd.32 vr0, vr8, vr0223; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_1]224; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)225; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload226; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload227; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload228; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload229; CHECK-FPUV3-NEXT: addi16 sp, sp, 20230; CHECK-FPUV3-NEXT: rts16231; CHECK-FPUV3-NEXT: .p2align 1232; CHECK-FPUV3-NEXT: # %bb.1:233; CHECK-FPUV3-NEXT: .p2align 2, 0x0234; CHECK-FPUV3-NEXT: .LCPI5_0:235; CHECK-FPUV3-NEXT: .long __extendhfsf2236; CHECK-FPUV3-NEXT: .LCPI5_1:237; CHECK-FPUV3-NEXT: .long __truncsfhf2238 %a = load half, ptr %p239 %b = load half, ptr %q240 %r = fadd half %a, %b241 store half %r, ptr %p242 ret void243}244 245define void @test_fmul(ptr %p, ptr %q) nounwind {246; CHECK-FPUV2-LABEL: test_fmul:247; CHECK-FPUV2: # %bb.0:248; CHECK-FPUV2-NEXT: subi16 sp, sp, 20249; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill250; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill251; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill252; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill253; CHECK-FPUV2-NEXT: mov16 l0, a1254; CHECK-FPUV2-NEXT: mov16 l1, a0255; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)256; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]257; CHECK-FPUV2-NEXT: fmovs vr8, vr0258; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)259; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]260; CHECK-FPUV2-NEXT: fmuls vr0, vr8, vr0261; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_1]262; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)263; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload264; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload265; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload266; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload267; CHECK-FPUV2-NEXT: addi16 sp, sp, 20268; CHECK-FPUV2-NEXT: rts16269; CHECK-FPUV2-NEXT: .p2align 1270; CHECK-FPUV2-NEXT: # %bb.1:271; CHECK-FPUV2-NEXT: .p2align 2, 0x0272; CHECK-FPUV2-NEXT: .LCPI6_0:273; CHECK-FPUV2-NEXT: .long __extendhfsf2274; CHECK-FPUV2-NEXT: .LCPI6_1:275; CHECK-FPUV2-NEXT: .long __truncsfhf2276;277; CHECK-FPUV3-LABEL: test_fmul:278; CHECK-FPUV3: # %bb.0:279; CHECK-FPUV3-NEXT: subi16 sp, sp, 20280; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill281; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill282; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill283; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill284; CHECK-FPUV3-NEXT: mov16 l0, a1285; CHECK-FPUV3-NEXT: mov16 l1, a0286; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)287; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]288; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0289; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)290; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]291; CHECK-FPUV3-NEXT: fmul.32 vr0, vr8, vr0292; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_1]293; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)294; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload295; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload296; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload297; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload298; CHECK-FPUV3-NEXT: addi16 sp, sp, 20299; CHECK-FPUV3-NEXT: rts16300; CHECK-FPUV3-NEXT: .p2align 1301; CHECK-FPUV3-NEXT: # %bb.1:302; CHECK-FPUV3-NEXT: .p2align 2, 0x0303; CHECK-FPUV3-NEXT: .LCPI6_0:304; CHECK-FPUV3-NEXT: .long __extendhfsf2305; CHECK-FPUV3-NEXT: .LCPI6_1:306; CHECK-FPUV3-NEXT: .long __truncsfhf2307 %a = load half, ptr %p308 %b = load half, ptr %q309 %r = fmul half %a, %b310 store half %r, ptr %p311 ret void312}313