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1; RUN: llc -mtriple=hexagon -filetype=obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s2 3; CHECK-LABEL: <f0>:4; CHECK: r{{[1-9]}}:{{[0-9]}} = abs(r{{[1-9]}}:{{[0-9]}})5define double @f0(double %a0) #0 {6b0:7 %v0 = alloca double, align 88 store double %a0, ptr %v0, align 89 %v1 = load double, ptr %v0, align 810 %v2 = fptosi double %v1 to i6411 %v3 = call i64 @llvm.hexagon.A2.absp(i64 %v2)12 %v4 = sitofp i64 %v3 to double13 ret double %v414}15 16declare i64 @llvm.hexagon.A2.absp(i64) #117 18; CHECK-LABEL: <f1>:19; CHECK: r{{[1-9]}}:{{[0-9]}} = neg(r{{[1-9]}}:{{[0-9]}})20define double @f1(double %a0) #0 {21b0:22 %v0 = alloca double, align 823 store double %a0, ptr %v0, align 824 %v1 = load double, ptr %v0, align 825 %v2 = fptosi double %v1 to i6426 %v3 = call i64 @llvm.hexagon.A2.negp(i64 %v2)27 %v4 = sitofp i64 %v3 to double28 ret double %v429}30 31declare i64 @llvm.hexagon.A2.negp(i64) #132 33; CHECK-LABEL: <f2>:34; CHECK: r{{[1-9]}}:{{[0-9]}} = not(r{{[1-9]}}:{{[0-9]}})35define double @f2(double %a0) #0 {36b0:37 %v0 = alloca double, align 838 store double %a0, ptr %v0, align 839 %v1 = load double, ptr %v0, align 840 %v2 = fptosi double %v1 to i6441 %v3 = call i64 @llvm.hexagon.A2.notp(i64 %v2)42 %v4 = sitofp i64 %v3 to double43 ret double %v444}45 46declare i64 @llvm.hexagon.A2.notp(i64) #147 48; CHECK-LABEL: <f3>:49; CHECK: r{{[1-9]}}:{{[0-9]}} = interleave(r{{[1-9]}}:{{[0-9]}})50define double @f3(double %a0) #0 {51b0:52 %v0 = alloca double, align 853 store double %a0, ptr %v0, align 854 %v1 = load double, ptr %v0, align 855 %v2 = fptosi double %v1 to i6456 %v3 = call i64 @llvm.hexagon.S2.interleave(i64 %v2)57 %v4 = sitofp i64 %v3 to double58 ret double %v459}60 61declare i64 @llvm.hexagon.S2.interleave(i64) #162 63; CHECK-LABEL: <f4>:64; CHECK: r{{[1-9]}}:{{[0-9]}} = deinterleave(r{{[1-9]}}:{{[0-9]}})65define double @f4(double %a0) #0 {66b0:67 %v0 = alloca double, align 868 store double %a0, ptr %v0, align 869 %v1 = load double, ptr %v0, align 870 %v2 = fptosi double %v1 to i6471 %v3 = call i64 @llvm.hexagon.S2.deinterleave(i64 %v2)72 %v4 = sitofp i64 %v3 to double73 ret double %v474}75 76declare i64 @llvm.hexagon.S2.deinterleave(i64) #177 78; CHECK-LABEL: <f5>:79; CHECK: r{{[1-9]}}:{{[0-9]}} = vconj(r{{[1-9]}}:{{[0-9]}}):sat80define double @f5(double %a0) #0 {81b0:82 %v0 = alloca double, align 883 store double %a0, ptr %v0, align 884 %v1 = load double, ptr %v0, align 885 %v2 = fptosi double %v1 to i6486 %v3 = call i64 @llvm.hexagon.A2.vconj(i64 %v2)87 %v4 = sitofp i64 %v3 to double88 ret double %v489}90 91declare i64 @llvm.hexagon.A2.vconj(i64) #192 93; CHECK-LABEL: <f6>:94; CHECK: r{{[1-9]}}:{{[0-9]}} = vsathb(r{{[1-9]}}:{{[0-9]}})95define double @f6(double %a0) #0 {96b0:97 %v0 = alloca double, align 898 store double %a0, ptr %v0, align 899 %v1 = load double, ptr %v0, align 8100 %v2 = fptosi double %v1 to i64101 %v3 = call i64 @llvm.hexagon.S2.vsathb.nopack(i64 %v2)102 %v4 = sitofp i64 %v3 to double103 ret double %v4104}105 106declare i64 @llvm.hexagon.S2.vsathb.nopack(i64) #1107 108; CHECK-LABEL: <f7>:109; CHECK: r{{[1-9]}}:{{[0-9]}} = vsathub(r{{[1-9]}}:{{[0-9]}})110define double @f7(double %a0) #0 {111b0:112 %v0 = alloca double, align 8113 store double %a0, ptr %v0, align 8114 %v1 = load double, ptr %v0, align 8115 %v2 = fptosi double %v1 to i64116 %v3 = call i64 @llvm.hexagon.S2.vsathub.nopack(i64 %v2)117 %v4 = sitofp i64 %v3 to double118 ret double %v4119}120 121declare i64 @llvm.hexagon.S2.vsathub.nopack(i64) #1122 123; CHECK-LABEL: <f8>:124; CHECK: r{{[1-9]}}:{{[0-9]}} = vsatwh(r{{[1-9]}}:{{[0-9]}})125define double @f8(double %a0) #0 {126b0:127 %v0 = alloca double, align 8128 store double %a0, ptr %v0, align 8129 %v1 = load double, ptr %v0, align 8130 %v2 = fptosi double %v1 to i64131 %v3 = call i64 @llvm.hexagon.S2.vsatwh.nopack(i64 %v2)132 %v4 = sitofp i64 %v3 to double133 ret double %v4134}135 136declare i64 @llvm.hexagon.S2.vsatwh.nopack(i64) #1137 138; CHECK-LABEL: <f9>:139; CHECK: r{{[1-9]}}:{{[0-9]}} = vsatwuh(r{{[1-9]}}:{{[0-9]}})140define double @f9(double %a0) #0 {141b0:142 %v0 = alloca double, align 8143 store double %a0, ptr %v0, align 8144 %v1 = load double, ptr %v0, align 8145 %v2 = fptosi double %v1 to i64146 %v3 = call i64 @llvm.hexagon.S2.vsatwuh.nopack(i64 %v2)147 %v4 = sitofp i64 %v3 to double148 ret double %v4149}150 151declare i64 @llvm.hexagon.S2.vsatwuh.nopack(i64) #1152 153; CHECK-LABEL: <f10>:154; CHECK: r{{[1-9]}}:{{[0-9]}} = asr(r{{[1-9]}}:{{[0-9]}},#1)155define double @f10(double %a0) #0 {156b0:157 %v0 = alloca double, align 8158 store double %a0, ptr %v0, align 8159 %v1 = load double, ptr %v0, align 8160 %v2 = fptosi double %v1 to i64161 %v3 = call i64 @llvm.hexagon.S2.asr.i.p(i64 %v2, i32 1)162 %v4 = sitofp i64 %v3 to double163 ret double %v4164}165 166declare i64 @llvm.hexagon.S2.asr.i.p(i64, i32) #1167 168; CHECK-LABEL: <f11>:169; CHECK: r{{[1-9]}}:{{[0-9]}} = lsr(r{{[1-9]}}:{{[0-9]}},#1)170define double @f11(double %a0) #0 {171b0:172 %v0 = alloca double, align 8173 store double %a0, ptr %v0, align 8174 %v1 = load double, ptr %v0, align 8175 %v2 = fptosi double %v1 to i64176 %v3 = call i64 @llvm.hexagon.S2.lsr.i.p(i64 %v2, i32 1)177 %v4 = sitofp i64 %v3 to double178 ret double %v4179}180 181declare i64 @llvm.hexagon.S2.lsr.i.p(i64, i32) #1182 183; CHECK-LABEL: <f12>:184; CHECK: r{{[1-9]}}:{{[0-9]}} = asl(r{{[1-9]}}:{{[0-9]}},#1)185define double @f12(double %a0) #0 {186b0:187 %v0 = alloca double, align 8188 store double %a0, ptr %v0, align 8189 %v1 = load double, ptr %v0, align 8190 %v2 = fptosi double %v1 to i64191 %v3 = call i64 @llvm.hexagon.S2.asl.i.p(i64 %v2, i32 1)192 %v4 = sitofp i64 %v3 to double193 ret double %v4194}195 196declare i64 @llvm.hexagon.S2.asl.i.p(i64, i32) #1197 198; CHECK-LABEL: <f13>:199; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsh(r{{[1-9]}}:{{[0-9]}})200define double @f13(double %a0) #0 {201b0:202 %v0 = alloca double, align 8203 store double %a0, ptr %v0, align 8204 %v1 = load double, ptr %v0, align 8205 %v2 = fptosi double %v1 to i64206 %v3 = call i64 @llvm.hexagon.A2.vabsh(i64 %v2)207 %v4 = sitofp i64 %v3 to double208 ret double %v4209}210 211declare i64 @llvm.hexagon.A2.vabsh(i64) #1212 213; CHECK-LABEL: <f14>:214; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsh(r{{[1-9]}}:{{[0-9]}}):sat215define double @f14(double %a0) #0 {216b0:217 %v0 = alloca double, align 8218 store double %a0, ptr %v0, align 8219 %v1 = load double, ptr %v0, align 8220 %v2 = fptosi double %v1 to i64221 %v3 = call i64 @llvm.hexagon.A2.vabshsat(i64 %v2)222 %v4 = sitofp i64 %v3 to double223 ret double %v4224}225 226declare i64 @llvm.hexagon.A2.vabshsat(i64) #1227 228; CHECK-LABEL: <f15>:229; CHECK: r{{[0-9]}}:{{[0-9]}} = vasrh(r{{[1-9]}}:{{[0-9]}},#1)230define double @f15(double %a0) #0 {231b0:232 %v0 = alloca double, align 8233 store double %a0, ptr %v0, align 8234 %v1 = load double, ptr %v0, align 8235 %v2 = fptosi double %v1 to i64236 %v3 = call i64 @llvm.hexagon.S2.asr.i.vh(i64 %v2, i32 1)237 %v4 = sitofp i64 %v3 to double238 ret double %v4239}240 241declare i64 @llvm.hexagon.S2.asr.i.vh(i64, i32) #1242 243; CHECK-LABEL: <f16>:244; CHECK: r{{[1-9]}}:{{[0-9]}} = vlsrh(r{{[1-9]}}:{{[0-9]}},#1)245define double @f16(double %a0) #0 {246b0:247 %v0 = alloca double, align 8248 store double %a0, ptr %v0, align 8249 %v1 = load double, ptr %v0, align 8250 %v2 = fptosi double %v1 to i64251 %v3 = call i64 @llvm.hexagon.S2.lsr.i.vh(i64 %v2, i32 1)252 %v4 = sitofp i64 %v3 to double253 ret double %v4254}255 256declare i64 @llvm.hexagon.S2.lsr.i.vh(i64, i32) #1257 258; CHECK-LABEL: <f17>:259; CHECK: r{{[1-9]}}:{{[0-9]}} = vaslh(r{{[1-9]}}:{{[0-9]}},#1)260define double @f17(double %a0) #0 {261b0:262 %v0 = alloca double, align 8263 store double %a0, ptr %v0, align 8264 %v1 = load double, ptr %v0, align 8265 %v2 = fptosi double %v1 to i64266 %v3 = call i64 @llvm.hexagon.S2.asl.i.vh(i64 %v2, i32 1)267 %v4 = sitofp i64 %v3 to double268 ret double %v4269}270 271declare i64 @llvm.hexagon.S2.asl.i.vh(i64, i32) #1272 273; CHECK-LABEL: <f18>:274; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsw(r{{[1-9]}}:{{[0-9]}})275define double @f18(double %a0) #0 {276b0:277 %v0 = alloca double, align 8278 store double %a0, ptr %v0, align 8279 %v1 = load double, ptr %v0, align 8280 %v2 = fptosi double %v1 to i64281 %v3 = call i64 @llvm.hexagon.A2.vabsw(i64 %v2)282 %v4 = sitofp i64 %v3 to double283 ret double %v4284}285 286declare i64 @llvm.hexagon.A2.vabsw(i64) #1287 288; CHECK-LABEL: <f19>:289; CHECK: r{{[1-9]}}:{{[0-9]}} = vabsw(r{{[1-9]}}:{{[0-9]}}):sat290define double @f19(double %a0) #0 {291b0:292 %v0 = alloca double, align 8293 store double %a0, ptr %v0, align 8294 %v1 = load double, ptr %v0, align 8295 %v2 = fptosi double %v1 to i64296 %v3 = call i64 @llvm.hexagon.A2.vabswsat(i64 %v2)297 %v4 = sitofp i64 %v3 to double298 ret double %v4299}300 301declare i64 @llvm.hexagon.A2.vabswsat(i64) #1302 303; CHECK-LABEL: <f20>:304; CHECK: r{{[1-9]}}:{{[0-9]}} = vasrw(r{{[1-9]}}:{{[0-9]}},#1)305define double @f20(double %a0) #0 {306b0:307 %v0 = alloca double, align 8308 store double %a0, ptr %v0, align 8309 %v1 = load double, ptr %v0, align 8310 %v2 = fptosi double %v1 to i64311 %v3 = call i64 @llvm.hexagon.S2.asr.i.vw(i64 %v2, i32 1)312 %v4 = sitofp i64 %v3 to double313 ret double %v4314}315 316declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) #1317 318; CHECK-LABEL: <f21>:319; CHECK: r{{[1-9]}}:{{[0-9]}} = vlsrw(r{{[1-9]}}:{{[0-9]}},#1)320define double @f21(double %a0) #0 {321b0:322 %v0 = alloca double, align 8323 store double %a0, ptr %v0, align 8324 %v1 = load double, ptr %v0, align 8325 %v2 = fptosi double %v1 to i64326 %v3 = call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %v2, i32 1)327 %v4 = sitofp i64 %v3 to double328 ret double %v4329}330 331declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32) #1332 333; CHECK-LABEL: <f22>:334; CHECK: r{{[1-9]}}:{{[0-9]}} = vaslw(r{{[1-9]}}:{{[0-9]}},#1)335define double @f22(double %a0) #0 {336b0:337 %v0 = alloca double, align 8338 store double %a0, ptr %v0, align 8339 %v1 = load double, ptr %v0, align 8340 %v2 = fptosi double %v1 to i64341 %v3 = call i64 @llvm.hexagon.S2.asl.i.vw(i64 %v2, i32 1)342 %v4 = sitofp i64 %v3 to double343 ret double %v4344}345 346declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) #1347 348; CHECK-LABEL: <f23>:349; CHECK: r{{[1-9]}}:{{[0-9]}} = brev(r{{[1-9]}}:{{[0-9]}})350define double @f23(double %a0) #0 {351b0:352 %v0 = alloca double, align 8353 store double %a0, ptr %v0, align 8354 %v1 = load double, ptr %v0, align 8355 %v2 = fptosi double %v1 to i64356 %v3 = call i64 @llvm.hexagon.S2.brevp(i64 %v2)357 %v4 = sitofp i64 %v3 to double358 ret double %v4359}360 361declare i64 @llvm.hexagon.S2.brevp(i64) #1362 363attributes #0 = { nounwind }364attributes #1 = { nounwind readnone }365