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1; RUN: llc -mtriple=hexagon -hexagon-small-data-threshold=0 < %s | FileCheck %s2; Check that we generate load instructions with absolute addressing mode.3 4@a0 = external global i325@a1 = external global i326@b0 = external global i87@b1 = external global i88@c0 = external global i169@c1 = external global i1610@d = external global i6411 12define zeroext i8 @absStoreByte() nounwind {13; CHECK: memb(##b1) = r{{[0-9]+}}14entry:15 %0 = load i8, ptr @b0, align 116 %conv = zext i8 %0 to i3217 %mul = mul nsw i32 100, %conv18 %conv1 = trunc i32 %mul to i819 store i8 %conv1, ptr @b1, align 120 ret i8 %conv121}22 23define signext i16 @absStoreHalf() nounwind {24; CHECK: memh(##c1) = r{{[0-9]+}}25entry:26 %0 = load i16, ptr @c0, align 227 %conv = sext i16 %0 to i3228 %mul = mul nsw i32 100, %conv29 %conv1 = trunc i32 %mul to i1630 store i16 %conv1, ptr @c1, align 231 ret i16 %conv132}33 34define i32 @absStoreWord() nounwind {35; CHECK: memw(##a1) = r{{[0-9]+}}36entry:37 %0 = load i32, ptr @a0, align 438 %mul = mul nsw i32 100, %039 store i32 %mul, ptr @a1, align 440 ret i32 %mul41}42 43define void @absStoreDouble() nounwind {44; CHECK: memd(##d) = r{{[0-9]+}}:{{[0-9]+}}45entry:46 store i64 100, ptr @d, align 847 ret void48}49 50