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1; RUN: llc -O0 -mtriple=hexagon < %s | FileCheck %s2 3; CHECK: [[REG0:(r[0-9]+)]] = add(r{{[0-9]+}},mpyi([[REG0]],r{{[0-9]+}})4; CHECK: [[REG0:(r[0-9]+)]] = add(r{{[0-9]+}},mpyi([[REG0]],r{{[0-9]+}})5 6target triple = "hexagon"7 8@g0 = private unnamed_addr constant [50 x i8] c"%x : Q6_R_add_mpyi_RRR(INT_MIN,INT_MIN,INT_MIN)\0A\00", align 19@g1 = private unnamed_addr constant [45 x i8] c"%x : Q6_R_add_mpyi_RRR(-1,INT_MIN,INT_MIN)\0A\00", align 110 11; Function Attrs: nounwind12declare i32 @f0(ptr nocapture readonly, ...) #013 14; Function Attrs: nounwind15define i32 @f1() #0 {16b0:17 %v0 = tail call i32 @llvm.hexagon.M4.mpyrr.addr(i32 -2147483648, i32 -2147483648, i32 -2147483648)18 %v1 = tail call i32 (ptr, ...) @f0(ptr @g0, i32 %v0) #219 %v2 = tail call i32 @llvm.hexagon.M4.mpyrr.addr(i32 -1, i32 -2147483648, i32 -2147483648)20 %v3 = tail call i32 (ptr, ...) @f0(ptr @g1, i32 %v2) #221 ret i32 022}23 24; Function Attrs: nounwind readnone25declare i32 @llvm.hexagon.M4.mpyrr.addr(i32, i32, i32) #126 27attributes #0 = { nounwind "target-cpu"="hexagonv55" }28attributes #1 = { nounwind readnone }29attributes #2 = { nounwind }30