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1; RUN: llc -mtriple=hexagon -O0 < %s | FileCheck %s2 3; CHECK-LABEL: @test004; CHECK: = cmp.eq(r1:0,r3:2)5define i32 @test00(i64 %Rs, i64 %Rt) #0 {6entry:7 %0 = tail call i32 @llvm.hexagon.C2.cmpeqp(i64 %Rs, i64 %Rt)8 ret i32 %09}10 11; CHECK-LABEL: @test0112; CHECK: = cmp.gt(r1:0,r3:2)13define i32 @test01(i64 %Rs, i64 %Rt) #0 {14entry:15 %0 = tail call i32 @llvm.hexagon.C2.cmpgtp(i64 %Rs, i64 %Rt)16 ret i32 %017}18 19; CHECK-LABEL: @test0220; CHECK: = cmp.gtu(r1:0,r3:2)21define i32 @test02(i64 %Rs, i64 %Rt) #0 {22entry:23 %0 = tail call i32 @llvm.hexagon.C2.cmpgtup(i64 %Rs, i64 %Rt)24 ret i32 %025}26 27; CHECK-LABEL: @test1028; CHECK: = cmp.eq(r0,r1)29define i32 @test10(i32 %Rs, i32 %Rt) #0 {30entry:31 %0 = tail call i32 @llvm.hexagon.A4.rcmpeq(i32 %Rs, i32 %Rt)32 ret i32 %033}34 35; CHECK-LABEL: @test1136; CHECK: = !cmp.eq(r0,r1)37define i32 @test11(i32 %Rs, i32 %Rt) #0 {38entry:39 %0 = tail call i32 @llvm.hexagon.A4.rcmpneq(i32 %Rs, i32 %Rt)40 ret i32 %041}42 43; CHECK-LABEL: @test1244; CHECK: = cmp.eq(r0,#23)45define i32 @test12(i32 %Rs) #0 {46entry:47 %0 = tail call i32 @llvm.hexagon.A4.rcmpeqi(i32 %Rs, i32 23)48 ret i32 %049}50 51; CHECK-LABEL: @test1352; CHECK: = !cmp.eq(r0,#47)53define i32 @test13(i32 %Rs) #0 {54entry:55 %0 = tail call i32 @llvm.hexagon.A4.rcmpneqi(i32 %Rs, i32 47)56 ret i32 %057}58 59; CHECK-LABEL: @test2060; CHECK: = cmpb.eq(r0,r1)61define i32 @test20(i32 %Rs, i32 %Rt) #0 {62entry:63 %0 = tail call i32 @llvm.hexagon.A4.cmpbeq(i32 %Rs, i32 %Rt)64 ret i32 %065}66 67; CHECK-LABEL: @test2168; CHECK: = cmpb.gt(r0,r1)69define i32 @test21(i32 %Rs, i32 %Rt) #0 {70entry:71 %0 = tail call i32 @llvm.hexagon.A4.cmpbgt(i32 %Rs, i32 %Rt)72 ret i32 %073}74 75; CHECK-LABEL: @test2276; CHECK: = cmpb.gtu(r0,r1)77define i32 @test22(i32 %Rs, i32 %Rt) #0 {78entry:79 %0 = tail call i32 @llvm.hexagon.A4.cmpbgtu(i32 %Rs, i32 %Rt)80 ret i32 %081}82 83; CHECK-LABEL: @test2384; CHECK: = cmpb.eq(r0,#56)85define i32 @test23(i32 %Rs) #0 {86entry:87 %0 = tail call i32 @llvm.hexagon.A4.cmpbeqi(i32 %Rs, i32 56)88 ret i32 %089}90 91; CHECK-LABEL: @test2492; CHECK: = cmpb.gt(r0,#29)93define i32 @test24(i32 %Rs) #0 {94entry:95 %0 = tail call i32 @llvm.hexagon.A4.cmpbgti(i32 %Rs, i32 29)96 ret i32 %097}98 99; CHECK-LABEL: @test25100; CHECK: = cmpb.gtu(r0,#111)101define i32 @test25(i32 %Rs) #0 {102entry:103 %0 = tail call i32 @llvm.hexagon.A4.cmpbgtui(i32 %Rs, i32 111)104 ret i32 %0105}106 107; CHECK-LABEL: @test30108; CHECK: = cmph.eq(r0,r1)109define i32 @test30(i32 %Rs, i32 %Rt) #0 {110entry:111 %0 = tail call i32 @llvm.hexagon.A4.cmpheq(i32 %Rs, i32 %Rt)112 ret i32 %0113}114 115; CHECK-LABEL: @test31116; CHECK: = cmph.gt(r0,r1)117define i32 @test31(i32 %Rs, i32 %Rt) #0 {118entry:119 %0 = tail call i32 @llvm.hexagon.A4.cmphgt(i32 %Rs, i32 %Rt)120 ret i32 %0121}122 123; CHECK-LABEL: @test32124; CHECK: = cmph.gtu(r0,r1)125define i32 @test32(i32 %Rs, i32 %Rt) #0 {126entry:127 %0 = tail call i32 @llvm.hexagon.A4.cmphgtu(i32 %Rs, i32 %Rt)128 ret i32 %0129}130 131; CHECK-LABEL: @test33132; CHECK: = cmph.eq(r0,#-123)133define i32 @test33(i32 %Rs) #0 {134entry:135 %0 = tail call i32 @llvm.hexagon.A4.cmpheqi(i32 %Rs, i32 -123)136 ret i32 %0137}138 139; CHECK-LABEL: @test34140; CHECK: = cmph.gt(r0,#-3)141define i32 @test34(i32 %Rs) #0 {142entry:143 %0 = tail call i32 @llvm.hexagon.A4.cmphgti(i32 %Rs, i32 -3)144 ret i32 %0145}146 147; CHECK-LABEL: @test35148; CHECK: = cmph.gtu(r0,#13)149define i32 @test35(i32 %Rs) #0 {150entry:151 %0 = tail call i32 @llvm.hexagon.A4.cmphgtui(i32 %Rs, i32 13)152 ret i32 %0153}154 155; CHECK-LABEL: @test40156; CHECK: = vmux(p0,r3:2,r5:4)157define i64 @test40(i32 %Pu, i64 %Rs, i64 %Rt) #0 {158entry:159 %0 = tail call i64 @llvm.hexagon.C2.vmux(i32 %Pu, i64 %Rs, i64 %Rt)160 ret i64 %0161}162 163; CHECK-LABEL: @test41164; CHECK: = any8(vcmpb.eq(r1:0,r3:2))165define i32 @test41(i64 %Rs, i64 %Rt) #0 {166entry:167 %0 = tail call i32 @llvm.hexagon.A4.vcmpbeq.any(i64 %Rs, i64 %Rt)168 ret i32 %0169}170 171; CHECK-LABEL: @test50172; CHECK: = add(r1:0,r3:2)173define i64 @test50(i64 %Rs, i64 %Rt) #0 {174entry:175 %0 = tail call i64 @llvm.hexagon.A2.addp(i64 %Rs, i64 %Rt)176 ret i64 %0177}178 179; CHECK-LABEL: @test51180; CHECK: = add(r1:0,r3:2):sat181define i64 @test51(i64 %Rs, i64 %Rt) #0 {182entry:183 %0 = tail call i64 @llvm.hexagon.A2.addpsat(i64 %Rs, i64 %Rt)184 ret i64 %0185}186 187; CHECK-LABEL: @test52188; CHECK: = sub(r1:0,r3:2)189define i64 @test52(i64 %Rs, i64 %Rt) #0 {190entry:191 %0 = tail call i64 @llvm.hexagon.A2.subp(i64 %Rs, i64 %Rt)192 ret i64 %0193}194 195; CHECK-LABEL: @test53196; CHECK: = add(r1:0,r3:2):raw:197define i64 @test53(i32 %Rs, i64 %Rt) #0 {198entry:199 %0 = tail call i64 @llvm.hexagon.A2.addsp(i32 %Rs, i64 %Rt)200 ret i64 %0201}202 203; CHECK-LABEL: @test54204; CHECK: = and(r1:0,r3:2)205define i64 @test54(i64 %Rs, i64 %Rt) #0 {206entry:207 %0 = tail call i64 @llvm.hexagon.A2.andp(i64 %Rs, i64 %Rt)208 ret i64 %0209}210 211; CHECK-LABEL: @test55212; CHECK: = or(r1:0,r3:2)213define i64 @test55(i64 %Rs, i64 %Rt) #0 {214entry:215 %0 = tail call i64 @llvm.hexagon.A2.orp(i64 %Rs, i64 %Rt)216 ret i64 %0217}218 219; CHECK-LABEL: @test56220; CHECK: = xor(r1:0,r3:2)221define i64 @test56(i64 %Rs, i64 %Rt) #0 {222entry:223 %0 = tail call i64 @llvm.hexagon.A2.xorp(i64 %Rs, i64 %Rt)224 ret i64 %0225}226 227; CHECK-LABEL: @test57228; CHECK: = and(r1:0,~r3:2)229define i64 @test57(i64 %Rs, i64 %Rt) #0 {230entry:231 %0 = tail call i64 @llvm.hexagon.A4.andnp(i64 %Rs, i64 %Rt)232 ret i64 %0233}234 235; CHECK-LABEL: @test58236; CHECK: = or(r1:0,~r3:2)237define i64 @test58(i64 %Rs, i64 %Rt) #0 {238entry:239 %0 = tail call i64 @llvm.hexagon.A4.ornp(i64 %Rs, i64 %Rt)240 ret i64 %0241}242 243; CHECK-LABEL: @test60244; CHECK: = add(r0.l,r1.l)245define i32 @test60(i32 %Rs, i32 %Rt) #0 {246entry:247 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.ll(i32 %Rs, i32 %Rt)248 ret i32 %0249}250 251; CHECK-LABEL: @test61252; CHECK: = add(r0.l,r1.h)253define i32 @test61(i32 %Rs, i32 %Rt) #0 {254entry:255 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.hl(i32 %Rs, i32 %Rt)256 ret i32 %0257}258 259; CHECK-LABEL: @test62260; CHECK: = add(r0.l,r1.l):sat261define i32 @test62(i32 %Rs, i32 %Rt) #0 {262entry:263 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %Rs, i32 %Rt)264 ret i32 %0265}266 267; CHECK-LABEL: @test63268; CHECK: = add(r0.l,r1.h):sat269define i32 @test63(i32 %Rs, i32 %Rt) #0 {270entry:271 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32 %Rs, i32 %Rt)272 ret i32 %0273}274 275; CHECK-LABEL: @test64276; CHECK: = add(r0.l,r1.l):<<16277define i32 @test64(i32 %Rs, i32 %Rt) #0 {278entry:279 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.ll(i32 %Rs, i32 %Rt)280 ret i32 %0281}282 283; CHECK-LABEL: @test65284; CHECK: = add(r0.l,r1.h):<<16285define i32 @test65(i32 %Rs, i32 %Rt) #0 {286entry:287 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.lh(i32 %Rs, i32 %Rt)288 ret i32 %0289}290 291; CHECK-LABEL: @test66292; CHECK: = add(r0.h,r1.l):<<16293define i32 @test66(i32 %Rs, i32 %Rt) #0 {294entry:295 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.hl(i32 %Rs, i32 %Rt)296 ret i32 %0297}298 299; CHECK-LABEL: @test67300; CHECK: = add(r0.h,r1.h):<<16301define i32 @test67(i32 %Rs, i32 %Rt) #0 {302entry:303 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.hh(i32 %Rs, i32 %Rt)304 ret i32 %0305}306 307; CHECK-LABEL: @test68308; CHECK: = add(r0.l,r1.l):sat:<<16309define i32 @test68(i32 %Rs, i32 %Rt) #0 {310entry:311 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.ll(i32 %Rs, i32 %Rt)312 ret i32 %0313}314 315; CHECK-LABEL: @test69316; CHECK: = add(r0.l,r1.h):sat:<<16317define i32 @test69(i32 %Rs, i32 %Rt) #0 {318entry:319 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.lh(i32 %Rs, i32 %Rt)320 ret i32 %0321}322 323; CHECK-LABEL: @test6A324; CHECK: = add(r0.h,r1.l):sat:<<16325define i32 @test6A(i32 %Rs, i32 %Rt) #0 {326entry:327 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.hl(i32 %Rs, i32 %Rt)328 ret i32 %0329}330 331; CHECK-LABEL: @test6B332; CHECK: = add(r0.h,r1.h):sat:<<16333define i32 @test6B(i32 %Rs, i32 %Rt) #0 {334entry:335 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.hh(i32 %Rs, i32 %Rt)336 ret i32 %0337}338 339; CHECK-LABEL: @test70340; CHECK: = sub(r0.l,r1.l)341define i32 @test70(i32 %Rs, i32 %Rt) #0 {342entry:343 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.ll(i32 %Rs, i32 %Rt)344 ret i32 %0345}346 347; CHECK-LABEL: @test71348; CHECK: = sub(r0.l,r1.h)349define i32 @test71(i32 %Rs, i32 %Rt) #0 {350entry:351 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.hl(i32 %Rs, i32 %Rt)352 ret i32 %0353}354 355; CHECK-LABEL: @test72356; CHECK: = sub(r0.l,r1.l):sat357define i32 @test72(i32 %Rs, i32 %Rt) #0 {358entry:359 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %Rs, i32 %Rt)360 ret i32 %0361}362 363; CHECK-LABEL: @test73364; CHECK: = sub(r0.l,r1.h):sat365define i32 @test73(i32 %Rs, i32 %Rt) #0 {366entry:367 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.hl(i32 %Rs, i32 %Rt)368 ret i32 %0369}370 371; CHECK-LABEL: @test74372; CHECK: = sub(r0.l,r1.l):<<16373define i32 @test74(i32 %Rs, i32 %Rt) #0 {374entry:375 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.ll(i32 %Rs, i32 %Rt)376 ret i32 %0377}378 379; CHECK-LABEL: @test75380; CHECK: = sub(r0.l,r1.h):<<16381define i32 @test75(i32 %Rs, i32 %Rt) #0 {382entry:383 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.lh(i32 %Rs, i32 %Rt)384 ret i32 %0385}386 387; CHECK-LABEL: @test76388; CHECK: = sub(r0.h,r1.l):<<16389define i32 @test76(i32 %Rs, i32 %Rt) #0 {390entry:391 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.hl(i32 %Rs, i32 %Rt)392 ret i32 %0393}394 395; CHECK-LABEL: @test77396; CHECK: = sub(r0.h,r1.h):<<16397define i32 @test77(i32 %Rs, i32 %Rt) #0 {398entry:399 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.hh(i32 %Rs, i32 %Rt)400 ret i32 %0401}402 403; CHECK-LABEL: @test78404; CHECK: = sub(r0.l,r1.l):sat:<<16405define i32 @test78(i32 %Rs, i32 %Rt) #0 {406entry:407 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.ll(i32 %Rs, i32 %Rt)408 ret i32 %0409}410 411; CHECK-LABEL: @test79412; CHECK: = sub(r0.l,r1.h):sat:<<16413define i32 @test79(i32 %Rs, i32 %Rt) #0 {414entry:415 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.lh(i32 %Rs, i32 %Rt)416 ret i32 %0417}418 419; CHECK-LABEL: @test7A420; CHECK: = sub(r0.h,r1.l):sat:<<16421define i32 @test7A(i32 %Rs, i32 %Rt) #0 {422entry:423 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.hl(i32 %Rs, i32 %Rt)424 ret i32 %0425}426 427; CHECK-LABEL: @test7B428; CHECK: = sub(r0.h,r1.h):sat:<<16429define i32 @test7B(i32 %Rs, i32 %Rt) #0 {430entry:431 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.hh(i32 %Rs, i32 %Rt)432 ret i32 %0433}434 435; CHECK-LABEL: @test90436; CHECK: = and(#1,asl(r0,#2))437define i32 @test90(i32 %Rs) #0 {438entry:439 %0 = tail call i32 @llvm.hexagon.S4.andi.asl.ri(i32 1, i32 %Rs, i32 2)440 ret i32 %0441}442 443; CHECK-LABEL: @test91444; CHECK: = or(#1,asl(r0,#2))445define i32 @test91(i32 %Rs) #0 {446entry:447 %0 = tail call i32 @llvm.hexagon.S4.ori.asl.ri(i32 1, i32 %Rs, i32 2)448 ret i32 %0449}450 451; CHECK-LABEL: @test92452; CHECK: = add(#1,asl(r0,#2))453define i32 @test92(i32 %Rs) #0 {454entry:455 %0 = tail call i32 @llvm.hexagon.S4.addi.asl.ri(i32 1, i32 %Rs, i32 2)456 ret i32 %0457}458 459; CHECK-LABEL: @test93460; CHECK: = sub(#1,asl(r0,#2))461define i32 @test93(i32 %Rs) #0 {462entry:463 %0 = tail call i32 @llvm.hexagon.S4.subi.asl.ri(i32 1, i32 %Rs, i32 2)464 ret i32 %0465}466 467; CHECK-LABEL: @test94468; CHECK: = and(#1,lsr(r0,#2))469define i32 @test94(i32 %Rs) #0 {470entry:471 %0 = tail call i32 @llvm.hexagon.S4.andi.lsr.ri(i32 1, i32 %Rs, i32 2)472 ret i32 %0473}474 475; CHECK-LABEL: @test95476; CHECK: = or(#1,lsr(r0,#2))477define i32 @test95(i32 %Rs) #0 {478entry:479 %0 = tail call i32 @llvm.hexagon.S4.ori.lsr.ri(i32 1, i32 %Rs, i32 2)480 ret i32 %0481}482 483; CHECK-LABEL: @test96484; CHECK: = add(#1,lsr(r0,#2))485define i32 @test96(i32 %Rs) #0 {486entry:487 %0 = tail call i32 @llvm.hexagon.S4.addi.lsr.ri(i32 1, i32 %Rs, i32 2)488 ret i32 %0489}490 491; CHECK-LABEL: @test97492; CHECK: = sub(#1,lsr(r0,#2))493define i32 @test97(i32 %Rs) #0 {494entry:495 %0 = tail call i32 @llvm.hexagon.S4.subi.lsr.ri(i32 1, i32 %Rs, i32 2)496 ret i32 %0497}498 499; CHECK-LABEL: @test100500; CHECK: = bitsplit(r0,r1)501define i64 @test100(i32 %Rs, i32 %Rt) #0 {502entry:503 %0 = tail call i64 @llvm.hexagon.A4.bitsplit(i32 %Rs, i32 %Rt)504 ret i64 %0505}506 507; CHECK-LABEL: @test101508; CHECK: = modwrap(r0,r1)509define i32 @test101(i32 %Rs, i32 %Rt) #0 {510entry:511 %0 = tail call i32 @llvm.hexagon.A4.modwrapu(i32 %Rs, i32 %Rt)512 ret i32 %0513}514 515; CHECK-LABEL: @test102516; CHECK: = parity(r1:0,r3:2)517define i32 @test102(i64 %Rs, i64 %Rt) #0 {518entry:519 %0 = tail call i32 @llvm.hexagon.S2.parityp(i64 %Rs, i64 %Rt)520 ret i32 %0521}522 523; CHECK-LABEL: @test103524; CHECK: = parity(r0,r1)525define i32 @test103(i32 %Rs, i32 %Rt) #0 {526entry:527 %0 = tail call i32 @llvm.hexagon.S4.parity(i32 %Rs, i32 %Rt)528 ret i32 %0529}530 531declare i32 @llvm.hexagon.C2.cmpeqp(i64, i64) #1532declare i32 @llvm.hexagon.C2.cmpgtp(i64, i64) #1533declare i32 @llvm.hexagon.C2.cmpgtup(i64, i64) #1534declare i32 @llvm.hexagon.A4.rcmpeq(i32, i32) #1535declare i32 @llvm.hexagon.A4.rcmpneq(i32, i32) #1536declare i32 @llvm.hexagon.A4.rcmpeqi(i32, i32) #1537declare i32 @llvm.hexagon.A4.rcmpneqi(i32, i32) #1538declare i32 @llvm.hexagon.A4.cmpbeq(i32, i32) #1539declare i32 @llvm.hexagon.A4.cmpbgt(i32, i32) #1540declare i32 @llvm.hexagon.A4.cmpbgtu(i32, i32) #1541declare i32 @llvm.hexagon.A4.cmpbeqi(i32, i32) #1542declare i32 @llvm.hexagon.A4.cmpbgti(i32, i32) #1543declare i32 @llvm.hexagon.A4.cmpbgtui(i32, i32) #1544declare i32 @llvm.hexagon.A4.cmpheq(i32, i32) #1545declare i32 @llvm.hexagon.A4.cmphgt(i32, i32) #1546declare i32 @llvm.hexagon.A4.cmphgtu(i32, i32) #1547declare i32 @llvm.hexagon.A4.cmpheqi(i32, i32) #1548declare i32 @llvm.hexagon.A4.cmphgti(i32, i32) #1549declare i32 @llvm.hexagon.A4.cmphgtui(i32, i32) #1550declare i64 @llvm.hexagon.C2.vmux(i32, i64, i64) #1551declare i32 @llvm.hexagon.A4.vcmpbeq.any(i64, i64) #1552declare i64 @llvm.hexagon.A2.addp(i64, i64) #1553declare i64 @llvm.hexagon.A2.addpsat(i64, i64) #1554declare i64 @llvm.hexagon.A2.subp(i64, i64) #1555declare i64 @llvm.hexagon.A2.addsp(i32, i64) #1556declare i64 @llvm.hexagon.A2.andp(i64, i64) #1557declare i64 @llvm.hexagon.A2.orp(i64, i64) #1558declare i64 @llvm.hexagon.A2.xorp(i64, i64) #1559declare i64 @llvm.hexagon.A4.ornp(i64, i64) #1560declare i64 @llvm.hexagon.A4.andnp(i64, i64) #1561declare i32 @llvm.hexagon.A2.addh.l16.ll(i32, i32) #1562declare i32 @llvm.hexagon.A2.addh.l16.hl(i32, i32) #1563declare i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32, i32) #1564declare i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32, i32) #1565declare i32 @llvm.hexagon.A2.addh.h16.ll(i32, i32) #1566declare i32 @llvm.hexagon.A2.addh.h16.lh(i32, i32) #1567declare i32 @llvm.hexagon.A2.addh.h16.hl(i32, i32) #1568declare i32 @llvm.hexagon.A2.addh.h16.hh(i32, i32) #1569declare i32 @llvm.hexagon.A2.addh.h16.sat.ll(i32, i32) #1570declare i32 @llvm.hexagon.A2.addh.h16.sat.lh(i32, i32) #1571declare i32 @llvm.hexagon.A2.addh.h16.sat.hl(i32, i32) #1572declare i32 @llvm.hexagon.A2.addh.h16.sat.hh(i32, i32) #1573declare i32 @llvm.hexagon.A2.subh.l16.ll(i32, i32) #1574declare i32 @llvm.hexagon.A2.subh.l16.hl(i32, i32) #1575declare i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32, i32) #1576declare i32 @llvm.hexagon.A2.subh.l16.sat.hl(i32, i32) #1577declare i32 @llvm.hexagon.A2.subh.h16.ll(i32, i32) #1578declare i32 @llvm.hexagon.A2.subh.h16.lh(i32, i32) #1579declare i32 @llvm.hexagon.A2.subh.h16.hl(i32, i32) #1580declare i32 @llvm.hexagon.A2.subh.h16.hh(i32, i32) #1581declare i32 @llvm.hexagon.A2.subh.h16.sat.ll(i32, i32) #1582declare i32 @llvm.hexagon.A2.subh.h16.sat.lh(i32, i32) #1583declare i32 @llvm.hexagon.A2.subh.h16.sat.hl(i32, i32) #1584declare i32 @llvm.hexagon.A2.subh.h16.sat.hh(i32, i32) #1585declare i64 @llvm.hexagon.A4.bitsplit(i32, i32) #1586declare i32 @llvm.hexagon.A4.modwrapu(i32, i32) #1587declare i32 @llvm.hexagon.S2.parityp(i64, i64) #1588declare i32 @llvm.hexagon.S4.parity(i32, i32) #1589declare i32 @llvm.hexagon.S4.andi.asl.ri(i32, i32, i32) #1590declare i32 @llvm.hexagon.S4.ori.asl.ri(i32, i32, i32) #1591declare i32 @llvm.hexagon.S4.addi.asl.ri(i32, i32, i32) #1592declare i32 @llvm.hexagon.S4.subi.asl.ri(i32, i32, i32) #1593declare i32 @llvm.hexagon.S4.andi.lsr.ri(i32, i32, i32) #1594declare i32 @llvm.hexagon.S4.ori.lsr.ri(i32, i32, i32) #1595declare i32 @llvm.hexagon.S4.addi.lsr.ri(i32, i32, i32) #1596declare i32 @llvm.hexagon.S4.subi.lsr.ri(i32, i32, i32) #1597 598attributes #0 = { nounwind readnone "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }599attributes #1 = { nounwind readnone }600