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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; CHECK: f13 4target triple = "hexagon"5 6%s.0 = type { i32 }7 8@g0 = internal unnamed_addr global ptr null, section ".data.............", align 49@g1 = internal global i32 0, section ".data.............", align 410 11; Function Attrs: nounwind12define ptr @f0(ptr %a0) #0 {13b0:14 %v0 = getelementptr inbounds i32, ptr %a0, i32 -115 %v1 = load i32, ptr %v0, align 416 %v2 = and i32 %v1, -317 store i32 %v2, ptr %v0, align 418 %v3 = getelementptr inbounds i32, ptr %a0, i32 -219 %v4 = load i32, ptr %v3, align 420 %v5 = lshr i32 %v4, 221 %v6 = xor i32 %v5, -122 %v7 = getelementptr inbounds i32, ptr %a0, i32 %v623 %v8 = lshr i32 %v1, 224 %v9 = add i32 %v8, -125 %v10 = getelementptr inbounds i32, ptr %a0, i32 %v926 %v11 = load i32, ptr %v10, align 427 %v12 = lshr i32 %v11, 228 %v13 = icmp eq i32 %v12, 029 br i1 %v13, label %b3, label %b130 31b1: ; preds = %b032 %v14 = add i32 %v12, %v933 %v15 = getelementptr inbounds i32, ptr %a0, i32 %v1434 %v16 = load i32, ptr %v15, align 435 %v17 = and i32 %v16, 136 %v18 = icmp eq i32 %v17, 037 br i1 %v18, label %b3, label %b238 39b2: ; preds = %b140 %v19 = add nsw i32 %v12, %v841 %v20 = shl i32 %v19, 242 %v21 = and i32 %v1, 143 %v22 = or i32 %v20, %v2144 store i32 %v22, ptr %v0, align 445 br label %b346 47b3: ; preds = %b2, %b1, %b048 %v23 = phi i32 [ %v2, %b1 ], [ %v2, %b0 ], [ %v22, %b2 ]49 %v24 = and i32 %v23, 150 %v25 = icmp eq i32 %v24, 051 br i1 %v25, label %b5, label %b452 53b4: ; preds = %b354 %v26 = load i32, ptr %v7, align 455 %v27 = and i32 %v26, -456 %v28 = add i32 %v27, %v2357 %v29 = and i32 %v28, -458 %v30 = and i32 %v26, 359 %v31 = or i32 %v29, %v3060 store i32 %v31, ptr %v7, align 461 br label %b562 63b5: ; preds = %b4, %b364 %v32 = phi i32 [ %v31, %b4 ], [ %v23, %b3 ]65 %v33 = phi ptr [ %v7, %b4 ], [ %v0, %b3 ]66 %v35 = lshr i32 %v32, 267 %v36 = add i32 %v35, -168 %v37 = getelementptr inbounds %s.0, ptr %v33, i32 %v36, i32 069 %v38 = load i32, ptr %v37, align 470 %v39 = shl nuw i32 %v35, 271 %v40 = and i32 %v38, 372 %v41 = or i32 %v40, %v3973 store i32 %v41, ptr %v37, align 474 %v42 = load i32, ptr %v33, align 475 %v43 = lshr i32 %v42, 276 %v44 = getelementptr inbounds %s.0, ptr %v33, i32 %v43, i32 077 %v45 = load i32, ptr %v44, align 478 %v46 = or i32 %v45, 179 store i32 %v46, ptr %v44, align 480 ret ptr %v3381}82 83; Function Attrs: nounwind84define i64 @f1(i32 %a0) #0 {85b0:86 %v0 = load ptr, ptr @g0, align 4, !tbaa !087 %v1 = getelementptr inbounds %s.0, ptr %v0, i32 788 tail call void @f2(ptr @g1) #089 br label %b190 91b1: ; preds = %b5, %b092 %v2 = phi ptr [ %v1, %b0 ], [ %v20, %b5 ]93 %v4 = load i32, ptr %v2, align 494 %v5 = and i32 %v4, 295 %v6 = icmp eq i32 %v5, 096 br i1 %v6, label %b3, label %b297 98b2: ; preds = %b199 tail call fastcc void @f8()100 %v7 = getelementptr inbounds %s.0, ptr %v2, i32 1, i32 0101 %v8 = tail call ptr @f0(ptr %v7)102 tail call fastcc void @f7()103 br label %b3104 105b3: ; preds = %b2, %b1106 %v9 = phi ptr [ %v8, %b2 ], [ %v2, %b1 ]107 %v11 = load i32, ptr %v9, align 4108 %v12 = lshr i32 %v11, 2109 %v13 = getelementptr inbounds %s.0, ptr %v9, i32 %v12, i32 0110 %v14 = load i32, ptr %v13, align 4111 %v15 = and i32 %v14, 1112 %v16 = icmp eq i32 %v15, 0113 br i1 %v16, label %b5, label %b4114 115b4: ; preds = %b3116 %v17 = mul i32 %v12, 4117 %v18 = add i32 %v17, -4118 %v19 = icmp ult i32 %v18, %a0119 br i1 %v19, label %b5, label %b7120 121b5: ; preds = %b4, %b3122 %v20 = getelementptr inbounds %s.0, ptr %v9, i32 %v12123 %v21 = icmp ult i32 %v14, 4124 br i1 %v21, label %b6, label %b1125 126b6: ; preds = %b5127 tail call fastcc void @f3()128 br label %b11129 130b7: ; preds = %b4131 %v22 = add i32 %a0, 4132 %v23 = lshr i32 %v22, 2133 %v24 = add i32 %v23, 8134 %v25 = lshr i32 %v24, 3135 %v26 = mul nsw i32 %v25, 8136 %v27 = sub nsw i32 %v12, %v26137 %v28 = icmp sgt i32 %v27, 7138 br i1 %v28, label %b8, label %b9139 140b8: ; preds = %b7141 %v29 = getelementptr inbounds %s.0, ptr %v9, i32 %v26, i32 0142 %v30 = shl i32 %v27, 2143 store i32 %v30, ptr %v29, align 4144 %v31 = load i32, ptr %v9, align 4145 %v32 = lshr i32 %v31, 2146 %v33 = add i32 %v32, -1147 %v34 = getelementptr inbounds %s.0, ptr %v9, i32 %v33, i32 0148 %v35 = load i32, ptr %v34, align 4149 %v36 = and i32 %v35, 3150 %v37 = or i32 %v36, %v30151 store i32 %v37, ptr %v34, align 4152 %v38 = load i32, ptr %v9, align 4153 %v39 = mul i32 %v25, 32154 %v40 = and i32 %v38, 3155 %v41 = or i32 %v40, %v39156 store i32 %v41, ptr %v9, align 4157 br label %b10158 159b9: ; preds = %b7160 %v42 = and i32 %v14, -2161 store i32 %v42, ptr %v13, align 4162 br label %b10163 164b10: ; preds = %b9, %b8165 tail call fastcc void @f3()166 %v43 = getelementptr inbounds %s.0, ptr %v9, i32 1167 %v44 = load i32, ptr %v9, align 4168 %v45 = lshr i32 %v44, 2169 %v46 = mul i32 %v45, 4170 %v47 = add i32 %v46, -4171 %v48 = ptrtoint ptr %v43 to i32172 %v49 = zext i32 %v47 to i64173 %v50 = shl nuw i64 %v49, 32174 %v51 = zext i32 %v48 to i64175 br label %b11176 177b11: ; preds = %b10, %b6178 %v52 = phi i64 [ 0, %b6 ], [ %v51, %b10 ]179 %v53 = phi i64 [ 0, %b6 ], [ %v50, %b10 ]180 %v54 = or i64 %v53, %v52181 ret i64 %v54182}183 184declare void @f2(ptr) #0185 186; Function Attrs: inlinehint nounwind187define internal fastcc void @f3() #1 {188b0:189 store i32 0, ptr @g1, align 4, !tbaa !4190 ret void191}192 193; Function Attrs: nounwind194define void @f4(ptr nocapture %a0) #0 {195b0:196 %v0 = getelementptr inbounds i32, ptr %a0, i32 -1197 tail call void @f2(ptr @g1) #0198 %v1 = load i32, ptr %v0, align 4199 %v2 = or i32 %v1, 2200 store i32 %v2, ptr %v0, align 4201 tail call fastcc void @f3()202 ret void203}204 205; Function Attrs: nounwind206define ptr @f5(ptr %a0) #0 {207b0:208 tail call void @f2(ptr @g1) #0209 %v0 = tail call ptr @f0(ptr %a0)210 tail call fastcc void @f3()211 ret ptr %v0212}213 214; Function Attrs: nounwind215define void @f6(ptr %a0, i32 %a1) #0 {216b0:217 %v0 = getelementptr inbounds %s.0, ptr %a0, i32 7, i32 0218 %v1 = mul i32 %a1, 4219 %v2 = add i32 %v1, -32220 store i32 %v2, ptr %v0, align 4221 %v3 = add i32 %a1, -1222 %v4 = getelementptr inbounds %s.0, ptr %a0, i32 %v3, i32 0223 store i32 1, ptr %v4, align 4224 store i32 0, ptr @g1, align 4, !tbaa !4225 store ptr %a0, ptr @g0, align 4226 ret void227}228 229; Function Attrs: inlinehint nounwind230define internal fastcc void @f7() #1 {231b0:232 tail call void asm sideeffect " nop", "~{memory}"() #0, !srcloc !6233 ret void234}235 236; Function Attrs: inlinehint nounwind237define internal fastcc void @f8() #1 {238b0:239 tail call void asm sideeffect " nop", "~{memory}"() #0, !srcloc !7240 ret void241}242 243attributes #0 = { nounwind }244attributes #1 = { inlinehint nounwind }245 246!0 = !{!1, !1, i64 0}247!1 = !{!"any pointer", !2}248!2 = !{!"omnipotent char", !3}249!3 = !{!"Simple C/C++ TBAA"}250!4 = !{!5, !5, i64 0}251!5 = !{!"int", !2}252!6 = !{i32 782713}253!7 = !{i32 782625}254