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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=hexagon < %s | FileCheck %s3 4%s.0 = type { i8 }5@g0 = internal global i8 0, align 16 7define void @f0() #0 {8; CHECK-LABEL: f0:9; CHECK: .cfi_startproc10; CHECK-NEXT: // %bb.0:11; CHECK-NEXT: {12; CHECK-NEXT: r29 = add(r29,#-8)13; CHECK-NEXT: r1 = #25514; CHECK-NEXT: }15; CHECK-NEXT: {16; CHECK-NEXT: r0 = add(r29,#7)17; CHECK-NEXT: }18; CHECK-NEXT: {19; CHECK-NEXT: r2 = and(r0,#3)20; CHECK-NEXT: r0 = and(r0,#-4)21; CHECK-NEXT: }22; CHECK-NEXT: {23; CHECK-NEXT: r2 = asl(r2,#3)24; CHECK-NEXT: }25; CHECK-NEXT: {26; CHECK-NEXT: r1 = asl(r1,r2)27; CHECK-NEXT: r2 = lsl(#2,r2)28; CHECK-NEXT: }29; CHECK-NEXT: {30; CHECK-NEXT: r3 = sub(#-1,r1)31; CHECK-NEXT: }32; CHECK-NEXT: .p2align 433; CHECK-NEXT: .LBB0_1: // %atomicrmw.start34; CHECK-NEXT: // =>This Inner Loop Header: Depth=135; CHECK-NEXT: {36; CHECK-NEXT: r4 = memw_locked(r0)37; CHECK-NEXT: }38; CHECK-NEXT: {39; CHECK-NEXT: r5 = and(r4,r3)40; CHECK-NEXT: r4 = add(r4,r2)41; CHECK-NEXT: }42; CHECK-NEXT: {43; CHECK-NEXT: r5 |= and(r4,r1)44; CHECK-NEXT: }45; CHECK-NEXT: {46; CHECK-NEXT: memw_locked(r0,p0) = r547; CHECK-NEXT: }48; CHECK-NEXT: {49; CHECK-NEXT: if (!p0) jump:nt .LBB0_150; CHECK-NEXT: }51; CHECK-NEXT: // %bb.2: // %atomicrmw.end52; CHECK-NEXT: {53; CHECK-NEXT: r29 = add(r29,#8)54; CHECK-NEXT: jumpr r3155; CHECK-NEXT: }56 %v0 = alloca %s.057 atomicrmw add ptr %v0, i8 2 monotonic58 ret void59}60 61define void @f1() #0 {62; CHECK-LABEL: f1:63; CHECK: .cfi_startproc64; CHECK-NEXT: // %bb.0: // %entry65; CHECK-NEXT: {66; CHECK-NEXT: r3 = ##g067; CHECK-NEXT: r1:0 = combine(#1,##255)68; CHECK-NEXT: }69; CHECK-NEXT: {70; CHECK-NEXT: r2 = and(r3,#3)71; CHECK-NEXT: r3 = and(r3,#-4)72; CHECK-NEXT: }73; CHECK-NEXT: {74; CHECK-NEXT: r2 = asl(r2,#3)75; CHECK-NEXT: }76; CHECK-NEXT: {77; CHECK-NEXT: r4 = asl(r0,r2)78; CHECK-NEXT: }79; CHECK-NEXT: {80; CHECK-NEXT: r4 = sub(#-1,r4)81; CHECK-NEXT: }82; CHECK-NEXT: .LBB1_1: // %cmpxchg.start83; CHECK-NEXT: // =>This Inner Loop Header: Depth=184; CHECK-NEXT: {85; CHECK-NEXT: r5 = memw_locked(r3)86; CHECK-NEXT: }87; CHECK-NEXT: {88; CHECK-NEXT: r6 = lsr(r5,r2)89; CHECK-NEXT: }90; CHECK-NEXT: {91; CHECK-NEXT: p0 = !bitsclr(r6,r0)92; CHECK-NEXT: if (p0.new) jumpr:nt r3193; CHECK-NEXT: }94; CHECK-NEXT: .LBB1_2: // %cmpxchg.trystore95; CHECK-NEXT: // in Loop: Header=BB1_1 Depth=196; CHECK-NEXT: {97; CHECK-NEXT: r5 = and(r5,r4)98; CHECK-NEXT: }99; CHECK-NEXT: {100; CHECK-NEXT: r5 |= asl(r1,r2)101; CHECK-NEXT: }102; CHECK-NEXT: {103; CHECK-NEXT: memw_locked(r3,p0) = r5104; CHECK-NEXT: }105; CHECK-NEXT: {106; CHECK-NEXT: if (!p0) jump:nt .LBB1_1107; CHECK-NEXT: }108; CHECK-NEXT: // %bb.3: // %cmpxchg.end109; CHECK-NEXT: {110; CHECK-NEXT: jumpr r31111; CHECK-NEXT: }112entry:113 %v0 = cmpxchg volatile ptr @g0, i8 0, i8 1 seq_cst seq_cst114 ret void115}116 117 118attributes #0 = { "target-cpu"="hexagonv66" }119 120