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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=hexagon -hexagon-hvx-widen=32 < %s | FileCheck %s3 4target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"5target triple = "hexagon"6 7; f16 -> s88; No widening9define void @f16s8_0(ptr %a0, ptr %a1) #0 {10; CHECK-LABEL: f16s8_0:11; CHECK: .cfi_startproc12; CHECK-NEXT: // %bb.0:13; CHECK-NEXT: {14; CHECK-NEXT: r3:2 = combine(##32768,#1)15; CHECK-NEXT: r4 = #1416; CHECK-NEXT: v0 = vmem(r0+#0)17; CHECK-NEXT: }18; CHECK-NEXT: {19; CHECK-NEXT: v2.h = vsplat(r3)20; CHECK-NEXT: r6 = #521; CHECK-NEXT: v3.h = vasl(v0.h,r2)22; CHECK-NEXT: v1 = vmem(r0+#1)23; CHECK-NEXT: }24; CHECK-NEXT: {25; CHECK-NEXT: v4.h = vsplat(r4)26; CHECK-NEXT: v8.h = vasl(v1.h,r2)27; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)28; CHECK-NEXT: }29; CHECK-NEXT: {30; CHECK-NEXT: r5:4 = combine(#11,##32767)31; CHECK-NEXT: v7 = vxor(v7,v7)32; CHECK-NEXT: v8.h = vsub(v8.h,v2.h)33; CHECK-NEXT: }34; CHECK-NEXT: {35; CHECK-NEXT: r3 = #1636; CHECK-NEXT: v5.h = vasl(v0.h,r6)37; CHECK-NEXT: q1 = vcmp.gt(v7.h,v1.h)38; CHECK-NEXT: }39; CHECK-NEXT: {40; CHECK-NEXT: v6.h = vsplat(r3)41; CHECK-NEXT: v28.h = vasr(v3.h,r5)42; CHECK-NEXT: v5 = vor(v5,v2)43; CHECK-NEXT: q0 = vcmp.gt(v7.h,v0.h)44; CHECK-NEXT: }45; CHECK-NEXT: {46; CHECK-NEXT: v9.h = vsplat(r4)47; CHECK-NEXT: v8.h = vasr(v8.h,r5)48; CHECK-NEXT: }49; CHECK-NEXT: {50; CHECK-NEXT: v27.h = vasl(v1.h,r6)51; CHECK-NEXT: v1.h = vsub(v4.h,v28.h)52; CHECK-NEXT: v4.h = vsub(v4.h,v8.h)53; CHECK-NEXT: v29 = vmux(q0,v2,v9)54; CHECK-NEXT: }55; CHECK-NEXT: {56; CHECK-NEXT: v1.h = vmin(v1.h,v6.h)57; CHECK-NEXT: v0 = vor(v27,v2)58; CHECK-NEXT: v4.h = vmin(v4.h,v6.h)59; CHECK-NEXT: v2 = vmux(q1,v2,v9)60; CHECK-NEXT: }61; CHECK-NEXT: {62; CHECK-NEXT: q2 = vcmp.gt(v1.h,v7.h)63; CHECK-NEXT: q3 = vcmp.gt(v4.h,v7.h)64; CHECK-NEXT: }65; CHECK-NEXT: {66; CHECK-NEXT: v5.h = vlsr(v5.h,v1.h)67; CHECK-NEXT: }68; CHECK-NEXT: {69; CHECK-NEXT: v0.h = vlsr(v0.h,v4.h)70; CHECK-NEXT: v30.h = vsub(v7.h,v5.h)71; CHECK-NEXT: }72; CHECK-NEXT: {73; CHECK-NEXT: v31.h = vsub(v7.h,v0.h)74; CHECK-NEXT: v5 = vmux(q0,v30,v5)75; CHECK-NEXT: }76; CHECK-NEXT: {77; CHECK-NEXT: v0 = vmux(q1,v31,v0)78; CHECK-NEXT: v1 = vmux(q2,v5,v29)79; CHECK-NEXT: }80; CHECK-NEXT: {81; CHECK-NEXT: v0 = vmux(q3,v0,v2)82; CHECK-NEXT: }83; CHECK-NEXT: {84; CHECK-NEXT: v0.b = vpack(v0.h,v1.h):sat85; CHECK-NEXT: jumpr r3186; CHECK-NEXT: vmem(r1+#0) = v0.new87; CHECK-NEXT: }88 %v0 = load <128 x half>, ptr %a0, align 12889 %v1 = fptosi <128 x half> %v0 to <128 x i8>90 store <128 x i8> %v1, ptr %a1, align 12891 ret void92}93 94; Widen result95define void @f16s8_1(ptr %a0, ptr %a1) #0 {96; CHECK-LABEL: f16s8_1:97; CHECK: .cfi_startproc98; CHECK-NEXT: // %bb.0:99; CHECK-NEXT: {100; CHECK-NEXT: r7 = ##32768101; CHECK-NEXT: r3:2 = combine(#5,#1)102; CHECK-NEXT: v0 = vmem(r0+#0)103; CHECK-NEXT: }104; CHECK-NEXT: {105; CHECK-NEXT: v2.h = vsplat(r7)106; CHECK-NEXT: v3.h = vasl(v0.h,r2)107; CHECK-NEXT: r6 = #14108; CHECK-NEXT: r5 = #11109; CHECK-NEXT: }110; CHECK-NEXT: {111; CHECK-NEXT: v4.h = vsplat(r6)112; CHECK-NEXT: r4 = #16113; CHECK-NEXT: v6.h = vasl(v0.h,r3)114; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)115; CHECK-NEXT: }116; CHECK-NEXT: {117; CHECK-NEXT: v5.h = vsplat(r4)118; CHECK-NEXT: r3 = #32767119; CHECK-NEXT: v29 = vor(v6,v2)120; CHECK-NEXT: v1 = vxor(v1,v1)121; CHECK-NEXT: }122; CHECK-NEXT: {123; CHECK-NEXT: v30.h = vsplat(r3)124; CHECK-NEXT: r2 = #64125; CHECK-NEXT: v3.h = vasr(v3.h,r5)126; CHECK-NEXT: q0 = vcmp.gt(v1.h,v0.h)127; CHECK-NEXT: }128; CHECK-NEXT: {129; CHECK-NEXT: q3 = vsetq(r2)130; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)131; CHECK-NEXT: v2 = vmux(q0,v2,v30)132; CHECK-NEXT: }133; CHECK-NEXT: {134; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)135; CHECK-NEXT: }136; CHECK-NEXT: {137; CHECK-NEXT: q2 = vcmp.gt(v3.h,v1.h)138; CHECK-NEXT: }139; CHECK-NEXT: {140; CHECK-NEXT: v4.h = vlsr(v29.h,v3.h)141; CHECK-NEXT: }142; CHECK-NEXT: {143; CHECK-NEXT: v31.h = vsub(v1.h,v4.h)144; CHECK-NEXT: }145; CHECK-NEXT: {146; CHECK-NEXT: v0 = vmux(q0,v31,v4)147; CHECK-NEXT: }148; CHECK-NEXT: {149; CHECK-NEXT: v0 = vmux(q2,v0,v2)150; CHECK-NEXT: }151; CHECK-NEXT: {152; CHECK-NEXT: v0.b = vpack(v0.h,v0.h):sat153; CHECK-NEXT: }154; CHECK-NEXT: {155; CHECK-NEXT: jumpr r31156; CHECK-NEXT: if (q3) vmem(r1+#0) = v0157; CHECK-NEXT: }158 %v0 = load <64 x half>, ptr %a0, align 128159 %v1 = fptosi <64 x half> %v0 to <64 x i8>160 store <64 x i8> %v1, ptr %a1, align 128161 ret void162}163 164; f16 -> s16165; No widening166define void @f16s16_0(ptr %a0, ptr %a1) #0 {167; CHECK-LABEL: f16s16_0:168; CHECK: .cfi_startproc169; CHECK-NEXT: // %bb.0:170; CHECK-NEXT: {171; CHECK-NEXT: r7 = ##32768172; CHECK-NEXT: r3:2 = combine(#5,#1)173; CHECK-NEXT: v0 = vmem(r0+#0)174; CHECK-NEXT: }175; CHECK-NEXT: {176; CHECK-NEXT: v2.h = vsplat(r7)177; CHECK-NEXT: v3.h = vasl(v0.h,r2)178; CHECK-NEXT: r6 = #14179; CHECK-NEXT: r5 = #11180; CHECK-NEXT: }181; CHECK-NEXT: {182; CHECK-NEXT: v4.h = vsplat(r6)183; CHECK-NEXT: r4 = #16184; CHECK-NEXT: v6.h = vasl(v0.h,r3)185; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)186; CHECK-NEXT: }187; CHECK-NEXT: {188; CHECK-NEXT: v5.h = vsplat(r4)189; CHECK-NEXT: r2 = #32767190; CHECK-NEXT: v29 = vor(v6,v2)191; CHECK-NEXT: v1 = vxor(v1,v1)192; CHECK-NEXT: }193; CHECK-NEXT: {194; CHECK-NEXT: v30.h = vsplat(r2)195; CHECK-NEXT: v3.h = vasr(v3.h,r5)196; CHECK-NEXT: q0 = vcmp.gt(v1.h,v0.h)197; CHECK-NEXT: }198; CHECK-NEXT: {199; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)200; CHECK-NEXT: v2 = vmux(q0,v2,v30)201; CHECK-NEXT: }202; CHECK-NEXT: {203; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)204; CHECK-NEXT: }205; CHECK-NEXT: {206; CHECK-NEXT: q3 = vcmp.gt(v3.h,v1.h)207; CHECK-NEXT: }208; CHECK-NEXT: {209; CHECK-NEXT: v4.h = vlsr(v29.h,v3.h)210; CHECK-NEXT: }211; CHECK-NEXT: {212; CHECK-NEXT: v31.h = vsub(v1.h,v4.h)213; CHECK-NEXT: }214; CHECK-NEXT: {215; CHECK-NEXT: v0 = vmux(q0,v31,v4)216; CHECK-NEXT: }217; CHECK-NEXT: {218; CHECK-NEXT: v0 = vmux(q3,v0,v2)219; CHECK-NEXT: jumpr r31220; CHECK-NEXT: vmem(r1+#0) = v0.new221; CHECK-NEXT: }222 %v0 = load <64 x half>, ptr %a0, align 128223 %v1 = fptosi <64 x half> %v0 to <64 x i16>224 store <64 x i16> %v1, ptr %a1, align 128225 ret void226}227 228; Widen input and result229define void @f16s16_1(ptr %a0, ptr %a1) #0 {230; CHECK-LABEL: f16s16_1:231; CHECK: .cfi_startproc232; CHECK-NEXT: // %bb.0:233; CHECK-NEXT: {234; CHECK-NEXT: r7 = ##32768235; CHECK-NEXT: r3:2 = combine(#5,#1)236; CHECK-NEXT: v0 = vmem(r0+#0)237; CHECK-NEXT: }238; CHECK-NEXT: {239; CHECK-NEXT: v2.h = vsplat(r7)240; CHECK-NEXT: v3.h = vasl(v0.h,r2)241; CHECK-NEXT: r6 = #14242; CHECK-NEXT: r5 = #11243; CHECK-NEXT: }244; CHECK-NEXT: {245; CHECK-NEXT: v4.h = vsplat(r6)246; CHECK-NEXT: r4 = #16247; CHECK-NEXT: v6.h = vasl(v0.h,r3)248; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)249; CHECK-NEXT: }250; CHECK-NEXT: {251; CHECK-NEXT: v5.h = vsplat(r4)252; CHECK-NEXT: r3 = #32767253; CHECK-NEXT: v29 = vor(v6,v2)254; CHECK-NEXT: v1 = vxor(v1,v1)255; CHECK-NEXT: }256; CHECK-NEXT: {257; CHECK-NEXT: v30.h = vsplat(r3)258; CHECK-NEXT: r2 = #64259; CHECK-NEXT: v3.h = vasr(v3.h,r5)260; CHECK-NEXT: q0 = vcmp.gt(v1.h,v0.h)261; CHECK-NEXT: }262; CHECK-NEXT: {263; CHECK-NEXT: q3 = vsetq(r2)264; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)265; CHECK-NEXT: v2 = vmux(q0,v2,v30)266; CHECK-NEXT: }267; CHECK-NEXT: {268; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)269; CHECK-NEXT: }270; CHECK-NEXT: {271; CHECK-NEXT: q1 = vcmp.gt(v3.h,v1.h)272; CHECK-NEXT: }273; CHECK-NEXT: {274; CHECK-NEXT: v4.h = vlsr(v29.h,v3.h)275; CHECK-NEXT: }276; CHECK-NEXT: {277; CHECK-NEXT: v31.h = vsub(v1.h,v4.h)278; CHECK-NEXT: }279; CHECK-NEXT: {280; CHECK-NEXT: v0 = vmux(q0,v31,v4)281; CHECK-NEXT: }282; CHECK-NEXT: {283; CHECK-NEXT: v0 = vmux(q1,v0,v2)284; CHECK-NEXT: }285; CHECK-NEXT: {286; CHECK-NEXT: jumpr r31287; CHECK-NEXT: if (q3) vmem(r1+#0) = v0288; CHECK-NEXT: }289 %v0 = load <32 x half>, ptr %a0, align 128290 %v1 = fptosi <32 x half> %v0 to <32 x i16>291 store <32 x i16> %v1, ptr %a1, align 128292 ret void293}294 295; f16 -> s32296; No widening297define void @f16s32_0(ptr %a0, ptr %a1) #0 {298; CHECK-LABEL: f16s32_0:299; CHECK: .cfi_startproc300; CHECK-NEXT: // %bb.0:301; CHECK-NEXT: {302; CHECK-NEXT: r2 = #15360303; CHECK-NEXT: r7 = #-4304; CHECK-NEXT: r6 = #1305; CHECK-NEXT: v1 = vmem(r0+#0)306; CHECK-NEXT: }307; CHECK-NEXT: {308; CHECK-NEXT: v0.h = vsplat(r2)309; CHECK-NEXT: r4 = #32310; CHECK-NEXT: r5 = #8311; CHECK-NEXT: }312; CHECK-NEXT: {313; CHECK-NEXT: v7 = vsplat(r4)314; CHECK-NEXT: r2 = ##2147483647315; CHECK-NEXT: v24 = vxor(v24,v24)316; CHECK-NEXT: }317; CHECK-NEXT: {318; CHECK-NEXT: v25 = vsplat(r2)319; CHECK-NEXT: }320; CHECK-NEXT: {321; CHECK-NEXT: v1:0.qf32 = vmpy(v1.hf,v0.hf)322; CHECK-NEXT: }323; CHECK-NEXT: {324; CHECK-NEXT: v0.sf = v0.qf32325; CHECK-NEXT: }326; CHECK-NEXT: {327; CHECK-NEXT: v1.sf = v1.qf32328; CHECK-NEXT: }329; CHECK-NEXT: {330; CHECK-NEXT: r7 = ##-2147483648331; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7)332; CHECK-NEXT: }333; CHECK-NEXT: {334; CHECK-NEXT: v2 = vsplat(r7)335; CHECK-NEXT: q0 = vcmp.gt(v24.w,v1.w)336; CHECK-NEXT: q1 = vcmp.gt(v24.w,v0.w)337; CHECK-NEXT: }338; CHECK-NEXT: {339; CHECK-NEXT: v3.w = vasl(v0.w,r6)340; CHECK-NEXT: v28 = vmux(q0,v2,v25)341; CHECK-NEXT: }342; CHECK-NEXT: {343; CHECK-NEXT: r7:6 = combine(#30,#24)344; CHECK-NEXT: v4.w = vasl(v1.w,r6)345; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)346; CHECK-NEXT: }347; CHECK-NEXT: {348; CHECK-NEXT: v6 = vsplat(r7)349; CHECK-NEXT: v5.w = vasl(v0.w,r5)350; CHECK-NEXT: v4.w = vsub(v4.w,v2.w)351; CHECK-NEXT: }352; CHECK-NEXT: {353; CHECK-NEXT: v3.w = vasr(v3.w,r6)354; CHECK-NEXT: v5 = vor(v5,v2)355; CHECK-NEXT: }356; CHECK-NEXT: {357; CHECK-NEXT: v4.w = vasr(v4.w,r6)358; CHECK-NEXT: v3.w = vsub(v6.w,v3.w)359; CHECK-NEXT: }360; CHECK-NEXT: {361; CHECK-NEXT: v8.w = vasl(v1.w,r5)362; CHECK-NEXT: v4.w = vsub(v6.w,v4.w)363; CHECK-NEXT: v3.w = vmin(v3.w,v7.w)364; CHECK-NEXT: }365; CHECK-NEXT: {366; CHECK-NEXT: v8 = vor(v8,v2)367; CHECK-NEXT: v4.w = vmin(v4.w,v7.w)368; CHECK-NEXT: v2 = vmux(q1,v2,v25)369; CHECK-NEXT: q3 = vcmp.gt(v3.w,v24.w)370; CHECK-NEXT: }371; CHECK-NEXT: {372; CHECK-NEXT: v26.w = vlsr(v5.w,v3.w)373; CHECK-NEXT: q2 = vcmp.gt(v4.w,v24.w)374; CHECK-NEXT: }375; CHECK-NEXT: {376; CHECK-NEXT: v27.w = vlsr(v8.w,v4.w)377; CHECK-NEXT: v29.w = vsub(v24.w,v26.w)378; CHECK-NEXT: }379; CHECK-NEXT: {380; CHECK-NEXT: v9.w = vsub(v24.w,v27.w)381; CHECK-NEXT: v1 = vmux(q1,v29,v26)382; CHECK-NEXT: }383; CHECK-NEXT: {384; CHECK-NEXT: v30 = vmux(q0,v9,v27)385; CHECK-NEXT: v31 = vmux(q3,v1,v2)386; CHECK-NEXT: vmem(r1+#0) = v31.new387; CHECK-NEXT: }388; CHECK-NEXT: {389; CHECK-NEXT: v0 = vmux(q2,v30,v28)390; CHECK-NEXT: jumpr r31391; CHECK-NEXT: vmem(r1+#1) = v0.new392; CHECK-NEXT: }393 %v0 = load <64 x half>, ptr %a0, align 128394 %v1 = fptosi <64 x half> %v0 to <64 x i32>395 store <64 x i32> %v1, ptr %a1, align 128396 ret void397}398 399; Widen input400define void @f16s32_1(ptr %a0, ptr %a1) #0 {401; CHECK-LABEL: f16s32_1:402; CHECK: .cfi_startproc403; CHECK-NEXT: // %bb.0:404; CHECK-NEXT: {405; CHECK-NEXT: r4 = #15360406; CHECK-NEXT: r7 = #-4407; CHECK-NEXT: v0 = vmem(r0+#0)408; CHECK-NEXT: }409; CHECK-NEXT: {410; CHECK-NEXT: v1.h = vsplat(r4)411; CHECK-NEXT: r2 = ##-2147483648412; CHECK-NEXT: r3 = #1413; CHECK-NEXT: }414; CHECK-NEXT: {415; CHECK-NEXT: v3 = vsplat(r2)416; CHECK-NEXT: r5:4 = combine(#8,#30)417; CHECK-NEXT: r6 = #24418; CHECK-NEXT: }419; CHECK-NEXT: {420; CHECK-NEXT: v4 = vsplat(r4)421; CHECK-NEXT: r2 = ##2147483647422; CHECK-NEXT: r4 = #32423; CHECK-NEXT: }424; CHECK-NEXT: {425; CHECK-NEXT: v1:0.qf32 = vmpy(v0.hf,v1.hf)426; CHECK-NEXT: v2 = vxor(v2,v2)427; CHECK-NEXT: }428; CHECK-NEXT: {429; CHECK-NEXT: v5 = vsplat(r4)430; CHECK-NEXT: v30 = vsplat(r2)431; CHECK-NEXT: }432; CHECK-NEXT: {433; CHECK-NEXT: v0.sf = v0.qf32434; CHECK-NEXT: }435; CHECK-NEXT: {436; CHECK-NEXT: v1.sf = v1.qf32437; CHECK-NEXT: }438; CHECK-NEXT: {439; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7)440; CHECK-NEXT: }441; CHECK-NEXT: {442; CHECK-NEXT: q0 = vcmp.gt(v2.w,v0.w)443; CHECK-NEXT: }444; CHECK-NEXT: {445; CHECK-NEXT: v1.w = vasl(v0.w,r3)446; CHECK-NEXT: }447; CHECK-NEXT: {448; CHECK-NEXT: v6.w = vasl(v0.w,r5)449; CHECK-NEXT: v1.w = vsub(v1.w,v3.w)450; CHECK-NEXT: }451; CHECK-NEXT: {452; CHECK-NEXT: v29 = vor(v6,v3)453; CHECK-NEXT: v3 = vmux(q0,v3,v30)454; CHECK-NEXT: }455; CHECK-NEXT: {456; CHECK-NEXT: v1.w = vasr(v1.w,r6)457; CHECK-NEXT: }458; CHECK-NEXT: {459; CHECK-NEXT: v1.w = vsub(v4.w,v1.w)460; CHECK-NEXT: }461; CHECK-NEXT: {462; CHECK-NEXT: v1.w = vmin(v1.w,v5.w)463; CHECK-NEXT: }464; CHECK-NEXT: {465; CHECK-NEXT: q3 = vcmp.gt(v1.w,v2.w)466; CHECK-NEXT: }467; CHECK-NEXT: {468; CHECK-NEXT: v4.w = vlsr(v29.w,v1.w)469; CHECK-NEXT: }470; CHECK-NEXT: {471; CHECK-NEXT: v31.w = vsub(v2.w,v4.w)472; CHECK-NEXT: }473; CHECK-NEXT: {474; CHECK-NEXT: v0 = vmux(q0,v31,v4)475; CHECK-NEXT: }476; CHECK-NEXT: {477; CHECK-NEXT: v0 = vmux(q3,v0,v3)478; CHECK-NEXT: jumpr r31479; CHECK-NEXT: vmem(r1+#0) = v0.new480; CHECK-NEXT: }481 %v0 = load <32 x half>, ptr %a0, align 128482 %v1 = fptosi <32 x half> %v0 to <32 x i32>483 store <32 x i32> %v1, ptr %a1, align 128484 ret void485}486 487; f32 -> s8488; No widening489define void @f32s8_0(ptr %a0, ptr %a1) #0 {490; CHECK-LABEL: f32s8_0:491; CHECK: .cfi_startproc492; CHECK-NEXT: // %bb.0:493; CHECK-NEXT: {494; CHECK-NEXT: r3:2 = combine(#1,#8)495; CHECK-NEXT: r4 = ##-2147483648496; CHECK-NEXT: v5 = vmem(r0+#1)497; CHECK-NEXT: }498; CHECK-NEXT: {499; CHECK-NEXT: v0 = vsplat(r4)500; CHECK-NEXT: r7 = #30501; CHECK-NEXT: r6 = #24502; CHECK-NEXT: v4 = vmem(r0+#0)503; CHECK-NEXT: }504; CHECK-NEXT: {505; CHECK-NEXT: v10 = vsplat(r7)506; CHECK-NEXT: r5 = #32507; CHECK-NEXT: v9.w = vasl(v5.w,r3)508; CHECK-NEXT: v1 = vmem(r0+#3)509; CHECK-NEXT: }510; CHECK-NEXT: {511; CHECK-NEXT: v8.w = vasl(v4.w,r3)512; CHECK-NEXT: v14 = vxor(v14,v14)513; CHECK-NEXT: v9.w = vsub(v9.w,v0.w)514; CHECK-NEXT: v2 = vmem(r0+#2)515; CHECK-NEXT: }516; CHECK-NEXT: {517; CHECK-NEXT: v13 = vsplat(r5)518; CHECK-NEXT: v11.w = vasl(v2.w,r3)519; CHECK-NEXT: v8.w = vsub(v8.w,v0.w)520; CHECK-NEXT: q1 = vcmp.gt(v14.w,v5.w)521; CHECK-NEXT: }522; CHECK-NEXT: {523; CHECK-NEXT: v12.w = vasl(v1.w,r3)524; CHECK-NEXT: q0 = vcmp.gt(v14.w,v4.w)525; CHECK-NEXT: v11.w = vsub(v11.w,v0.w)526; CHECK-NEXT: }527; CHECK-NEXT: {528; CHECK-NEXT: r3 = ##2147483647529; CHECK-NEXT: r7 = #64530; CHECK-NEXT: v9.w = vasr(v9.w,r6)531; CHECK-NEXT: }532; CHECK-NEXT: {533; CHECK-NEXT: v18 = vsplat(r3)534; CHECK-NEXT: v7.w = vasl(v5.w,r2)535; CHECK-NEXT: v19.w = vsub(v12.w,v0.w)536; CHECK-NEXT: v9.w = vsub(v10.w,v9.w)537; CHECK-NEXT: }538; CHECK-NEXT: {539; CHECK-NEXT: v8.w = vasr(v8.w,r6)540; CHECK-NEXT: v25 = vmux(q1,v0,v18)541; CHECK-NEXT: v23 = vmux(q0,v0,v18)542; CHECK-NEXT: v9.w = vmin(v9.w,v13.w)543; CHECK-NEXT: }544; CHECK-NEXT: {545; CHECK-NEXT: v6.w = vasl(v4.w,r2)546; CHECK-NEXT: v7 = vor(v7,v0)547; CHECK-NEXT: v8.w = vsub(v10.w,v8.w)548; CHECK-NEXT: q3 = vcmp.gt(v9.w,v14.w)549; CHECK-NEXT: }550; CHECK-NEXT: {551; CHECK-NEXT: v11.w = vasr(v11.w,r6)552; CHECK-NEXT: v8.w = vmin(v8.w,v13.w)553; CHECK-NEXT: v6 = vor(v6,v0)554; CHECK-NEXT: }555; CHECK-NEXT: {556; CHECK-NEXT: v5.w = vasr(v19.w,r6)557; CHECK-NEXT: v11.w = vsub(v10.w,v11.w)558; CHECK-NEXT: q2 = vcmp.gt(v8.w,v14.w)559; CHECK-NEXT: }560; CHECK-NEXT: {561; CHECK-NEXT: v3.w = vasl(v1.w,r2)562; CHECK-NEXT: v5.w = vsub(v10.w,v5.w)563; CHECK-NEXT: v21.w = vmin(v11.w,v13.w)564; CHECK-NEXT: }565; CHECK-NEXT: {566; CHECK-NEXT: v20.w = vasl(v2.w,r2)567; CHECK-NEXT: v3 = vor(v3,v0)568; CHECK-NEXT: v5.w = vmin(v5.w,v13.w)569; CHECK-NEXT: }570; CHECK-NEXT: {571; CHECK-NEXT: v7.w = vlsr(v7.w,v9.w)572; CHECK-NEXT: v12 = vor(v20,v0)573; CHECK-NEXT: }574; CHECK-NEXT: {575; CHECK-NEXT: v6.w = vlsr(v6.w,v8.w)576; CHECK-NEXT: v24.w = vsub(v14.w,v7.w)577; CHECK-NEXT: }578; CHECK-NEXT: {579; CHECK-NEXT: v26.w = vlsr(v12.w,v21.w)580; CHECK-NEXT: v22.w = vsub(v14.w,v6.w)581; CHECK-NEXT: v7 = vmux(q1,v24,v7)582; CHECK-NEXT: }583; CHECK-NEXT: {584; CHECK-NEXT: v3.w = vlsr(v3.w,v5.w)585; CHECK-NEXT: v6 = vmux(q0,v22,v6)586; CHECK-NEXT: q0 = vcmp.gt(v14.w,v2.w)587; CHECK-NEXT: v27.w = vsub(v14.w,v26.w)588; CHECK-NEXT: }589; CHECK-NEXT: {590; CHECK-NEXT: v2 = vmux(q3,v7,v25)591; CHECK-NEXT: v29.w = vsub(v14.w,v3.w)592; CHECK-NEXT: q3 = vcmp.gt(v14.w,v1.w)593; CHECK-NEXT: v6 = vmux(q2,v6,v23)594; CHECK-NEXT: }595; CHECK-NEXT: {596; CHECK-NEXT: v30 = vmux(q0,v0,v18)597; CHECK-NEXT: v28 = vmux(q0,v27,v26)598; CHECK-NEXT: q2 = vcmp.gt(v21.w,v14.w)599; CHECK-NEXT: v3 = vmux(q3,v29,v3)600; CHECK-NEXT: }601; CHECK-NEXT: {602; CHECK-NEXT: v2.h = vpack(v2.w,v6.w):sat603; CHECK-NEXT: v0 = vmux(q3,v0,v18)604; CHECK-NEXT: q3 = vcmp.gt(v5.w,v14.w)605; CHECK-NEXT: v1 = vmux(q2,v28,v30)606; CHECK-NEXT: }607; CHECK-NEXT: {608; CHECK-NEXT: v0 = vmux(q3,v3,v0)609; CHECK-NEXT: }610; CHECK-NEXT: {611; CHECK-NEXT: v3.h = vpack(v1.w,v0.w):sat612; CHECK-NEXT: }613; CHECK-NEXT: {614; CHECK-NEXT: v0.h = vpack(v0.w,v1.w):sat615; CHECK-NEXT: }616; CHECK-NEXT: {617; CHECK-NEXT: v31.b = vpack(v3.h,v2.h):sat618; CHECK-NEXT: }619; CHECK-NEXT: {620; CHECK-NEXT: v0.b = vpack(v3.h,v0.h):sat621; CHECK-NEXT: }622; CHECK-NEXT: {623; CHECK-NEXT: v1:0 = vshuff(v0,v31,r7)624; CHECK-NEXT: jumpr r31625; CHECK-NEXT: vmem(r1+#0) = v0.new626; CHECK-NEXT: }627 %v0 = load <128 x float>, ptr %a0, align 128628 %v1 = fptosi <128 x float> %v0 to <128 x i8>629 store <128 x i8> %v1, ptr %a1, align 128630 ret void631}632 633; Widen result #1634define void @f32s8_1(ptr %a0, ptr %a1) #0 {635; CHECK-LABEL: f32s8_1:636; CHECK: .cfi_startproc637; CHECK-NEXT: // %bb.0:638; CHECK-NEXT: {639; CHECK-NEXT: r3:2 = combine(##-2147483648,#8)640; CHECK-NEXT: r4 = #1641; CHECK-NEXT: v1 = vmem(r0+#1)642; CHECK-NEXT: }643; CHECK-NEXT: {644; CHECK-NEXT: v3 = vsplat(r3)645; CHECK-NEXT: r5 = #30646; CHECK-NEXT: v4.w = vasl(v0.w,r4)647; CHECK-NEXT: v0.cur = vmem(r0+#0)648; CHECK-NEXT: }649; CHECK-NEXT: {650; CHECK-NEXT: v5.w = vasl(v1.w,r4)651; CHECK-NEXT: v4.w = vsub(v4.w,v3.w)652; CHECK-NEXT: r6 = #24653; CHECK-NEXT: r4 = #32654; CHECK-NEXT: }655; CHECK-NEXT: {656; CHECK-NEXT: v7 = vsplat(r5)657; CHECK-NEXT: v8 = vsplat(r4)658; CHECK-NEXT: v2.w = vasl(v1.w,r2)659; CHECK-NEXT: v5.w = vsub(v5.w,v3.w)660; CHECK-NEXT: }661; CHECK-NEXT: {662; CHECK-NEXT: v4.w = vasr(v4.w,r6)663; CHECK-NEXT: v27 = vxor(v27,v27)664; CHECK-NEXT: v2 = vor(v2,v3)665; CHECK-NEXT: }666; CHECK-NEXT: {667; CHECK-NEXT: r3 = ##2147483647668; CHECK-NEXT: v5.w = vasr(v5.w,r6)669; CHECK-NEXT: q0 = vcmp.gt(v27.w,v0.w)670; CHECK-NEXT: }671; CHECK-NEXT: {672; CHECK-NEXT: v28 = vsplat(r3)673; CHECK-NEXT: v6.w = vasl(v0.w,r2)674; CHECK-NEXT: v4.w = vsub(v7.w,v4.w)675; CHECK-NEXT: q2 = vcmp.gt(v27.w,v1.w)676; CHECK-NEXT: }677; CHECK-NEXT: {678; CHECK-NEXT: v5.w = vsub(v7.w,v5.w)679; CHECK-NEXT: v4.w = vmin(v4.w,v8.w)680; CHECK-NEXT: v31 = vmux(q0,v3,v28)681; CHECK-NEXT: v6 = vor(v6,v3)682; CHECK-NEXT: }683; CHECK-NEXT: {684; CHECK-NEXT: v5.w = vmin(v5.w,v8.w)685; CHECK-NEXT: q1 = vcmp.gt(v4.w,v27.w)686; CHECK-NEXT: v0 = vmux(q2,v3,v28)687; CHECK-NEXT: }688; CHECK-NEXT: {689; CHECK-NEXT: r2 = #64690; CHECK-NEXT: v6.w = vlsr(v6.w,v4.w)691; CHECK-NEXT: q3 = vcmp.gt(v5.w,v27.w)692; CHECK-NEXT: }693; CHECK-NEXT: {694; CHECK-NEXT: v2.w = vlsr(v2.w,v5.w)695; CHECK-NEXT: v29.w = vsub(v27.w,v6.w)696; CHECK-NEXT: }697; CHECK-NEXT: {698; CHECK-NEXT: v30.w = vsub(v27.w,v2.w)699; CHECK-NEXT: v1 = vmux(q0,v29,v6)700; CHECK-NEXT: }701; CHECK-NEXT: {702; CHECK-NEXT: v2 = vmux(q2,v30,v2)703; CHECK-NEXT: v1 = vmux(q1,v1,v31)704; CHECK-NEXT: }705; CHECK-NEXT: {706; CHECK-NEXT: q3 = vsetq(r2)707; CHECK-NEXT: v0 = vmux(q3,v2,v0)708; CHECK-NEXT: }709; CHECK-NEXT: {710; CHECK-NEXT: v2.h = vpack(v1.w,v0.w):sat711; CHECK-NEXT: }712; CHECK-NEXT: {713; CHECK-NEXT: v0.h = vpack(v0.w,v1.w):sat714; CHECK-NEXT: }715; CHECK-NEXT: {716; CHECK-NEXT: v0.b = vpack(v2.h,v0.h):sat717; CHECK-NEXT: }718; CHECK-NEXT: {719; CHECK-NEXT: jumpr r31720; CHECK-NEXT: if (q3) vmem(r1+#0) = v0721; CHECK-NEXT: }722 %v0 = load <64 x float>, ptr %a0, align 128723 %v1 = fptosi <64 x float> %v0 to <64 x i8>724 store <64 x i8> %v1, ptr %a1, align 128725 ret void726}727 728; Widen result #2729define void @f32s8_2(ptr %a0, ptr %a1) #0 {730; CHECK-LABEL: f32s8_2:731; CHECK: .cfi_startproc732; CHECK-NEXT: // %bb.0:733; CHECK-NEXT: {734; CHECK-NEXT: r7 = ##-2147483648735; CHECK-NEXT: r3:2 = combine(#30,#1)736; CHECK-NEXT: v0 = vmem(r0+#0)737; CHECK-NEXT: }738; CHECK-NEXT: {739; CHECK-NEXT: v2 = vsplat(r7)740; CHECK-NEXT: r5:4 = combine(#8,#24)741; CHECK-NEXT: r6 = #32742; CHECK-NEXT: v3.w = vasl(v0.w,r2)743; CHECK-NEXT: }744; CHECK-NEXT: {745; CHECK-NEXT: v4 = vsplat(r3)746; CHECK-NEXT: v5 = vsplat(r6)747; CHECK-NEXT: v6.w = vasl(v0.w,r5)748; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)749; CHECK-NEXT: }750; CHECK-NEXT: {751; CHECK-NEXT: v1 = vxor(v1,v1)752; CHECK-NEXT: v29 = vor(v6,v2)753; CHECK-NEXT: }754; CHECK-NEXT: {755; CHECK-NEXT: q3 = vsetq(r6)756; CHECK-NEXT: v3.w = vasr(v3.w,r4)757; CHECK-NEXT: q0 = vcmp.gt(v1.w,v0.w)758; CHECK-NEXT: }759; CHECK-NEXT: {760; CHECK-NEXT: r4 = ##2147483647761; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)762; CHECK-NEXT: }763; CHECK-NEXT: {764; CHECK-NEXT: v30 = vsplat(r4)765; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)766; CHECK-NEXT: }767; CHECK-NEXT: {768; CHECK-NEXT: v2 = vmux(q0,v2,v30)769; CHECK-NEXT: q2 = vcmp.gt(v3.w,v1.w)770; CHECK-NEXT: }771; CHECK-NEXT: {772; CHECK-NEXT: v4.w = vlsr(v29.w,v3.w)773; CHECK-NEXT: }774; CHECK-NEXT: {775; CHECK-NEXT: v31.w = vsub(v1.w,v4.w)776; CHECK-NEXT: }777; CHECK-NEXT: {778; CHECK-NEXT: v0 = vmux(q0,v31,v4)779; CHECK-NEXT: }780; CHECK-NEXT: {781; CHECK-NEXT: v0 = vmux(q2,v0,v2)782; CHECK-NEXT: }783; CHECK-NEXT: {784; CHECK-NEXT: v1.h = vpack(v1.w,v0.w):sat785; CHECK-NEXT: }786; CHECK-NEXT: {787; CHECK-NEXT: v0.h = vpack(v0.w,v0.w):sat788; CHECK-NEXT: }789; CHECK-NEXT: {790; CHECK-NEXT: v0.b = vpack(v1.h,v0.h):sat791; CHECK-NEXT: }792; CHECK-NEXT: {793; CHECK-NEXT: jumpr r31794; CHECK-NEXT: if (q3) vmem(r1+#0) = v0795; CHECK-NEXT: }796 %v0 = load <32 x float>, ptr %a0, align 128797 %v1 = fptosi <32 x float> %v0 to <32 x i8>798 store <32 x i8> %v1, ptr %a1, align 128799 ret void800}801 802; f32 -> s16803; No widening804define void @f32s16_0(ptr %a0, ptr %a1) #0 {805; CHECK-LABEL: f32s16_0:806; CHECK: .cfi_startproc807; CHECK-NEXT: // %bb.0:808; CHECK-NEXT: {809; CHECK-NEXT: r3:2 = combine(##-2147483648,#1)810; CHECK-NEXT: r4 = #30811; CHECK-NEXT: v0 = vmem(r0+#0)812; CHECK-NEXT: }813; CHECK-NEXT: {814; CHECK-NEXT: v2 = vsplat(r3)815; CHECK-NEXT: r6 = #8816; CHECK-NEXT: v3.w = vasl(v0.w,r2)817; CHECK-NEXT: v1 = vmem(r0+#1)818; CHECK-NEXT: }819; CHECK-NEXT: {820; CHECK-NEXT: v4 = vsplat(r4)821; CHECK-NEXT: v8.w = vasl(v1.w,r2)822; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)823; CHECK-NEXT: }824; CHECK-NEXT: {825; CHECK-NEXT: r5:4 = combine(#24,##2147483647)826; CHECK-NEXT: v7 = vxor(v7,v7)827; CHECK-NEXT: v8.w = vsub(v8.w,v2.w)828; CHECK-NEXT: }829; CHECK-NEXT: {830; CHECK-NEXT: r3 = #32831; CHECK-NEXT: v5.w = vasl(v0.w,r6)832; CHECK-NEXT: q1 = vcmp.gt(v7.w,v1.w)833; CHECK-NEXT: }834; CHECK-NEXT: {835; CHECK-NEXT: v6 = vsplat(r3)836; CHECK-NEXT: v28.w = vasr(v3.w,r5)837; CHECK-NEXT: v5 = vor(v5,v2)838; CHECK-NEXT: q0 = vcmp.gt(v7.w,v0.w)839; CHECK-NEXT: }840; CHECK-NEXT: {841; CHECK-NEXT: v9 = vsplat(r4)842; CHECK-NEXT: v8.w = vasr(v8.w,r5)843; CHECK-NEXT: }844; CHECK-NEXT: {845; CHECK-NEXT: v27.w = vasl(v1.w,r6)846; CHECK-NEXT: v1.w = vsub(v4.w,v28.w)847; CHECK-NEXT: v4.w = vsub(v4.w,v8.w)848; CHECK-NEXT: v29 = vmux(q0,v2,v9)849; CHECK-NEXT: }850; CHECK-NEXT: {851; CHECK-NEXT: v1.w = vmin(v1.w,v6.w)852; CHECK-NEXT: v0 = vor(v27,v2)853; CHECK-NEXT: v4.w = vmin(v4.w,v6.w)854; CHECK-NEXT: v2 = vmux(q1,v2,v9)855; CHECK-NEXT: }856; CHECK-NEXT: {857; CHECK-NEXT: q2 = vcmp.gt(v1.w,v7.w)858; CHECK-NEXT: q3 = vcmp.gt(v4.w,v7.w)859; CHECK-NEXT: }860; CHECK-NEXT: {861; CHECK-NEXT: v5.w = vlsr(v5.w,v1.w)862; CHECK-NEXT: }863; CHECK-NEXT: {864; CHECK-NEXT: v0.w = vlsr(v0.w,v4.w)865; CHECK-NEXT: v30.w = vsub(v7.w,v5.w)866; CHECK-NEXT: }867; CHECK-NEXT: {868; CHECK-NEXT: v31.w = vsub(v7.w,v0.w)869; CHECK-NEXT: v5 = vmux(q0,v30,v5)870; CHECK-NEXT: }871; CHECK-NEXT: {872; CHECK-NEXT: v0 = vmux(q1,v31,v0)873; CHECK-NEXT: v1 = vmux(q2,v5,v29)874; CHECK-NEXT: }875; CHECK-NEXT: {876; CHECK-NEXT: v0 = vmux(q3,v0,v2)877; CHECK-NEXT: }878; CHECK-NEXT: {879; CHECK-NEXT: v0.h = vpack(v0.w,v1.w):sat880; CHECK-NEXT: jumpr r31881; CHECK-NEXT: vmem(r1+#0) = v0.new882; CHECK-NEXT: }883 %v0 = load <64 x float>, ptr %a0, align 128884 %v1 = fptosi <64 x float> %v0 to <64 x i16>885 store <64 x i16> %v1, ptr %a1, align 128886 ret void887}888 889; Widen result890define void @f32s16_1(ptr %a0, ptr %a1) #0 {891; CHECK-LABEL: f32s16_1:892; CHECK: .cfi_startproc893; CHECK-NEXT: // %bb.0:894; CHECK-NEXT: {895; CHECK-NEXT: r7 = ##-2147483648896; CHECK-NEXT: r3:2 = combine(#8,#1)897; CHECK-NEXT: v0 = vmem(r0+#0)898; CHECK-NEXT: }899; CHECK-NEXT: {900; CHECK-NEXT: v2 = vsplat(r7)901; CHECK-NEXT: v3.w = vasl(v0.w,r2)902; CHECK-NEXT: r6 = #30903; CHECK-NEXT: r5 = #24904; CHECK-NEXT: }905; CHECK-NEXT: {906; CHECK-NEXT: v4 = vsplat(r6)907; CHECK-NEXT: r4 = #32908; CHECK-NEXT: v6.w = vasl(v0.w,r3)909; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)910; CHECK-NEXT: }911; CHECK-NEXT: {912; CHECK-NEXT: v5 = vsplat(r4)913; CHECK-NEXT: v29 = vor(v6,v2)914; CHECK-NEXT: v1 = vxor(v1,v1)915; CHECK-NEXT: }916; CHECK-NEXT: {917; CHECK-NEXT: r3 = ##2147483647918; CHECK-NEXT: r2 = #64919; CHECK-NEXT: v3.w = vasr(v3.w,r5)920; CHECK-NEXT: }921; CHECK-NEXT: {922; CHECK-NEXT: v30 = vsplat(r3)923; CHECK-NEXT: q3 = vsetq(r2)924; CHECK-NEXT: q0 = vcmp.gt(v1.w,v0.w)925; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)926; CHECK-NEXT: }927; CHECK-NEXT: {928; CHECK-NEXT: v2 = vmux(q0,v2,v30)929; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)930; CHECK-NEXT: }931; CHECK-NEXT: {932; CHECK-NEXT: q2 = vcmp.gt(v3.w,v1.w)933; CHECK-NEXT: }934; CHECK-NEXT: {935; CHECK-NEXT: v4.w = vlsr(v29.w,v3.w)936; CHECK-NEXT: }937; CHECK-NEXT: {938; CHECK-NEXT: v31.w = vsub(v1.w,v4.w)939; CHECK-NEXT: }940; CHECK-NEXT: {941; CHECK-NEXT: v0 = vmux(q0,v31,v4)942; CHECK-NEXT: }943; CHECK-NEXT: {944; CHECK-NEXT: v0 = vmux(q2,v0,v2)945; CHECK-NEXT: }946; CHECK-NEXT: {947; CHECK-NEXT: v0.h = vpack(v0.w,v0.w):sat948; CHECK-NEXT: }949; CHECK-NEXT: {950; CHECK-NEXT: jumpr r31951; CHECK-NEXT: if (q3) vmem(r1+#0) = v0952; CHECK-NEXT: }953 %v0 = load <32 x float>, ptr %a0, align 128954 %v1 = fptosi <32 x float> %v0 to <32 x i16>955 store <32 x i16> %v1, ptr %a1, align 128956 ret void957}958 959; f32 -> s32960; No widening961define void @f32s32_0(ptr %a0, ptr %a1) #0 {962; CHECK-LABEL: f32s32_0:963; CHECK: .cfi_startproc964; CHECK-NEXT: // %bb.0:965; CHECK-NEXT: {966; CHECK-NEXT: r7 = ##-2147483648967; CHECK-NEXT: r3:2 = combine(#8,#1)968; CHECK-NEXT: v0 = vmem(r0+#0)969; CHECK-NEXT: }970; CHECK-NEXT: {971; CHECK-NEXT: v2 = vsplat(r7)972; CHECK-NEXT: v3.w = vasl(v0.w,r2)973; CHECK-NEXT: r6 = #30974; CHECK-NEXT: r5 = #24975; CHECK-NEXT: }976; CHECK-NEXT: {977; CHECK-NEXT: v4 = vsplat(r6)978; CHECK-NEXT: r4 = #32979; CHECK-NEXT: v6.w = vasl(v0.w,r3)980; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)981; CHECK-NEXT: }982; CHECK-NEXT: {983; CHECK-NEXT: v5 = vsplat(r4)984; CHECK-NEXT: v29 = vor(v6,v2)985; CHECK-NEXT: v1 = vxor(v1,v1)986; CHECK-NEXT: }987; CHECK-NEXT: {988; CHECK-NEXT: r2 = ##2147483647989; CHECK-NEXT: v3.w = vasr(v3.w,r5)990; CHECK-NEXT: }991; CHECK-NEXT: {992; CHECK-NEXT: v30 = vsplat(r2)993; CHECK-NEXT: q0 = vcmp.gt(v1.w,v0.w)994; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)995; CHECK-NEXT: }996; CHECK-NEXT: {997; CHECK-NEXT: v2 = vmux(q0,v2,v30)998; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)999; CHECK-NEXT: }1000; CHECK-NEXT: {1001; CHECK-NEXT: q3 = vcmp.gt(v3.w,v1.w)1002; CHECK-NEXT: }1003; CHECK-NEXT: {1004; CHECK-NEXT: v4.w = vlsr(v29.w,v3.w)1005; CHECK-NEXT: }1006; CHECK-NEXT: {1007; CHECK-NEXT: v31.w = vsub(v1.w,v4.w)1008; CHECK-NEXT: }1009; CHECK-NEXT: {1010; CHECK-NEXT: v0 = vmux(q0,v31,v4)1011; CHECK-NEXT: }1012; CHECK-NEXT: {1013; CHECK-NEXT: v0 = vmux(q3,v0,v2)1014; CHECK-NEXT: jumpr r311015; CHECK-NEXT: vmem(r1+#0) = v0.new1016; CHECK-NEXT: }1017 %v0 = load <32 x float>, ptr %a0, align 1281018 %v1 = fptosi <32 x float> %v0 to <32 x i32>1019 store <32 x i32> %v1, ptr %a1, align 1281020 ret void1021}1022 1023; Widen input and result1024define void @f32s32_1(ptr %a0, ptr %a1) #0 {1025; CHECK-LABEL: f32s32_1:1026; CHECK: .cfi_startproc1027; CHECK-NEXT: // %bb.0:1028; CHECK-NEXT: {1029; CHECK-NEXT: r7 = ##-21474836481030; CHECK-NEXT: r3:2 = combine(#8,#1)1031; CHECK-NEXT: v0 = vmem(r0+#0)1032; CHECK-NEXT: }1033; CHECK-NEXT: {1034; CHECK-NEXT: v2 = vsplat(r7)1035; CHECK-NEXT: v3.w = vasl(v0.w,r2)1036; CHECK-NEXT: r6 = #301037; CHECK-NEXT: r5 = #241038; CHECK-NEXT: }1039; CHECK-NEXT: {1040; CHECK-NEXT: v4 = vsplat(r6)1041; CHECK-NEXT: r4 = #321042; CHECK-NEXT: v6.w = vasl(v0.w,r3)1043; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1044; CHECK-NEXT: }1045; CHECK-NEXT: {1046; CHECK-NEXT: v5 = vsplat(r4)1047; CHECK-NEXT: v29 = vor(v6,v2)1048; CHECK-NEXT: v1 = vxor(v1,v1)1049; CHECK-NEXT: }1050; CHECK-NEXT: {1051; CHECK-NEXT: r3 = ##21474836471052; CHECK-NEXT: r2 = #641053; CHECK-NEXT: v3.w = vasr(v3.w,r5)1054; CHECK-NEXT: }1055; CHECK-NEXT: {1056; CHECK-NEXT: v30 = vsplat(r3)1057; CHECK-NEXT: q3 = vsetq(r2)1058; CHECK-NEXT: q0 = vcmp.gt(v1.w,v0.w)1059; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)1060; CHECK-NEXT: }1061; CHECK-NEXT: {1062; CHECK-NEXT: v2 = vmux(q0,v2,v30)1063; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)1064; CHECK-NEXT: }1065; CHECK-NEXT: {1066; CHECK-NEXT: q1 = vcmp.gt(v3.w,v1.w)1067; CHECK-NEXT: }1068; CHECK-NEXT: {1069; CHECK-NEXT: v4.w = vlsr(v29.w,v3.w)1070; CHECK-NEXT: }1071; CHECK-NEXT: {1072; CHECK-NEXT: v31.w = vsub(v1.w,v4.w)1073; CHECK-NEXT: }1074; CHECK-NEXT: {1075; CHECK-NEXT: v0 = vmux(q0,v31,v4)1076; CHECK-NEXT: }1077; CHECK-NEXT: {1078; CHECK-NEXT: v0 = vmux(q1,v0,v2)1079; CHECK-NEXT: }1080; CHECK-NEXT: {1081; CHECK-NEXT: jumpr r311082; CHECK-NEXT: if (q3) vmem(r1+#0) = v01083; CHECK-NEXT: }1084 %v0 = load <16 x float>, ptr %a0, align 1281085 %v1 = fptosi <16 x float> %v0 to <16 x i32>1086 store <16 x i32> %v1, ptr %a1, align 1281087 ret void1088}1089 1090 1091; f16 -> u81092; No widening1093define void @f16u8_0(ptr %a0, ptr %a1) #0 {1094; CHECK-LABEL: f16u8_0:1095; CHECK: .cfi_startproc1096; CHECK-NEXT: // %bb.0:1097; CHECK-NEXT: {1098; CHECK-NEXT: r3:2 = combine(##32768,#1)1099; CHECK-NEXT: r4 = #141100; CHECK-NEXT: v0 = vmem(r0+#0)1101; CHECK-NEXT: }1102; CHECK-NEXT: {1103; CHECK-NEXT: v2.h = vsplat(r3)1104; CHECK-NEXT: r7:6 = combine(#11,#16)1105; CHECK-NEXT: v3.h = vasl(v0.h,r2)1106; CHECK-NEXT: v1 = vmem(r0+#1)1107; CHECK-NEXT: }1108; CHECK-NEXT: {1109; CHECK-NEXT: v6.h = vsplat(r4)1110; CHECK-NEXT: r5 = #51111; CHECK-NEXT: v4.h = vasl(v1.h,r2)1112; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)1113; CHECK-NEXT: }1114; CHECK-NEXT: {1115; CHECK-NEXT: v7.h = vsplat(r6)1116; CHECK-NEXT: v5.h = vasl(v0.h,r5)1117; CHECK-NEXT: v4.h = vsub(v4.h,v2.h)1118; CHECK-NEXT: v28 = vxor(v28,v28)1119; CHECK-NEXT: }1120; CHECK-NEXT: {1121; CHECK-NEXT: r2 = #327671122; CHECK-NEXT: v3.h = vasr(v3.h,r7)1123; CHECK-NEXT: v5 = vor(v5,v2)1124; CHECK-NEXT: }1125; CHECK-NEXT: {1126; CHECK-NEXT: v29.h = vsplat(r2)1127; CHECK-NEXT: v4.h = vasr(v4.h,r7)1128; CHECK-NEXT: q2 = vcmp.gt(v28.h,v0.h)1129; CHECK-NEXT: v3.h = vsub(v6.h,v3.h)1130; CHECK-NEXT: }1131; CHECK-NEXT: {1132; CHECK-NEXT: v8.h = vasl(v1.h,r5)1133; CHECK-NEXT: q3 = vcmp.gt(v28.h,v1.h)1134; CHECK-NEXT: v4.h = vsub(v6.h,v4.h)1135; CHECK-NEXT: v3.h = vmin(v3.h,v7.h)1136; CHECK-NEXT: }1137; CHECK-NEXT: {1138; CHECK-NEXT: v4.h = vmin(v4.h,v7.h)1139; CHECK-NEXT: v2 = vor(v8,v2)1140; CHECK-NEXT: q0 = vcmp.gt(v28.h,v3.h)1141; CHECK-NEXT: }1142; CHECK-NEXT: {1143; CHECK-NEXT: v5.h = vlsr(v5.h,v3.h)1144; CHECK-NEXT: q1 = vcmp.gt(v28.h,v4.h)1145; CHECK-NEXT: }1146; CHECK-NEXT: {1147; CHECK-NEXT: v2.h = vlsr(v2.h,v4.h)1148; CHECK-NEXT: v30 = vmux(q0,v29,v5)1149; CHECK-NEXT: }1150; CHECK-NEXT: {1151; CHECK-NEXT: v31 = vmux(q1,v29,v2)1152; CHECK-NEXT: v0 = vmux(q2,v28,v30)1153; CHECK-NEXT: }1154; CHECK-NEXT: {1155; CHECK-NEXT: v1 = vmux(q3,v28,v31)1156; CHECK-NEXT: }1157; CHECK-NEXT: {1158; CHECK-NEXT: v0.ub = vpack(v1.h,v0.h):sat1159; CHECK-NEXT: jumpr r311160; CHECK-NEXT: vmem(r1+#0) = v0.new1161; CHECK-NEXT: }1162 %v0 = load <128 x half>, ptr %a0, align 1281163 %v1 = fptoui <128 x half> %v0 to <128 x i8>1164 store <128 x i8> %v1, ptr %a1, align 1281165 ret void1166}1167 1168; Widen result1169define void @f16u8_1(ptr %a0, ptr %a1) #0 {1170; CHECK-LABEL: f16u8_1:1171; CHECK: .cfi_startproc1172; CHECK-NEXT: // %bb.0:1173; CHECK-NEXT: {1174; CHECK-NEXT: r7 = ##327681175; CHECK-NEXT: r3:2 = combine(#5,#1)1176; CHECK-NEXT: v0 = vmem(r0+#0)1177; CHECK-NEXT: }1178; CHECK-NEXT: {1179; CHECK-NEXT: v2.h = vsplat(r7)1180; CHECK-NEXT: v3.h = vasl(v0.h,r2)1181; CHECK-NEXT: r6 = #141182; CHECK-NEXT: r5 = #111183; CHECK-NEXT: }1184; CHECK-NEXT: {1185; CHECK-NEXT: v4.h = vsplat(r6)1186; CHECK-NEXT: r4 = #161187; CHECK-NEXT: v6.h = vasl(v0.h,r3)1188; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)1189; CHECK-NEXT: }1190; CHECK-NEXT: {1191; CHECK-NEXT: v5.h = vsplat(r4)1192; CHECK-NEXT: r3 = #327671193; CHECK-NEXT: v2 = vor(v6,v2)1194; CHECK-NEXT: v1 = vxor(v1,v1)1195; CHECK-NEXT: }1196; CHECK-NEXT: {1197; CHECK-NEXT: v30.h = vsplat(r3)1198; CHECK-NEXT: r2 = #641199; CHECK-NEXT: v3.h = vasr(v3.h,r5)1200; CHECK-NEXT: q1 = vcmp.gt(v1.h,v0.h)1201; CHECK-NEXT: }1202; CHECK-NEXT: {1203; CHECK-NEXT: q3 = vsetq(r2)1204; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)1205; CHECK-NEXT: }1206; CHECK-NEXT: {1207; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)1208; CHECK-NEXT: }1209; CHECK-NEXT: {1210; CHECK-NEXT: q0 = vcmp.gt(v1.h,v3.h)1211; CHECK-NEXT: }1212; CHECK-NEXT: {1213; CHECK-NEXT: v2.h = vlsr(v2.h,v3.h)1214; CHECK-NEXT: }1215; CHECK-NEXT: {1216; CHECK-NEXT: v31 = vmux(q0,v30,v2)1217; CHECK-NEXT: }1218; CHECK-NEXT: {1219; CHECK-NEXT: v0 = vmux(q1,v1,v31)1220; CHECK-NEXT: }1221; CHECK-NEXT: {1222; CHECK-NEXT: v0.ub = vpack(v0.h,v0.h):sat1223; CHECK-NEXT: }1224; CHECK-NEXT: {1225; CHECK-NEXT: jumpr r311226; CHECK-NEXT: if (q3) vmem(r1+#0) = v01227; CHECK-NEXT: }1228 %v0 = load <64 x half>, ptr %a0, align 1281229 %v1 = fptoui <64 x half> %v0 to <64 x i8>1230 store <64 x i8> %v1, ptr %a1, align 1281231 ret void1232}1233 1234; f16 -> u161235; No widening1236define void @f16u16_0(ptr %a0, ptr %a1) #0 {1237; CHECK-LABEL: f16u16_0:1238; CHECK: .cfi_startproc1239; CHECK-NEXT: // %bb.0:1240; CHECK-NEXT: {1241; CHECK-NEXT: r7 = ##327681242; CHECK-NEXT: r3:2 = combine(#5,#1)1243; CHECK-NEXT: v0 = vmem(r0+#0)1244; CHECK-NEXT: }1245; CHECK-NEXT: {1246; CHECK-NEXT: v2.h = vsplat(r7)1247; CHECK-NEXT: v3.h = vasl(v0.h,r2)1248; CHECK-NEXT: r6 = #141249; CHECK-NEXT: r5 = #111250; CHECK-NEXT: }1251; CHECK-NEXT: {1252; CHECK-NEXT: v4.h = vsplat(r6)1253; CHECK-NEXT: r4 = #161254; CHECK-NEXT: v6.h = vasl(v0.h,r3)1255; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)1256; CHECK-NEXT: }1257; CHECK-NEXT: {1258; CHECK-NEXT: v5.h = vsplat(r4)1259; CHECK-NEXT: r2 = #327671260; CHECK-NEXT: v2 = vor(v6,v2)1261; CHECK-NEXT: v1 = vxor(v1,v1)1262; CHECK-NEXT: }1263; CHECK-NEXT: {1264; CHECK-NEXT: v30.h = vsplat(r2)1265; CHECK-NEXT: v3.h = vasr(v3.h,r5)1266; CHECK-NEXT: q1 = vcmp.gt(v1.h,v0.h)1267; CHECK-NEXT: }1268; CHECK-NEXT: {1269; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)1270; CHECK-NEXT: }1271; CHECK-NEXT: {1272; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)1273; CHECK-NEXT: }1274; CHECK-NEXT: {1275; CHECK-NEXT: q0 = vcmp.gt(v1.h,v3.h)1276; CHECK-NEXT: }1277; CHECK-NEXT: {1278; CHECK-NEXT: v2.h = vlsr(v2.h,v3.h)1279; CHECK-NEXT: }1280; CHECK-NEXT: {1281; CHECK-NEXT: v31 = vmux(q0,v30,v2)1282; CHECK-NEXT: }1283; CHECK-NEXT: {1284; CHECK-NEXT: v0 = vmux(q1,v1,v31)1285; CHECK-NEXT: jumpr r311286; CHECK-NEXT: vmem(r1+#0) = v0.new1287; CHECK-NEXT: }1288 %v0 = load <64 x half>, ptr %a0, align 1281289 %v1 = fptoui <64 x half> %v0 to <64 x i16>1290 store <64 x i16> %v1, ptr %a1, align 1281291 ret void1292}1293 1294; Widen input and result1295define void @f16u16_1(ptr %a0, ptr %a1) #0 {1296; CHECK-LABEL: f16u16_1:1297; CHECK: .cfi_startproc1298; CHECK-NEXT: // %bb.0:1299; CHECK-NEXT: {1300; CHECK-NEXT: r7 = ##327681301; CHECK-NEXT: r3:2 = combine(#5,#1)1302; CHECK-NEXT: v0 = vmem(r0+#0)1303; CHECK-NEXT: }1304; CHECK-NEXT: {1305; CHECK-NEXT: v2.h = vsplat(r7)1306; CHECK-NEXT: v3.h = vasl(v0.h,r2)1307; CHECK-NEXT: r6 = #141308; CHECK-NEXT: r5 = #111309; CHECK-NEXT: }1310; CHECK-NEXT: {1311; CHECK-NEXT: v4.h = vsplat(r6)1312; CHECK-NEXT: r4 = #161313; CHECK-NEXT: v6.h = vasl(v0.h,r3)1314; CHECK-NEXT: v3.h = vsub(v3.h,v2.h)1315; CHECK-NEXT: }1316; CHECK-NEXT: {1317; CHECK-NEXT: v5.h = vsplat(r4)1318; CHECK-NEXT: r3 = #327671319; CHECK-NEXT: v2 = vor(v6,v2)1320; CHECK-NEXT: v1 = vxor(v1,v1)1321; CHECK-NEXT: }1322; CHECK-NEXT: {1323; CHECK-NEXT: v30.h = vsplat(r3)1324; CHECK-NEXT: r2 = #641325; CHECK-NEXT: v3.h = vasr(v3.h,r5)1326; CHECK-NEXT: q1 = vcmp.gt(v1.h,v0.h)1327; CHECK-NEXT: }1328; CHECK-NEXT: {1329; CHECK-NEXT: q3 = vsetq(r2)1330; CHECK-NEXT: v3.h = vsub(v4.h,v3.h)1331; CHECK-NEXT: }1332; CHECK-NEXT: {1333; CHECK-NEXT: v3.h = vmin(v3.h,v5.h)1334; CHECK-NEXT: }1335; CHECK-NEXT: {1336; CHECK-NEXT: q0 = vcmp.gt(v1.h,v3.h)1337; CHECK-NEXT: }1338; CHECK-NEXT: {1339; CHECK-NEXT: v2.h = vlsr(v2.h,v3.h)1340; CHECK-NEXT: }1341; CHECK-NEXT: {1342; CHECK-NEXT: v31 = vmux(q0,v30,v2)1343; CHECK-NEXT: }1344; CHECK-NEXT: {1345; CHECK-NEXT: v0 = vmux(q1,v1,v31)1346; CHECK-NEXT: }1347; CHECK-NEXT: {1348; CHECK-NEXT: jumpr r311349; CHECK-NEXT: if (q3) vmem(r1+#0) = v01350; CHECK-NEXT: }1351 %v0 = load <32 x half>, ptr %a0, align 1281352 %v1 = fptoui <32 x half> %v0 to <32 x i16>1353 store <32 x i16> %v1, ptr %a1, align 1281354 ret void1355}1356 1357; f16 -> u321358; No widening1359define void @f16u32_0(ptr %a0, ptr %a1) #0 {1360; CHECK-LABEL: f16u32_0:1361; CHECK: .cfi_startproc1362; CHECK-NEXT: // %bb.0:1363; CHECK-NEXT: {1364; CHECK-NEXT: r2 = #153601365; CHECK-NEXT: r7 = #-41366; CHECK-NEXT: v0 = vmem(r0+#0)1367; CHECK-NEXT: }1368; CHECK-NEXT: {1369; CHECK-NEXT: v1.h = vsplat(r2)1370; CHECK-NEXT: r4 = ##-21474836481371; CHECK-NEXT: r3:2 = combine(#30,#1)1372; CHECK-NEXT: }1373; CHECK-NEXT: {1374; CHECK-NEXT: v2 = vsplat(r4)1375; CHECK-NEXT: r4 = #321376; CHECK-NEXT: r6 = #241377; CHECK-NEXT: r0 = #81378; CHECK-NEXT: }1379; CHECK-NEXT: {1380; CHECK-NEXT: v6 = vsplat(r3)1381; CHECK-NEXT: v26 = vxor(v26,v26)1382; CHECK-NEXT: }1383; CHECK-NEXT: {1384; CHECK-NEXT: v1:0.qf32 = vmpy(v0.hf,v1.hf)1385; CHECK-NEXT: }1386; CHECK-NEXT: {1387; CHECK-NEXT: v7 = vsplat(r4)1388; CHECK-NEXT: }1389; CHECK-NEXT: {1390; CHECK-NEXT: v0.sf = v0.qf321391; CHECK-NEXT: }1392; CHECK-NEXT: {1393; CHECK-NEXT: v1.sf = v1.qf321394; CHECK-NEXT: }1395; CHECK-NEXT: {1396; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7)1397; CHECK-NEXT: }1398; CHECK-NEXT: {1399; CHECK-NEXT: q1 = vcmp.gt(v26.w,v1.w)1400; CHECK-NEXT: q3 = vcmp.gt(v26.w,v0.w)1401; CHECK-NEXT: }1402; CHECK-NEXT: {1403; CHECK-NEXT: v3.w = vasl(v1.w,r2)1404; CHECK-NEXT: }1405; CHECK-NEXT: {1406; CHECK-NEXT: r2 = ##21474836471407; CHECK-NEXT: v4.w = vasl(v0.w,r2)1408; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1409; CHECK-NEXT: }1410; CHECK-NEXT: {1411; CHECK-NEXT: v27 = vsplat(r2)1412; CHECK-NEXT: v5.w = vasl(v1.w,r0)1413; CHECK-NEXT: v4.w = vsub(v4.w,v2.w)1414; CHECK-NEXT: }1415; CHECK-NEXT: {1416; CHECK-NEXT: v3.w = vasr(v3.w,r6)1417; CHECK-NEXT: v5 = vor(v5,v2)1418; CHECK-NEXT: }1419; CHECK-NEXT: {1420; CHECK-NEXT: v4.w = vasr(v4.w,r6)1421; CHECK-NEXT: v3.w = vsub(v6.w,v3.w)1422; CHECK-NEXT: }1423; CHECK-NEXT: {1424; CHECK-NEXT: v8.w = vasl(v0.w,r0)1425; CHECK-NEXT: v4.w = vsub(v6.w,v4.w)1426; CHECK-NEXT: v3.w = vmin(v3.w,v7.w)1427; CHECK-NEXT: }1428; CHECK-NEXT: {1429; CHECK-NEXT: v4.w = vmin(v4.w,v7.w)1430; CHECK-NEXT: v2 = vor(v8,v2)1431; CHECK-NEXT: q0 = vcmp.gt(v26.w,v3.w)1432; CHECK-NEXT: }1433; CHECK-NEXT: {1434; CHECK-NEXT: v3.w = vlsr(v5.w,v3.w)1435; CHECK-NEXT: q2 = vcmp.gt(v26.w,v4.w)1436; CHECK-NEXT: }1437; CHECK-NEXT: {1438; CHECK-NEXT: v28.w = vlsr(v2.w,v4.w)1439; CHECK-NEXT: v29 = vmux(q0,v27,v3)1440; CHECK-NEXT: }1441; CHECK-NEXT: {1442; CHECK-NEXT: v30 = vmux(q2,v27,v28)1443; CHECK-NEXT: v31 = vmux(q1,v26,v29)1444; CHECK-NEXT: vmem(r1+#1) = v31.new1445; CHECK-NEXT: }1446; CHECK-NEXT: {1447; CHECK-NEXT: v0 = vmux(q3,v26,v30)1448; CHECK-NEXT: jumpr r311449; CHECK-NEXT: vmem(r1+#0) = v0.new1450; CHECK-NEXT: }1451 %v0 = load <64 x half>, ptr %a0, align 1281452 %v1 = fptoui <64 x half> %v0 to <64 x i32>1453 store <64 x i32> %v1, ptr %a1, align 1281454 ret void1455}1456 1457; Widen input1458define void @f16u32_1(ptr %a0, ptr %a1) #0 {1459; CHECK-LABEL: f16u32_1:1460; CHECK: .cfi_startproc1461; CHECK-NEXT: // %bb.0:1462; CHECK-NEXT: {1463; CHECK-NEXT: r4 = #153601464; CHECK-NEXT: r7 = #-41465; CHECK-NEXT: v0 = vmem(r0+#0)1466; CHECK-NEXT: }1467; CHECK-NEXT: {1468; CHECK-NEXT: v1.h = vsplat(r4)1469; CHECK-NEXT: r2 = ##-21474836481470; CHECK-NEXT: r3 = #11471; CHECK-NEXT: }1472; CHECK-NEXT: {1473; CHECK-NEXT: v3 = vsplat(r2)1474; CHECK-NEXT: r5:4 = combine(#8,#30)1475; CHECK-NEXT: r6 = #241476; CHECK-NEXT: }1477; CHECK-NEXT: {1478; CHECK-NEXT: v4 = vsplat(r4)1479; CHECK-NEXT: r2 = ##21474836471480; CHECK-NEXT: r4 = #321481; CHECK-NEXT: }1482; CHECK-NEXT: {1483; CHECK-NEXT: v1:0.qf32 = vmpy(v0.hf,v1.hf)1484; CHECK-NEXT: v2 = vxor(v2,v2)1485; CHECK-NEXT: }1486; CHECK-NEXT: {1487; CHECK-NEXT: v5 = vsplat(r4)1488; CHECK-NEXT: v30 = vsplat(r2)1489; CHECK-NEXT: }1490; CHECK-NEXT: {1491; CHECK-NEXT: v0.sf = v0.qf321492; CHECK-NEXT: }1493; CHECK-NEXT: {1494; CHECK-NEXT: v1.sf = v1.qf321495; CHECK-NEXT: }1496; CHECK-NEXT: {1497; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7)1498; CHECK-NEXT: }1499; CHECK-NEXT: {1500; CHECK-NEXT: q1 = vcmp.gt(v2.w,v0.w)1501; CHECK-NEXT: }1502; CHECK-NEXT: {1503; CHECK-NEXT: v1.w = vasl(v0.w,r3)1504; CHECK-NEXT: }1505; CHECK-NEXT: {1506; CHECK-NEXT: v6.w = vasl(v0.w,r5)1507; CHECK-NEXT: v1.w = vsub(v1.w,v3.w)1508; CHECK-NEXT: }1509; CHECK-NEXT: {1510; CHECK-NEXT: v3 = vor(v6,v3)1511; CHECK-NEXT: }1512; CHECK-NEXT: {1513; CHECK-NEXT: v1.w = vasr(v1.w,r6)1514; CHECK-NEXT: }1515; CHECK-NEXT: {1516; CHECK-NEXT: v1.w = vsub(v4.w,v1.w)1517; CHECK-NEXT: }1518; CHECK-NEXT: {1519; CHECK-NEXT: v1.w = vmin(v1.w,v5.w)1520; CHECK-NEXT: }1521; CHECK-NEXT: {1522; CHECK-NEXT: q0 = vcmp.gt(v2.w,v1.w)1523; CHECK-NEXT: }1524; CHECK-NEXT: {1525; CHECK-NEXT: v1.w = vlsr(v3.w,v1.w)1526; CHECK-NEXT: }1527; CHECK-NEXT: {1528; CHECK-NEXT: v31 = vmux(q0,v30,v1)1529; CHECK-NEXT: }1530; CHECK-NEXT: {1531; CHECK-NEXT: v0 = vmux(q1,v2,v31)1532; CHECK-NEXT: jumpr r311533; CHECK-NEXT: vmem(r1+#0) = v0.new1534; CHECK-NEXT: }1535 %v0 = load <32 x half>, ptr %a0, align 1281536 %v1 = fptoui <32 x half> %v0 to <32 x i32>1537 store <32 x i32> %v1, ptr %a1, align 1281538 ret void1539}1540 1541; f32 -> u81542; No widening1543define void @f32u8_0(ptr %a0, ptr %a1) #0 {1544; CHECK-LABEL: f32u8_0:1545; CHECK: .cfi_startproc1546; CHECK-NEXT: // %bb.0:1547; CHECK-NEXT: {1548; CHECK-NEXT: r3:2 = combine(#8,#1)1549; CHECK-NEXT: r4 = ##-21474836481550; CHECK-NEXT: v5 = vmem(r0+#0)1551; CHECK-NEXT: }1552; CHECK-NEXT: {1553; CHECK-NEXT: v4 = vsplat(r4)1554; CHECK-NEXT: r5 = #301555; CHECK-NEXT: r6 = #241556; CHECK-NEXT: v2 = vmem(r0+#1)1557; CHECK-NEXT: }1558; CHECK-NEXT: {1559; CHECK-NEXT: v14 = vsplat(r5)1560; CHECK-NEXT: r4 = #321561; CHECK-NEXT: v8.w = vasl(v5.w,r2)1562; CHECK-NEXT: v0 = vmem(r0+#2)1563; CHECK-NEXT: }1564; CHECK-NEXT: {1565; CHECK-NEXT: v9.w = vasl(v2.w,r2)1566; CHECK-NEXT: v13 = vxor(v13,v13)1567; CHECK-NEXT: v8.w = vsub(v8.w,v4.w)1568; CHECK-NEXT: v1 = vmem(r0+#3)1569; CHECK-NEXT: }1570; CHECK-NEXT: {1571; CHECK-NEXT: v21 = vsplat(r4)1572; CHECK-NEXT: v11.w = vasl(v0.w,r2)1573; CHECK-NEXT: v9.w = vsub(v9.w,v4.w)1574; CHECK-NEXT: q0 = vcmp.gt(v13.w,v5.w)1575; CHECK-NEXT: }1576; CHECK-NEXT: {1577; CHECK-NEXT: v12.w = vasl(v1.w,r2)1578; CHECK-NEXT: q3 = vcmp.gt(v13.w,v2.w)1579; CHECK-NEXT: v11.w = vsub(v11.w,v4.w)1580; CHECK-NEXT: }1581; CHECK-NEXT: {1582; CHECK-NEXT: r2 = ##21474836471583; CHECK-NEXT: r7 = #641584; CHECK-NEXT: v12.w = vsub(v12.w,v4.w)1585; CHECK-NEXT: }1586; CHECK-NEXT: {1587; CHECK-NEXT: v23 = vsplat(r2)1588; CHECK-NEXT: v8.w = vasr(v8.w,r6)1589; CHECK-NEXT: }1590; CHECK-NEXT: {1591; CHECK-NEXT: v9.w = vasr(v9.w,r6)1592; CHECK-NEXT: v8.w = vsub(v14.w,v8.w)1593; CHECK-NEXT: }1594; CHECK-NEXT: {1595; CHECK-NEXT: v6.w = vasl(v5.w,r3)1596; CHECK-NEXT: v9.w = vsub(v14.w,v9.w)1597; CHECK-NEXT: v8.w = vmin(v8.w,v21.w)1598; CHECK-NEXT: }1599; CHECK-NEXT: {1600; CHECK-NEXT: v7.w = vasl(v2.w,r3)1601; CHECK-NEXT: v6 = vor(v6,v4)1602; CHECK-NEXT: v9.w = vmin(v9.w,v21.w)1603; CHECK-NEXT: q1 = vcmp.gt(v13.w,v8.w)1604; CHECK-NEXT: }1605; CHECK-NEXT: {1606; CHECK-NEXT: v20.w = vasr(v11.w,r6)1607; CHECK-NEXT: v7 = vor(v7,v4)1608; CHECK-NEXT: q2 = vcmp.gt(v13.w,v9.w)1609; CHECK-NEXT: }1610; CHECK-NEXT: {1611; CHECK-NEXT: v12.w = vasr(v12.w,r6)1612; CHECK-NEXT: v5.w = vsub(v14.w,v20.w)1613; CHECK-NEXT: }1614; CHECK-NEXT: {1615; CHECK-NEXT: v3.w = vasl(v1.w,r3)1616; CHECK-NEXT: v22.w = vsub(v14.w,v12.w)1617; CHECK-NEXT: v5.w = vmin(v5.w,v21.w)1618; CHECK-NEXT: }1619; CHECK-NEXT: {1620; CHECK-NEXT: v10.w = vasl(v0.w,r3)1621; CHECK-NEXT: v3 = vor(v3,v4)1622; CHECK-NEXT: }1623; CHECK-NEXT: {1624; CHECK-NEXT: v6.w = vlsr(v6.w,v8.w)1625; CHECK-NEXT: v10 = vor(v10,v4)1626; CHECK-NEXT: v4.w = vmin(v22.w,v21.w)1627; CHECK-NEXT: }1628; CHECK-NEXT: {1629; CHECK-NEXT: v7.w = vlsr(v7.w,v9.w)1630; CHECK-NEXT: v6 = vmux(q1,v23,v6)1631; CHECK-NEXT: q1 = vcmp.gt(v13.w,v5.w)1632; CHECK-NEXT: }1633; CHECK-NEXT: {1634; CHECK-NEXT: v24.w = vlsr(v10.w,v5.w)1635; CHECK-NEXT: v7 = vmux(q2,v23,v7)1636; CHECK-NEXT: q2 = vcmp.gt(v13.w,v4.w)1637; CHECK-NEXT: v25 = vmux(q0,v13,v6)1638; CHECK-NEXT: }1639; CHECK-NEXT: {1640; CHECK-NEXT: v3.w = vlsr(v3.w,v4.w)1641; CHECK-NEXT: v26 = vmux(q3,v13,v7)1642; CHECK-NEXT: v2 = vmux(q1,v23,v24)1643; CHECK-NEXT: q1 = vcmp.gt(v13.w,v0.w)1644; CHECK-NEXT: }1645; CHECK-NEXT: {1646; CHECK-NEXT: v27 = vmux(q2,v23,v3)1647; CHECK-NEXT: q3 = vcmp.gt(v13.w,v1.w)1648; CHECK-NEXT: v28 = vmux(q1,v13,v2)1649; CHECK-NEXT: }1650; CHECK-NEXT: {1651; CHECK-NEXT: v29.uh = vpack(v26.w,v25.w):sat1652; CHECK-NEXT: v0 = vmux(q3,v13,v27)1653; CHECK-NEXT: }1654; CHECK-NEXT: {1655; CHECK-NEXT: v30.uh = vpack(v28.w,v0.w):sat1656; CHECK-NEXT: }1657; CHECK-NEXT: {1658; CHECK-NEXT: v0.uh = vpack(v0.w,v28.w):sat1659; CHECK-NEXT: }1660; CHECK-NEXT: {1661; CHECK-NEXT: v31.ub = vpack(v30.h,v29.h):sat1662; CHECK-NEXT: }1663; CHECK-NEXT: {1664; CHECK-NEXT: v0.ub = vpack(v30.h,v0.h):sat1665; CHECK-NEXT: }1666; CHECK-NEXT: {1667; CHECK-NEXT: v1:0 = vshuff(v0,v31,r7)1668; CHECK-NEXT: jumpr r311669; CHECK-NEXT: vmem(r1+#0) = v0.new1670; CHECK-NEXT: }1671 %v0 = load <128 x float>, ptr %a0, align 1281672 %v1 = fptoui <128 x float> %v0 to <128 x i8>1673 store <128 x i8> %v1, ptr %a1, align 1281674 ret void1675}1676 1677; Widen result #11678define void @f32u8_1(ptr %a0, ptr %a1) #0 {1679; CHECK-LABEL: f32u8_1:1680; CHECK: .cfi_startproc1681; CHECK-NEXT: // %bb.0:1682; CHECK-NEXT: {1683; CHECK-NEXT: r3:2 = combine(##-2147483648,#1)1684; CHECK-NEXT: r4 = #301685; CHECK-NEXT: v0 = vmem(r0+#0)1686; CHECK-NEXT: }1687; CHECK-NEXT: {1688; CHECK-NEXT: v2 = vsplat(r3)1689; CHECK-NEXT: r7:6 = combine(#24,#32)1690; CHECK-NEXT: v3.w = vasl(v0.w,r2)1691; CHECK-NEXT: v1 = vmem(r0+#1)1692; CHECK-NEXT: }1693; CHECK-NEXT: {1694; CHECK-NEXT: v6 = vsplat(r4)1695; CHECK-NEXT: r5 = #81696; CHECK-NEXT: v4.w = vasl(v1.w,r2)1697; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1698; CHECK-NEXT: }1699; CHECK-NEXT: {1700; CHECK-NEXT: v7 = vsplat(r6)1701; CHECK-NEXT: v5.w = vasl(v0.w,r5)1702; CHECK-NEXT: v4.w = vsub(v4.w,v2.w)1703; CHECK-NEXT: v27 = vxor(v27,v27)1704; CHECK-NEXT: }1705; CHECK-NEXT: {1706; CHECK-NEXT: r3 = ##21474836471707; CHECK-NEXT: v3.w = vasr(v3.w,r7)1708; CHECK-NEXT: v5 = vor(v5,v2)1709; CHECK-NEXT: }1710; CHECK-NEXT: {1711; CHECK-NEXT: v28 = vsplat(r3)1712; CHECK-NEXT: v4.w = vasr(v4.w,r7)1713; CHECK-NEXT: q2 = vcmp.gt(v27.w,v0.w)1714; CHECK-NEXT: v3.w = vsub(v6.w,v3.w)1715; CHECK-NEXT: }1716; CHECK-NEXT: {1717; CHECK-NEXT: r2 = #641718; CHECK-NEXT: v8.w = vasl(v1.w,r5)1719; CHECK-NEXT: q3 = vcmp.gt(v27.w,v1.w)1720; CHECK-NEXT: v4.w = vsub(v6.w,v4.w)1721; CHECK-NEXT: }1722; CHECK-NEXT: {1723; CHECK-NEXT: v3.w = vmin(v3.w,v7.w)1724; CHECK-NEXT: v4.w = vmin(v4.w,v7.w)1725; CHECK-NEXT: v2 = vor(v8,v2)1726; CHECK-NEXT: }1727; CHECK-NEXT: {1728; CHECK-NEXT: q0 = vcmp.gt(v27.w,v3.w)1729; CHECK-NEXT: }1730; CHECK-NEXT: {1731; CHECK-NEXT: v5.w = vlsr(v5.w,v3.w)1732; CHECK-NEXT: q1 = vcmp.gt(v27.w,v4.w)1733; CHECK-NEXT: }1734; CHECK-NEXT: {1735; CHECK-NEXT: v2.w = vlsr(v2.w,v4.w)1736; CHECK-NEXT: v29 = vmux(q0,v28,v5)1737; CHECK-NEXT: }1738; CHECK-NEXT: {1739; CHECK-NEXT: v30 = vmux(q1,v28,v2)1740; CHECK-NEXT: v0 = vmux(q2,v27,v29)1741; CHECK-NEXT: }1742; CHECK-NEXT: {1743; CHECK-NEXT: q3 = vsetq(r2)1744; CHECK-NEXT: v1 = vmux(q3,v27,v30)1745; CHECK-NEXT: }1746; CHECK-NEXT: {1747; CHECK-NEXT: v31.uh = vpack(v1.w,v0.w):sat1748; CHECK-NEXT: }1749; CHECK-NEXT: {1750; CHECK-NEXT: v0.uh = vpack(v1.w,v0.w):sat1751; CHECK-NEXT: }1752; CHECK-NEXT: {1753; CHECK-NEXT: v0.ub = vpack(v31.h,v0.h):sat1754; CHECK-NEXT: }1755; CHECK-NEXT: {1756; CHECK-NEXT: jumpr r311757; CHECK-NEXT: if (q3) vmem(r1+#0) = v01758; CHECK-NEXT: }1759 %v0 = load <64 x float>, ptr %a0, align 1281760 %v1 = fptoui <64 x float> %v0 to <64 x i8>1761 store <64 x i8> %v1, ptr %a1, align 1281762 ret void1763}1764 1765; Widen result #21766define void @f32u8_2(ptr %a0, ptr %a1) #0 {1767; CHECK-LABEL: f32u8_2:1768; CHECK: .cfi_startproc1769; CHECK-NEXT: // %bb.0:1770; CHECK-NEXT: {1771; CHECK-NEXT: r7 = ##-21474836481772; CHECK-NEXT: r3:2 = combine(#30,#1)1773; CHECK-NEXT: v0 = vmem(r0+#0)1774; CHECK-NEXT: }1775; CHECK-NEXT: {1776; CHECK-NEXT: v2 = vsplat(r7)1777; CHECK-NEXT: r5:4 = combine(#8,#24)1778; CHECK-NEXT: r6 = #321779; CHECK-NEXT: v3.w = vasl(v0.w,r2)1780; CHECK-NEXT: }1781; CHECK-NEXT: {1782; CHECK-NEXT: v4 = vsplat(r3)1783; CHECK-NEXT: v5 = vsplat(r6)1784; CHECK-NEXT: v6.w = vasl(v0.w,r5)1785; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1786; CHECK-NEXT: }1787; CHECK-NEXT: {1788; CHECK-NEXT: v1 = vxor(v1,v1)1789; CHECK-NEXT: v2 = vor(v6,v2)1790; CHECK-NEXT: }1791; CHECK-NEXT: {1792; CHECK-NEXT: q3 = vsetq(r6)1793; CHECK-NEXT: v3.w = vasr(v3.w,r4)1794; CHECK-NEXT: q1 = vcmp.gt(v1.w,v0.w)1795; CHECK-NEXT: }1796; CHECK-NEXT: {1797; CHECK-NEXT: r4 = ##21474836471798; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)1799; CHECK-NEXT: }1800; CHECK-NEXT: {1801; CHECK-NEXT: v30 = vsplat(r4)1802; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)1803; CHECK-NEXT: }1804; CHECK-NEXT: {1805; CHECK-NEXT: q0 = vcmp.gt(v1.w,v3.w)1806; CHECK-NEXT: }1807; CHECK-NEXT: {1808; CHECK-NEXT: v2.w = vlsr(v2.w,v3.w)1809; CHECK-NEXT: }1810; CHECK-NEXT: {1811; CHECK-NEXT: v31 = vmux(q0,v30,v2)1812; CHECK-NEXT: }1813; CHECK-NEXT: {1814; CHECK-NEXT: v0 = vmux(q1,v1,v31)1815; CHECK-NEXT: }1816; CHECK-NEXT: {1817; CHECK-NEXT: v1.uh = vpack(v1.w,v0.w):sat1818; CHECK-NEXT: }1819; CHECK-NEXT: {1820; CHECK-NEXT: v0.uh = vpack(v0.w,v0.w):sat1821; CHECK-NEXT: }1822; CHECK-NEXT: {1823; CHECK-NEXT: v0.ub = vpack(v1.h,v0.h):sat1824; CHECK-NEXT: }1825; CHECK-NEXT: {1826; CHECK-NEXT: jumpr r311827; CHECK-NEXT: if (q3) vmem(r1+#0) = v01828; CHECK-NEXT: }1829 %v0 = load <32 x float>, ptr %a0, align 1281830 %v1 = fptoui <32 x float> %v0 to <32 x i8>1831 store <32 x i8> %v1, ptr %a1, align 1281832 ret void1833}1834 1835; f32 -> u161836; No widening1837define void @f32u16_0(ptr %a0, ptr %a1) #0 {1838; CHECK-LABEL: f32u16_0:1839; CHECK: .cfi_startproc1840; CHECK-NEXT: // %bb.0:1841; CHECK-NEXT: {1842; CHECK-NEXT: r3:2 = combine(##-2147483648,#1)1843; CHECK-NEXT: r4 = #301844; CHECK-NEXT: v0 = vmem(r0+#0)1845; CHECK-NEXT: }1846; CHECK-NEXT: {1847; CHECK-NEXT: v2 = vsplat(r3)1848; CHECK-NEXT: r7:6 = combine(#24,#32)1849; CHECK-NEXT: v3.w = vasl(v0.w,r2)1850; CHECK-NEXT: v1 = vmem(r0+#1)1851; CHECK-NEXT: }1852; CHECK-NEXT: {1853; CHECK-NEXT: v6 = vsplat(r4)1854; CHECK-NEXT: r5 = #81855; CHECK-NEXT: v4.w = vasl(v1.w,r2)1856; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1857; CHECK-NEXT: }1858; CHECK-NEXT: {1859; CHECK-NEXT: v7 = vsplat(r6)1860; CHECK-NEXT: v5.w = vasl(v0.w,r5)1861; CHECK-NEXT: v4.w = vsub(v4.w,v2.w)1862; CHECK-NEXT: v28 = vxor(v28,v28)1863; CHECK-NEXT: }1864; CHECK-NEXT: {1865; CHECK-NEXT: r2 = ##21474836471866; CHECK-NEXT: v3.w = vasr(v3.w,r7)1867; CHECK-NEXT: v5 = vor(v5,v2)1868; CHECK-NEXT: }1869; CHECK-NEXT: {1870; CHECK-NEXT: v29 = vsplat(r2)1871; CHECK-NEXT: v4.w = vasr(v4.w,r7)1872; CHECK-NEXT: q2 = vcmp.gt(v28.w,v0.w)1873; CHECK-NEXT: v3.w = vsub(v6.w,v3.w)1874; CHECK-NEXT: }1875; CHECK-NEXT: {1876; CHECK-NEXT: v8.w = vasl(v1.w,r5)1877; CHECK-NEXT: q3 = vcmp.gt(v28.w,v1.w)1878; CHECK-NEXT: v4.w = vsub(v6.w,v4.w)1879; CHECK-NEXT: v3.w = vmin(v3.w,v7.w)1880; CHECK-NEXT: }1881; CHECK-NEXT: {1882; CHECK-NEXT: v4.w = vmin(v4.w,v7.w)1883; CHECK-NEXT: v2 = vor(v8,v2)1884; CHECK-NEXT: q0 = vcmp.gt(v28.w,v3.w)1885; CHECK-NEXT: }1886; CHECK-NEXT: {1887; CHECK-NEXT: v5.w = vlsr(v5.w,v3.w)1888; CHECK-NEXT: q1 = vcmp.gt(v28.w,v4.w)1889; CHECK-NEXT: }1890; CHECK-NEXT: {1891; CHECK-NEXT: v2.w = vlsr(v2.w,v4.w)1892; CHECK-NEXT: v30 = vmux(q0,v29,v5)1893; CHECK-NEXT: }1894; CHECK-NEXT: {1895; CHECK-NEXT: v31 = vmux(q1,v29,v2)1896; CHECK-NEXT: v0 = vmux(q2,v28,v30)1897; CHECK-NEXT: }1898; CHECK-NEXT: {1899; CHECK-NEXT: v1 = vmux(q3,v28,v31)1900; CHECK-NEXT: }1901; CHECK-NEXT: {1902; CHECK-NEXT: v0.uh = vpack(v1.w,v0.w):sat1903; CHECK-NEXT: jumpr r311904; CHECK-NEXT: vmem(r1+#0) = v0.new1905; CHECK-NEXT: }1906 %v0 = load <64 x float>, ptr %a0, align 1281907 %v1 = fptoui <64 x float> %v0 to <64 x i16>1908 store <64 x i16> %v1, ptr %a1, align 1281909 ret void1910}1911 1912; Widen result1913define void @f32u16_1(ptr %a0, ptr %a1) #0 {1914; CHECK-LABEL: f32u16_1:1915; CHECK: .cfi_startproc1916; CHECK-NEXT: // %bb.0:1917; CHECK-NEXT: {1918; CHECK-NEXT: r7 = ##-21474836481919; CHECK-NEXT: r3:2 = combine(#8,#1)1920; CHECK-NEXT: v0 = vmem(r0+#0)1921; CHECK-NEXT: }1922; CHECK-NEXT: {1923; CHECK-NEXT: v2 = vsplat(r7)1924; CHECK-NEXT: v3.w = vasl(v0.w,r2)1925; CHECK-NEXT: r6 = #301926; CHECK-NEXT: r5 = #241927; CHECK-NEXT: }1928; CHECK-NEXT: {1929; CHECK-NEXT: v4 = vsplat(r6)1930; CHECK-NEXT: r4 = #321931; CHECK-NEXT: v6.w = vasl(v0.w,r3)1932; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)1933; CHECK-NEXT: }1934; CHECK-NEXT: {1935; CHECK-NEXT: v5 = vsplat(r4)1936; CHECK-NEXT: v2 = vor(v6,v2)1937; CHECK-NEXT: v1 = vxor(v1,v1)1938; CHECK-NEXT: }1939; CHECK-NEXT: {1940; CHECK-NEXT: r3 = ##21474836471941; CHECK-NEXT: r2 = #641942; CHECK-NEXT: v3.w = vasr(v3.w,r5)1943; CHECK-NEXT: }1944; CHECK-NEXT: {1945; CHECK-NEXT: v30 = vsplat(r3)1946; CHECK-NEXT: q3 = vsetq(r2)1947; CHECK-NEXT: q1 = vcmp.gt(v1.w,v0.w)1948; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)1949; CHECK-NEXT: }1950; CHECK-NEXT: {1951; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)1952; CHECK-NEXT: }1953; CHECK-NEXT: {1954; CHECK-NEXT: q0 = vcmp.gt(v1.w,v3.w)1955; CHECK-NEXT: }1956; CHECK-NEXT: {1957; CHECK-NEXT: v2.w = vlsr(v2.w,v3.w)1958; CHECK-NEXT: }1959; CHECK-NEXT: {1960; CHECK-NEXT: v31 = vmux(q0,v30,v2)1961; CHECK-NEXT: }1962; CHECK-NEXT: {1963; CHECK-NEXT: v0 = vmux(q1,v1,v31)1964; CHECK-NEXT: }1965; CHECK-NEXT: {1966; CHECK-NEXT: v0.uh = vpack(v0.w,v0.w):sat1967; CHECK-NEXT: }1968; CHECK-NEXT: {1969; CHECK-NEXT: jumpr r311970; CHECK-NEXT: if (q3) vmem(r1+#0) = v01971; CHECK-NEXT: }1972 %v0 = load <32 x float>, ptr %a0, align 1281973 %v1 = fptoui <32 x float> %v0 to <32 x i16>1974 store <32 x i16> %v1, ptr %a1, align 1281975 ret void1976}1977 1978; f32 -> u321979; No widening1980define void @f32u32_0(ptr %a0, ptr %a1) #0 {1981; CHECK-LABEL: f32u32_0:1982; CHECK: .cfi_startproc1983; CHECK-NEXT: // %bb.0:1984; CHECK-NEXT: {1985; CHECK-NEXT: r7 = ##-21474836481986; CHECK-NEXT: r3:2 = combine(#8,#1)1987; CHECK-NEXT: v0 = vmem(r0+#0)1988; CHECK-NEXT: }1989; CHECK-NEXT: {1990; CHECK-NEXT: v2 = vsplat(r7)1991; CHECK-NEXT: v3.w = vasl(v0.w,r2)1992; CHECK-NEXT: r6 = #301993; CHECK-NEXT: r5 = #241994; CHECK-NEXT: }1995; CHECK-NEXT: {1996; CHECK-NEXT: v4 = vsplat(r6)1997; CHECK-NEXT: r4 = #321998; CHECK-NEXT: v6.w = vasl(v0.w,r3)1999; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)2000; CHECK-NEXT: }2001; CHECK-NEXT: {2002; CHECK-NEXT: v5 = vsplat(r4)2003; CHECK-NEXT: v2 = vor(v6,v2)2004; CHECK-NEXT: v1 = vxor(v1,v1)2005; CHECK-NEXT: }2006; CHECK-NEXT: {2007; CHECK-NEXT: r2 = ##21474836472008; CHECK-NEXT: v3.w = vasr(v3.w,r5)2009; CHECK-NEXT: }2010; CHECK-NEXT: {2011; CHECK-NEXT: v30 = vsplat(r2)2012; CHECK-NEXT: q1 = vcmp.gt(v1.w,v0.w)2013; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)2014; CHECK-NEXT: }2015; CHECK-NEXT: {2016; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)2017; CHECK-NEXT: }2018; CHECK-NEXT: {2019; CHECK-NEXT: q0 = vcmp.gt(v1.w,v3.w)2020; CHECK-NEXT: }2021; CHECK-NEXT: {2022; CHECK-NEXT: v2.w = vlsr(v2.w,v3.w)2023; CHECK-NEXT: }2024; CHECK-NEXT: {2025; CHECK-NEXT: v31 = vmux(q0,v30,v2)2026; CHECK-NEXT: }2027; CHECK-NEXT: {2028; CHECK-NEXT: v0 = vmux(q1,v1,v31)2029; CHECK-NEXT: jumpr r312030; CHECK-NEXT: vmem(r1+#0) = v0.new2031; CHECK-NEXT: }2032 %v0 = load <32 x float>, ptr %a0, align 1282033 %v1 = fptoui <32 x float> %v0 to <32 x i32>2034 store <32 x i32> %v1, ptr %a1, align 1282035 ret void2036}2037 2038; Widen input and result2039define void @f32u32_1(ptr %a0, ptr %a1) #0 {2040; CHECK-LABEL: f32u32_1:2041; CHECK: .cfi_startproc2042; CHECK-NEXT: // %bb.0:2043; CHECK-NEXT: {2044; CHECK-NEXT: r7 = ##-21474836482045; CHECK-NEXT: r3:2 = combine(#8,#1)2046; CHECK-NEXT: v0 = vmem(r0+#0)2047; CHECK-NEXT: }2048; CHECK-NEXT: {2049; CHECK-NEXT: v2 = vsplat(r7)2050; CHECK-NEXT: v3.w = vasl(v0.w,r2)2051; CHECK-NEXT: r6 = #302052; CHECK-NEXT: r5 = #242053; CHECK-NEXT: }2054; CHECK-NEXT: {2055; CHECK-NEXT: v4 = vsplat(r6)2056; CHECK-NEXT: r4 = #322057; CHECK-NEXT: v6.w = vasl(v0.w,r3)2058; CHECK-NEXT: v3.w = vsub(v3.w,v2.w)2059; CHECK-NEXT: }2060; CHECK-NEXT: {2061; CHECK-NEXT: v5 = vsplat(r4)2062; CHECK-NEXT: v2 = vor(v6,v2)2063; CHECK-NEXT: v1 = vxor(v1,v1)2064; CHECK-NEXT: }2065; CHECK-NEXT: {2066; CHECK-NEXT: r3 = ##21474836472067; CHECK-NEXT: r2 = #642068; CHECK-NEXT: v3.w = vasr(v3.w,r5)2069; CHECK-NEXT: }2070; CHECK-NEXT: {2071; CHECK-NEXT: v30 = vsplat(r3)2072; CHECK-NEXT: q3 = vsetq(r2)2073; CHECK-NEXT: q1 = vcmp.gt(v1.w,v0.w)2074; CHECK-NEXT: v3.w = vsub(v4.w,v3.w)2075; CHECK-NEXT: }2076; CHECK-NEXT: {2077; CHECK-NEXT: v3.w = vmin(v3.w,v5.w)2078; CHECK-NEXT: }2079; CHECK-NEXT: {2080; CHECK-NEXT: q0 = vcmp.gt(v1.w,v3.w)2081; CHECK-NEXT: }2082; CHECK-NEXT: {2083; CHECK-NEXT: v2.w = vlsr(v2.w,v3.w)2084; CHECK-NEXT: }2085; CHECK-NEXT: {2086; CHECK-NEXT: v31 = vmux(q0,v30,v2)2087; CHECK-NEXT: }2088; CHECK-NEXT: {2089; CHECK-NEXT: v0 = vmux(q1,v1,v31)2090; CHECK-NEXT: }2091; CHECK-NEXT: {2092; CHECK-NEXT: jumpr r312093; CHECK-NEXT: if (q3) vmem(r1+#0) = v02094; CHECK-NEXT: }2095 %v0 = load <16 x float>, ptr %a0, align 1282096 %v1 = fptoui <16 x float> %v0 to <16 x i32>2097 store <16 x i32> %v1, ptr %a1, align 1282098 ret void2099}2100 2101 2102attributes #0 = { "target-features"="+v68,+hvxv68,+hvx-length128b,+hvx-qfloat" }2103