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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; This code generates a concat_vectors with more than 2 inputs. Make sure4; that this compiles successfully.5; CHECK: lsr6 7target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"8target triple = "hexagon"9 10define void @fred(ptr %a0, ptr %a1, ptr %a2) #0 {11b0:12 %v1 = load i32, ptr %a0, align 413 %v2 = mul nsw i32 %v1, -1513714 %v3 = add nsw i32 0, %v215 %v4 = sub nsw i32 0, %v316 %v5 = load i32, ptr %a1, align 417 %v6 = insertelement <2 x i32> undef, i32 %v5, i32 118 %v7 = add nsw <2 x i32> %v6, %v619 %v8 = extractelement <2 x i32> %v7, i32 020 %v9 = insertelement <4 x i32> undef, i32 %v4, i32 221 %v10 = insertelement <4 x i32> %v9, i32 undef, i32 322 %v11 = add <4 x i32> %v10, %v1023 %v12 = sub <4 x i32> %v11, zeroinitializer24 %v13 = shufflevector <4 x i32> %v12, <4 x i32> undef, <8 x i32> <i32 undef, i32 0, i32 undef, i32 1, i32 undef, i32 2, i32 undef, i32 3>25 %v14 = shufflevector <8 x i32> undef, <8 x i32> %v13, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>26 %v15 = lshr <8 x i32> %v14, <i32 18, i32 18, i32 18, i32 18, i32 18, i32 18, i32 18, i32 18>27 %v16 = and <8 x i32> %v15, %v1428 %v17 = extractelement <8 x i32> %v16, i32 529 %v18 = getelementptr inbounds i8, ptr %a0, i32 %v1730 %v19 = load i8, ptr %v18, align 131 store i8 %v19, ptr %a2, align 132 ret void33}34 35attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }36