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1; RUN: llc -mtriple=hexagon -hvc-va-full-stores < %s | FileCheck %s2 3; Make sure we generate 3 aligned stores.4; CHECK: vmem({{.*}}) =5; CHECK: vmem({{.*}}) =6; CHECK: vmem({{.*}}) =7; CHECK-NOT: vmem8 9define void @f0(ptr %a0, i32 %a11, <64 x i16> %a22, <64 x i16> %a3) #0 {10b0:11 %v0 = add i32 %a11, 6412 %v1 = getelementptr i16, ptr %a0, i32 %v013 store <64 x i16> %a22, ptr %v1, align 214 %v33 = add i32 %a11, 12815 %v44 = getelementptr i16, ptr %a0, i32 %v3316 store <64 x i16> %a3, ptr %v44, align 217 ret void18}19 20attributes #0 = { nounwind "target-cpu"="hexagonv66" "target-features"="+hvxv66,+hvx-length128b" }21