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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; This used to crash because of calling isSafeToMoveBeforeInBB with source4; and target in different blocks.5; Check that this compiles successfully, and that two loads are created6; (for users in a different block).7 8target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1124:1024:1024-v2048:2048:2048"9target triple = "hexagon"10 11define dso_local <32 x i32> @f0(i32 %a0, i32 %a1, ptr %p) local_unnamed_addr #0 {12; CHECK-LABEL: f0:13; CHECK: = vmem({{.*}})14; CHECK: = vmem({{.*}})15b0:16 br label %b117 18b1: ; preds = %b019 %v0 = mul nsw i32 -4, %a020 %v1 = getelementptr inbounds i8, ptr %p, i32 %v021 %v2 = getelementptr inbounds i8, ptr %v1, i32 -6422 %v4 = load <16 x i32>, ptr %v2, align 6423 %v5 = getelementptr inbounds i8, ptr %v1, i32 6424 %v7 = load <16 x i32>, ptr %v5, align 6425 br label %b226 27b2: ; preds = %b2, %b128 %v8 = phi <32 x i32> [ poison, %b1 ], [ %v17, %b2 ]29 %v9 = phi i32 [ %a1, %b1 ], [ %v18, %b2 ]30 %v10 = tail call <16 x i32> @llvm.hexagon.V6.vlalignb(<16 x i32> poison, <16 x i32> %v4, i32 poison)31 %v11 = tail call <16 x i32> @llvm.hexagon.V6.valignb(<16 x i32> %v7, <16 x i32> poison, i32 poison)32 %v12 = tail call <32 x i32> @llvm.hexagon.V6.vmpyubv(<16 x i32> %v10, <16 x i32> poison)33 %v13 = tail call <32 x i32> @llvm.hexagon.V6.vmpyubv(<16 x i32> %v11, <16 x i32> poison)34 %v14 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v12)35 %v15 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v13)36 %v16 = tail call <32 x i32> @llvm.hexagon.V6.vadduhw(<16 x i32> %v14, <16 x i32> %v15)37 %v17 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v8, <32 x i32> %v16)38 %v18 = add nsw i32 %v9, -139 %v19 = icmp ugt i32 %v18, 140 br i1 %v19, label %b2, label %b341 42b3: ; preds = %b243 %v20 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v17, <32 x i32> %v16)44 ret <32 x i32> %v2045}46 47declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #148declare <16 x i32> @llvm.hexagon.V6.vlalignb(<16 x i32>, <16 x i32>, i32) #149declare <16 x i32> @llvm.hexagon.V6.valignb(<16 x i32>, <16 x i32>, i32) #150declare <32 x i32> @llvm.hexagon.V6.vmpyubv(<16 x i32>, <16 x i32>) #151declare <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32>, <32 x i32>) #152declare <32 x i32> @llvm.hexagon.V6.vadduhw(<16 x i32>, <16 x i32>) #153 54attributes #0 = { "target-features"="+hvx-length64b,+hvxv66,+v66,-long-calls" }55attributes #1 = { nounwind memory(none) }56