373 lines · plain
1; REQUIRES: hexagon-registered-target, silver2; This tests correct handling of register spills and fills of3; qf operands during register allocation.4 5; RUN: llc -mcpu=hexagonv79 -mattr=+hvx-length128b,+hvxv79,+hvx-ieee-fp,+hvx-qfloat,-long-calls -debug-only=handle-qfp %s 2>&1 -o - | FileCheck %s --check-prefixes V79-81,V796; RUN: llc -mcpu=hexagonv81 -mattr=+hvx-length128b,+hvxv81,+hvx-ieee-fp,+hvx-qfloat,-long-calls -debug-only=handle-qfp %s 2>&1 -o - | FileCheck %s --check-prefixes V79-81,V817 8; V79-81: Finding uses of: renamable $w{{[0-9]+}} = V6_vmpy_qf32_hf9; V79-81: Inserting after conv: [[VREG0:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG0]]10; V79-81-NEXT: Inserting after conv: [[VREG1:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG1]]11; V79-81: Finding uses of: renamable $w{{[0-9]+}} = V6_vmpy_qf32_hf12; V79-81: Inserting after conv: [[VREG2:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG2]]13; V79-81-NEXT: Inserting after conv: [[VREG3:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG3]]14; V79-81: Finding uses of: renamable $w{{[0-9]+}} = V6_vmpy_qf32_hf15; V79-81-DAG: Inserting after conv: [[VREG4:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG4]]16; V79-81-DAG: Inserting after conv: [[VREG5:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable [[VREG5]]17; V79-81-DAG: Inserting new instruction: $v{{[0-9]+}} = V6_vadd_sf killed renamable [[VREG2]], killed renamable [[VREG0]]18; V79-81-DAG: Inserting new instruction: $v{{[0-9]+}} = V6_vsub_sf killed renamable $v{{[0-9]+}}, killed renamable $v{{[0-9]+}}19;20; V79-81: Analyzing convert instruction: renamable [[VREG6:\$v[0-9]+]] = V6_vconv_hf_qf32 killed renamable $w{{[0-9]+}}21; V79: Inserting new instruction: [[VREG30:\$v[0-9]+]] = V6_vd022; V79-NEXT: Inserting new instruction: [[VREG7:\$v[0-9]+]] = V6_vadd_sf killed renamable [[VREG7]], killed [[VREG30]]23; V79: Inserting new instruction: [[VREG30]] = V6_vd024; V79-NEXT: Inserting new instruction: [[VREG8:\$v[0-9]+]] = V6_vadd_sf killed renamable [[VREG8]], killed [[VREG30]]25; V81: Inserting new instruction: [[VREG7:\$v[0-9]+]] = V6_vconv_qf32_sf killed renamable [[VREG7]]26; V81: Inserting new instruction: [[VREG8:\$v[0-9]+]] = V6_vconv_qf32_sf killed renamable [[VREG8]]27 28; V79-81: Analyzing convert instruction: renamable [[VREG9:\$v[0-9]+]] = V6_vconv_sf_qf32 killed renamable $v{{[0-9]+}}29; V79: Inserting new instruction: [[VREG30]] = V6_vd030; V79-NEXT: Inserting new instruction: [[VREG10:\$v[0-9]+]] = V6_vadd_sf killed renamable [[VREG10]], killed [[VREG30]]31; V81: Inserting new instruction: [[VREG8:\$v[0-9]+]] = V6_vconv_qf32_sf killed renamable [[VREG8]]32 33target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"34target triple = "hexagon"35 36@.str.1 = private unnamed_addr constant [9 x i8] c"0x%08lx \00", align 137@.str.3 = private unnamed_addr constant [173 x i8] c"/prj/qct/llvm/devops/aether/hexbuild/test_trees/MASTER/test/regress/features/hexagon/arch_v68/hvx_ieee_fp/hvx_ieee_fp_test.c:126 0 && \22ERROR: Failed to acquire HVX unit.\\n\22\00", align 138@__func__.main = private unnamed_addr constant [5 x i8] c"main\00", align 139@.str.5 = private unnamed_addr constant [33 x i8] c"half -3 converted to vhf = %.2f\0A\00", align 140@.str.6 = private unnamed_addr constant [35 x i8] c"uhalf 32k converted to vhf = %.2f\0A\00", align 141@.str.7 = private unnamed_addr constant [32 x i8] c"sf 0.5 converted to vhf = %.2f\0A\00", align 142@.str.8 = private unnamed_addr constant [32 x i8] c"vhf 4.0 conveted to ubyte = %d\0A\00", align 143@.str.9 = private unnamed_addr constant [32 x i8] c"vhf 2.0 conveted to uhalf = %d\0A\00", align 144@.str.10 = private unnamed_addr constant [30 x i8] c"byte 4 conveted to hf = %.2f\0A\00", align 145@.str.11 = private unnamed_addr constant [31 x i8] c"ubyte 4 conveted to hf = %.2f\0A\00", align 146@.str.12 = private unnamed_addr constant [27 x i8] c"hf -3 conveted to sf = %f\0A\00", align 147@.str.13 = private unnamed_addr constant [31 x i8] c"vhf 4.0 conveted to byte = %d\0A\00", align 148@.str.14 = private unnamed_addr constant [31 x i8] c"vhf 4.0 conveted to half = %d\0A\00", align 149@.str.16 = private unnamed_addr constant [33 x i8] c"max of hf 2.0 and hf 4.0 = %.2f\0A\00", align 150@.str.17 = private unnamed_addr constant [33 x i8] c"min of hf 2.0 and hf 4.0 = %.2f\0A\00", align 151@.str.18 = private unnamed_addr constant [32 x i8] c"max of sf 0.5 and sf 0.25 = %f\0A\00", align 152@.str.19 = private unnamed_addr constant [32 x i8] c"min of sf 0.5 and sf 0.25 = %f\0A\00", align 153@.str.21 = private unnamed_addr constant [25 x i8] c"negate of hf 4.0 = %.2f\0A\00", align 154@.str.22 = private unnamed_addr constant [23 x i8] c"abs of hf -6.0 = %.2f\0A\00", align 155@.str.23 = private unnamed_addr constant [23 x i8] c"negate of sf 0.5 = %f\0A\00", align 156@.str.24 = private unnamed_addr constant [22 x i8] c"abs of sf -0.25 = %f\0A\00", align 157@.str.26 = private unnamed_addr constant [32 x i8] c"hf add of 4.0 and -6.0 = %.2f\0A\00", align 158@.str.27 = private unnamed_addr constant [32 x i8] c"hf sub of 4.0 and -6.0 = %.2f\0A\00", align 159@.str.28 = private unnamed_addr constant [31 x i8] c"sf add of 0.5 and -0.25 = %f\0A\00", align 160@.str.29 = private unnamed_addr constant [31 x i8] c"sf sub of 0.5 and -0.25 = %f\0A\00", align 161@.str.30 = private unnamed_addr constant [36 x i8] c"sf add of hf 4.0 and hf -6.0 = %f\0A\00", align 162@.str.31 = private unnamed_addr constant [36 x i8] c"sf sub of hf 4.0 and hf -6.0 = %f\0A\00", align 163@.str.33 = private unnamed_addr constant [32 x i8] c"hf mpy of 4.0 and -6.0 = %.2f\0A\00", align 164@.str.34 = private unnamed_addr constant [35 x i8] c"hf accmpy of 4.0 and -6.0 = %.2f\0A\00", align 165@.str.35 = private unnamed_addr constant [36 x i8] c"sf mpy of hf 4.0 and hf -6.0 = %f\0A\00", align 166@.str.36 = private unnamed_addr constant [39 x i8] c"sf accmpy of hf 4.0 and hf -6.0 = %f\0A\00", align 167@.str.37 = private unnamed_addr constant [31 x i8] c"sf mpy of 0.5 and -0.25 = %f\0A\00", align 168@.str.39 = private unnamed_addr constant [25 x i8] c"w copy from sf 0.5 = %f\0A\00", align 169@str = private unnamed_addr constant [35 x i8] c"ERROR: Failed to acquire HVX unit.\00", align 170@str.40 = private unnamed_addr constant [25 x i8] c"\0AConversion intructions\0A\00", align 171@str.41 = private unnamed_addr constant [23 x i8] c"\0AMin/Max instructions\0A\00", align 172@str.42 = private unnamed_addr constant [23 x i8] c"\0Aabs/neg instructions\0A\00", align 173@str.43 = private unnamed_addr constant [23 x i8] c"\0Aadd/sub instructions\0A\00", align 174@str.44 = private unnamed_addr constant [24 x i8] c"\0Amultiply instructions\0A\00", align 175@str.45 = private unnamed_addr constant [19 x i8] c"\0Acopy instruction\0A\00", align 176 77declare dso_local void @print_vector_words(<32 x i32> noundef %x) local_unnamed_addr #078 79; Function Attrs: nofree nounwind optsize80declare dso_local noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #081 82; Function Attrs: nounwind optsize83define dso_local i32 @main(i32 noundef %argc, ptr nocapture noundef readnone %argv) local_unnamed_addr #1 {84entry:85 %call = tail call i32 @acquire_vector_unit(i8 noundef zeroext 0) #686 %tobool.not = icmp eq i32 %call, 087 br i1 %tobool.not, label %if.then, label %if.end88 89if.then: ; preds = %entry90 %puts = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)91 tail call void @_Assert(ptr noundef nonnull @.str.3, ptr noundef nonnull @__func__.main) #792 unreachable93 94if.end: ; preds = %entry95 tail call void @set_double_vector_mode() #696 %0 = tail call <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32 16384)97 %1 = tail call <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32 17408)98 %2 = tail call <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32 -14848)99 %3 = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1056964608)100 %4 = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1048576000)101 %5 = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 -1098907648)102 %6 = tail call <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32 -3)103 %7 = tail call <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32 32768)104 %puts147 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.40)105 %8 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.hf.h.128B(<32 x i32> %6)106 %bc.i = bitcast <32 x i32> %8 to <64 x half>107 %9 = extractelement <64 x half> %bc.i, i64 0108 %conv = fpext half %9 to double109 %call12 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, double noundef %conv) #6110 %10 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.hf.uh.128B(<32 x i32> %7)111 %bc.i153 = bitcast <32 x i32> %10 to <64 x half>112 %11 = extractelement <64 x half> %bc.i153, i64 0113 %conv14 = fpext half %11 to double114 %call15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, double noundef %conv14) #6115 %12 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.hf.sf.128B(<32 x i32> %3, <32 x i32> %3)116 %bc.i155 = bitcast <32 x i32> %12 to <64 x half>117 %13 = extractelement <64 x half> %bc.i155, i64 0118 %conv17 = fpext half %13 to double119 %call18 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, double noundef %conv17) #6120 %14 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.ub.hf.128B(<32 x i32> %1, <32 x i32> %1)121 %15 = bitcast <32 x i32> %14 to <128 x i8>122 %conv.i = extractelement <128 x i8> %15, i64 0123 %conv20 = zext i8 %conv.i to i32124 %call21 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, i32 noundef %conv20) #6125 %16 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.uh.hf.128B(<32 x i32> %0)126 %17 = bitcast <32 x i32> %16 to <64 x i16>127 %conv.i157 = extractelement <64 x i16> %17, i64 0128 %conv23 = sext i16 %conv.i157 to i32129 %call24 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.9, i32 noundef %conv23) #6130 %18 = tail call <64 x i32> @llvm.hexagon.V6.vcvt.hf.b.128B(<32 x i32> %14)131 %bc.i158 = bitcast <64 x i32> %18 to <128 x half>132 %19 = extractelement <128 x half> %bc.i158, i64 0133 %conv26 = fpext half %19 to double134 %call27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, double noundef %conv26) #6135 %20 = tail call <64 x i32> @llvm.hexagon.V6.vcvt.hf.ub.128B(<32 x i32> %14)136 %bc.i159 = bitcast <64 x i32> %20 to <128 x half>137 %21 = extractelement <128 x half> %bc.i159, i64 0138 %conv29 = fpext half %21 to double139 %call30 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, double noundef %conv29) #6140 %22 = tail call <64 x i32> @llvm.hexagon.V6.vcvt.sf.hf.128B(<32 x i32> %8)141 %bc.i161 = bitcast <64 x i32> %22 to <64 x float>142 %23 = extractelement <64 x float> %bc.i161, i64 0143 %conv32 = fpext float %23 to double144 %call33 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12, double noundef %conv32) #6145 %24 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.b.hf.128B(<32 x i32> %1, <32 x i32> %1)146 %25 = bitcast <32 x i32> %24 to <128 x i8>147 %conv.i162 = extractelement <128 x i8> %25, i64 0148 %conv35 = zext i8 %conv.i162 to i32149 %call36 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.13, i32 noundef %conv35) #6150 %26 = tail call <32 x i32> @llvm.hexagon.V6.vcvt.h.hf.128B(<32 x i32> %1)151 %27 = bitcast <32 x i32> %26 to <64 x i16>152 %conv.i163 = extractelement <64 x i16> %27, i64 0153 %conv38 = sext i16 %conv.i163 to i32154 %call39 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14, i32 noundef %conv38) #6155 %28 = tail call <32 x i32> @llvm.hexagon.V6.vfmax.hf.128B(<32 x i32> %0, <32 x i32> %1)156 %puts148 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.41)157 %bc.i164 = bitcast <32 x i32> %28 to <64 x half>158 %29 = extractelement <64 x half> %bc.i164, i64 0159 %conv42 = fpext half %29 to double160 %call43 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.16, double noundef %conv42) #6161 %30 = tail call <32 x i32> @llvm.hexagon.V6.vfmin.hf.128B(<32 x i32> %0, <32 x i32> %1)162 %bc.i166 = bitcast <32 x i32> %30 to <64 x half>163 %31 = extractelement <64 x half> %bc.i166, i64 0164 %conv45 = fpext half %31 to double165 %call46 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.17, double noundef %conv45) #6166 %32 = tail call <32 x i32> @llvm.hexagon.V6.vfmax.sf.128B(<32 x i32> %3, <32 x i32> %4)167 %bc.i168 = bitcast <32 x i32> %32 to <32 x float>168 %33 = extractelement <32 x float> %bc.i168, i64 0169 %conv48 = fpext float %33 to double170 %call49 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, double noundef %conv48) #6171 %34 = tail call <32 x i32> @llvm.hexagon.V6.vfmin.sf.128B(<32 x i32> %3, <32 x i32> %4)172 %bc.i169 = bitcast <32 x i32> %34 to <32 x float>173 %35 = extractelement <32 x float> %bc.i169, i64 0174 %conv51 = fpext float %35 to double175 %call52 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19, double noundef %conv51) #6176 %puts149 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.42)177 %36 = tail call <32 x i32> @llvm.hexagon.V6.vfneg.hf.128B(<32 x i32> %1)178 %bc.i170 = bitcast <32 x i32> %36 to <64 x half>179 %37 = extractelement <64 x half> %bc.i170, i64 0180 %conv55 = fpext half %37 to double181 %call56 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21, double noundef %conv55) #6182 %38 = tail call <32 x i32> @llvm.hexagon.V6.vabs.hf.128B(<32 x i32> %2)183 %bc.i172 = bitcast <32 x i32> %38 to <64 x half>184 %39 = extractelement <64 x half> %bc.i172, i64 0185 %conv58 = fpext half %39 to double186 %call59 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22, double noundef %conv58) #6187 %40 = tail call <32 x i32> @llvm.hexagon.V6.vfneg.sf.128B(<32 x i32> %3)188 %bc.i174 = bitcast <32 x i32> %40 to <32 x float>189 %41 = extractelement <32 x float> %bc.i174, i64 0190 %conv61 = fpext float %41 to double191 %call62 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.23, double noundef %conv61) #6192 %42 = tail call <32 x i32> @llvm.hexagon.V6.vabs.sf.128B(<32 x i32> %5)193 %bc.i175 = bitcast <32 x i32> %42 to <32 x float>194 %43 = extractelement <32 x float> %bc.i175, i64 0195 %conv64 = fpext float %43 to double196 %call65 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.24, double noundef %conv64) #6197 %puts150 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.43)198 %44 = tail call <32 x i32> @llvm.hexagon.V6.vadd.hf.hf.128B(<32 x i32> %1, <32 x i32> %2)199 %bc.i176 = bitcast <32 x i32> %44 to <64 x half>200 %45 = extractelement <64 x half> %bc.i176, i64 0201 %conv68 = fpext half %45 to double202 %call69 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.26, double noundef %conv68) #6203 %46 = tail call <32 x i32> @llvm.hexagon.V6.vsub.hf.hf.128B(<32 x i32> %1, <32 x i32> %2)204 %bc.i178 = bitcast <32 x i32> %46 to <64 x half>205 %47 = extractelement <64 x half> %bc.i178, i64 0206 %conv71 = fpext half %47 to double207 %call72 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.27, double noundef %conv71) #6208 %48 = tail call <32 x i32> @llvm.hexagon.V6.vadd.sf.sf.128B(<32 x i32> %3, <32 x i32> %5)209 %bc.i180 = bitcast <32 x i32> %48 to <32 x float>210 %49 = extractelement <32 x float> %bc.i180, i64 0211 %conv74 = fpext float %49 to double212 %call75 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.28, double noundef %conv74) #6213 %50 = tail call <32 x i32> @llvm.hexagon.V6.vsub.sf.sf.128B(<32 x i32> %3, <32 x i32> %5)214 %bc.i181 = bitcast <32 x i32> %50 to <32 x float>215 %51 = extractelement <32 x float> %bc.i181, i64 0216 %conv77 = fpext float %51 to double217 %call78 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.29, double noundef %conv77) #6218 %52 = tail call <64 x i32> @llvm.hexagon.V6.vadd.sf.hf.128B(<32 x i32> %1, <32 x i32> %2)219 %bc.i182 = bitcast <64 x i32> %52 to <64 x float>220 %53 = extractelement <64 x float> %bc.i182, i64 0221 %conv80 = fpext float %53 to double222 %call81 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.30, double noundef %conv80) #6223 %54 = tail call <64 x i32> @llvm.hexagon.V6.vsub.sf.hf.128B(<32 x i32> %1, <32 x i32> %2)224 %bc.i183 = bitcast <64 x i32> %54 to <64 x float>225 %55 = extractelement <64 x float> %bc.i183, i64 0226 %conv83 = fpext float %55 to double227 %call84 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.31, double noundef %conv83) #6228 %puts151 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.44)229 %56 = tail call <32 x i32> @llvm.hexagon.V6.vmpy.hf.hf.128B(<32 x i32> %1, <32 x i32> %2)230 %bc.i184 = bitcast <32 x i32> %56 to <64 x half>231 %57 = extractelement <64 x half> %bc.i184, i64 0232 %conv87 = fpext half %57 to double233 %call88 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.33, double noundef %conv87) #6234 %58 = tail call <32 x i32> @llvm.hexagon.V6.vmpy.hf.hf.acc.128B(<32 x i32> %56, <32 x i32> %1, <32 x i32> %2)235 %bc.i186 = bitcast <32 x i32> %58 to <64 x half>236 %59 = extractelement <64 x half> %bc.i186, i64 0237 %conv90 = fpext half %59 to double238 %call91 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.34, double noundef %conv90) #6239 %60 = tail call <64 x i32> @llvm.hexagon.V6.vmpy.sf.hf.128B(<32 x i32> %1, <32 x i32> %2)240 %bc.i188 = bitcast <64 x i32> %60 to <64 x float>241 %61 = extractelement <64 x float> %bc.i188, i64 0242 %conv93 = fpext float %61 to double243 %call94 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.35, double noundef %conv93) #6244 %62 = tail call <64 x i32> @llvm.hexagon.V6.vmpy.sf.hf.acc.128B(<64 x i32> %60, <32 x i32> %1, <32 x i32> %2)245 %bc.i189 = bitcast <64 x i32> %62 to <64 x float>246 %63 = extractelement <64 x float> %bc.i189, i64 0247 %conv96 = fpext float %63 to double248 %call97 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.36, double noundef %conv96) #6249 %64 = tail call <32 x i32> @llvm.hexagon.V6.vmpy.sf.sf.128B(<32 x i32> %3, <32 x i32> %5)250 %bc.i190 = bitcast <32 x i32> %64 to <32 x float>251 %65 = extractelement <32 x float> %bc.i190, i64 0252 %conv99 = fpext float %65 to double253 %call100 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.37, double noundef %conv99) #6254 %puts152 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.45)255 %66 = tail call <32 x i32> @llvm.hexagon.V6.vassign.fp.128B(<32 x i32> %3)256 %bc.i191 = bitcast <32 x i32> %66 to <32 x float>257 %67 = extractelement <32 x float> %bc.i191, i64 0258 %conv103 = fpext float %67 to double259 %call104 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.39, double noundef %conv103) #6260 ret i32 0261}262 263; Function Attrs: optsize264declare dso_local i32 @acquire_vector_unit(i8 noundef zeroext) local_unnamed_addr #2265 266; Function Attrs: noreturn nounwind optsize267declare dso_local void @_Assert(ptr noundef, ptr noundef) local_unnamed_addr #3268 269; Function Attrs: optsize270declare dso_local void @set_double_vector_mode(...) local_unnamed_addr #2271 272; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)273declare <32 x i32> @llvm.hexagon.V6.vcvt.hf.h.128B(<32 x i32>) #4274 275; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)276declare <32 x i32> @llvm.hexagon.V6.vcvt.hf.uh.128B(<32 x i32>) #4277 278; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)279declare <32 x i32> @llvm.hexagon.V6.vcvt.hf.sf.128B(<32 x i32>, <32 x i32>) #4280 281; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)282declare <32 x i32> @llvm.hexagon.V6.vcvt.ub.hf.128B(<32 x i32>, <32 x i32>) #4283 284; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)285declare <32 x i32> @llvm.hexagon.V6.vcvt.uh.hf.128B(<32 x i32>) #4286 287; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)288declare <64 x i32> @llvm.hexagon.V6.vcvt.hf.b.128B(<32 x i32>) #4289 290; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)291declare <64 x i32> @llvm.hexagon.V6.vcvt.hf.ub.128B(<32 x i32>) #4292 293; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)294declare <64 x i32> @llvm.hexagon.V6.vcvt.sf.hf.128B(<32 x i32>) #4295 296; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)297declare <32 x i32> @llvm.hexagon.V6.vcvt.b.hf.128B(<32 x i32>, <32 x i32>) #4298 299; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)300declare <32 x i32> @llvm.hexagon.V6.vcvt.h.hf.128B(<32 x i32>) #4301 302; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)303declare <32 x i32> @llvm.hexagon.V6.vfmax.hf.128B(<32 x i32>, <32 x i32>) #4304 305; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)306declare <32 x i32> @llvm.hexagon.V6.vfmin.hf.128B(<32 x i32>, <32 x i32>) #4307 308; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)309declare <32 x i32> @llvm.hexagon.V6.vfmax.sf.128B(<32 x i32>, <32 x i32>) #4310 311; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)312declare <32 x i32> @llvm.hexagon.V6.vfmin.sf.128B(<32 x i32>, <32 x i32>) #4313 314; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)315declare <32 x i32> @llvm.hexagon.V6.vfneg.hf.128B(<32 x i32>) #4316 317; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)318declare <32 x i32> @llvm.hexagon.V6.vabs.hf.128B(<32 x i32>) #4319 320; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)321declare <32 x i32> @llvm.hexagon.V6.vfneg.sf.128B(<32 x i32>) #4322 323; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)324declare <32 x i32> @llvm.hexagon.V6.vabs.sf.128B(<32 x i32>) #4325 326; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)327declare <32 x i32> @llvm.hexagon.V6.vadd.hf.hf.128B(<32 x i32>, <32 x i32>) #4328 329; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)330declare <32 x i32> @llvm.hexagon.V6.vsub.hf.hf.128B(<32 x i32>, <32 x i32>) #4331 332; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)333declare <32 x i32> @llvm.hexagon.V6.vadd.sf.sf.128B(<32 x i32>, <32 x i32>) #4334 335; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)336declare <32 x i32> @llvm.hexagon.V6.vsub.sf.sf.128B(<32 x i32>, <32 x i32>) #4337 338; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)339declare <64 x i32> @llvm.hexagon.V6.vadd.sf.hf.128B(<32 x i32>, <32 x i32>) #4340 341; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)342declare <64 x i32> @llvm.hexagon.V6.vsub.sf.hf.128B(<32 x i32>, <32 x i32>) #4343 344; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)345declare <32 x i32> @llvm.hexagon.V6.vmpy.hf.hf.128B(<32 x i32>, <32 x i32>) #4346 347; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)348declare <32 x i32> @llvm.hexagon.V6.vmpy.hf.hf.acc.128B(<32 x i32>, <32 x i32>, <32 x i32>) #4349 350; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)351declare <64 x i32> @llvm.hexagon.V6.vmpy.sf.hf.128B(<32 x i32>, <32 x i32>) #4352 353; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)354declare <64 x i32> @llvm.hexagon.V6.vmpy.sf.hf.acc.128B(<64 x i32>, <32 x i32>, <32 x i32>) #4355 356; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)357declare <32 x i32> @llvm.hexagon.V6.vmpy.sf.sf.128B(<32 x i32>, <32 x i32>) #4358 359; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)360declare <32 x i32> @llvm.hexagon.V6.vassign.fp.128B(<32 x i32>) #4361 362; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)363declare <32 x i32> @llvm.hexagon.V6.lvsplath.128B(i32) #4364 365; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)366declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32) #4367 368; Function Attrs: nofree nounwind369declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #5370 371; Function Attrs: nofree nounwind372declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #5373