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1; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b < %s | FileCheck %s2 3; CHECK: [[VREG1:v([0-9]+)]] = vsplat(r{{[0-9]*}})4; CHECK: [[VREG2:v([0-9]+)]] = vand([[VREG1]],v{{[0-9]+}})5; CHECK: q[[QREG:[0-9]+]] = vand([[VREG2]],r{{[0-9]+}})6 7define void @bitcast_i32_to_v32i1_full(ptr %in, ptr %out) {8entry:9 %load = load i32, ptr %in, align 410 %bitcast = bitcast i32 %load to <32 x i1>11 %e0 = extractelement <32 x i1> %bitcast, i32 012 %e1 = extractelement <32 x i1> %bitcast, i32 113 %z0 = zext i1 %e0 to i814 %z1 = zext i1 %e1 to i815 %ptr0 = getelementptr i8, ptr %out, i32 016 %ptr1 = getelementptr i8, ptr %out, i32 117 store i8 %z0, ptr %ptr0, align 118 store i8 %z1, ptr %ptr1, align 119 ret void20}21