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1; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b < %s | FileCheck %s2 3; CHECK: [[REG0:r[0-9]+]] = memw(r{{[0-9]+}}+#0)4; CHECK: [[VREG1:v([0-9]+)]] = vsplat([[REG0]])5; CHECK: [[VREG2:v([0-9]+)]] = vand([[VREG1]],v{{[0-9]+}})6; CHECK: q[[QREG:[0-9]+]] = vand([[VREG2]],r{{[0-9]+}})7 8define void @bitcast_v2i16_to_v32i1(ptr %in, ptr %out) {9entry:10 %load = load <2 x i16>, ptr %in, align 411 %bitcast = bitcast <2 x i16> %load to <32 x i1>12 %extract = extractelement <32 x i1> %bitcast, i32 013 %zext = zext i1 %extract to i814 store i8 %zext, ptr %out, align 115 ret void16}17