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1; RUN: llc -mtriple=hexagon -O2 -verify-machineinstrs < %s | FileCheck %s2 3; CHECK: .globl4 5target triple = "hexagon"6 7@g0 = private unnamed_addr constant [46 x i8] c"%x : Q6_R_mpyiacc_RR(INT32_MAX,0,INT32_MAX)\0A\00", align 18@g1 = private unnamed_addr constant [46 x i8] c"%x : Q6_R_mpyiacc_RR(INT32_MIN,1,INT32_MAX)\0A\00", align 19@g2 = private unnamed_addr constant [39 x i8] c"%x : Q6_R_mpyiacc_RR(-1,1,INT32_MAX)\0A\00", align 110@g3 = private unnamed_addr constant [38 x i8] c"%x : Q6_R_mpyiacc_RR(0,1,INT32_MAX)\0A\00", align 111@g4 = private unnamed_addr constant [38 x i8] c"%x : Q6_R_mpyiacc_RR(1,1,INT32_MAX)\0A\00", align 112@g5 = private unnamed_addr constant [46 x i8] c"%x : Q6_R_mpyiacc_RR(INT32_MAX,1,INT32_MAX)\0A\00", align 113@g6 = private unnamed_addr constant [54 x i8] c"%x : Q6_R_mpyiacc_RR(INT32_MIN,INT32_MAX,INT32_MAX)\0A\00", align 114@g7 = private unnamed_addr constant [47 x i8] c"%x : Q6_R_mpyiacc_RR(-1,INT32_MAX,INT32_MAX)\0A\00", align 115@g8 = private unnamed_addr constant [46 x i8] c"%x : Q6_R_mpyiacc_RR(0,INT32_MAX,INT32_MAX)\0A\00", align 116@g9 = private unnamed_addr constant [46 x i8] c"%x : Q6_R_mpyiacc_RR(1,INT32_MAX,INT32_MAX)\0A\00", align 117@g10 = private unnamed_addr constant [54 x i8] c"%x : Q6_R_mpyiacc_RR(INT32_MAX,INT32_MAX,INT32_MAX)\0A\00", align 118 19; Function Attrs: nounwind20declare i32 @f0(ptr nocapture readonly, ...) #021 22; Function Attrs: nounwind23define i32 @f1() #0 {24b0:25 %v0 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 0, i32 2147483647)26 %v1 = tail call i32 (ptr, ...) @f0(ptr @g0, i32 %v0) #227 %v2 = tail call i32 @llvm.hexagon.M2.maci(i32 -2147483648, i32 1, i32 2147483647)28 %v3 = tail call i32 (ptr, ...) @f0(ptr @g1, i32 %v2) #229 %v4 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 1, i32 2147483647)30 %v5 = tail call i32 (ptr, ...) @f0(ptr @g2, i32 %v4) #231 %v6 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 1, i32 2147483647)32 %v7 = tail call i32 (ptr, ...) @f0(ptr @g3, i32 %v6) #233 %v8 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 1, i32 2147483647)34 %v9 = tail call i32 (ptr, ...) @f0(ptr @g4, i32 %v8) #235 %v10 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 1, i32 2147483647)36 %v11 = tail call i32 (ptr, ...) @f0(ptr @g5, i32 %v10) #237 %v12 = tail call i32 @llvm.hexagon.M2.maci(i32 -2147483648, i32 2147483647, i32 2147483647)38 %v13 = tail call i32 (ptr, ...) @f0(ptr @g6, i32 %v12) #239 %v14 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 2147483647, i32 2147483647)40 %v15 = tail call i32 (ptr, ...) @f0(ptr @g7, i32 %v14) #241 %v16 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 2147483647, i32 2147483647)42 %v17 = tail call i32 (ptr, ...) @f0(ptr @g8, i32 %v16) #243 %v18 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 2147483647, i32 2147483647)44 %v19 = tail call i32 (ptr, ...) @f0(ptr @g9, i32 %v18) #245 %v20 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 2147483647, i32 2147483647)46 %v21 = tail call i32 (ptr, ...) @f0(ptr @g10, i32 %v20) #247 ret i32 048}49 50; Function Attrs: nounwind readnone51declare i32 @llvm.hexagon.M2.maci(i32, i32, i32) #152 53attributes #0 = { nounwind "target-cpu"="hexagonv55" }54attributes #1 = { nounwind readnone }55attributes #2 = { nounwind }56