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1; RUN: llc -mtriple=hexagon -O3 < %s2; REQUIRES: asserts3 4target triple = "hexagon-unknown--elf"5 6; Function Attrs: nounwind7define void @f0(i32 %a0, i32 %a1) #0 {8b0:9 %v0 = alloca [8 x i32], align 810 call void @llvm.memset.p0.i32(ptr align 8 %v0, i8 0, i32 32, i1 false)11 %v2 = icmp sgt i32 %a0, 012 br i1 %v2, label %b1, label %b1813 14b1: ; preds = %b015 %v3 = getelementptr inbounds [8 x i32], ptr %v0, i32 0, i32 616 %v4 = inttoptr i32 %a1 to ptr17 %v5 = add i32 %a0, -118 %v6 = icmp sgt i32 %v5, 019 br i1 %v6, label %b2, label %b1320 21b2: ; preds = %b122 %v8 = getelementptr [8 x i32], ptr %v0, i32 0, i32 123 %v9 = getelementptr [8 x i32], ptr %v0, i32 0, i32 224 %v10 = getelementptr [8 x i32], ptr %v0, i32 0, i32 325 %v11 = getelementptr [8 x i32], ptr %v0, i32 0, i32 426 %v12 = getelementptr [8 x i32], ptr %v0, i32 0, i32 527 %v13 = getelementptr [8 x i32], ptr %v0, i32 0, i32 628 %v14 = getelementptr [8 x i32], ptr %v0, i32 0, i32 729 %v15 = add i32 %a0, -230 %v16 = lshr i32 %v15, 131 %v17 = add i32 %v16, 132 %v18 = urem i32 %v17, 233 %v19 = icmp ne i32 %v18, 034 %v20 = add i32 %v5, -235 %v21 = icmp ugt i32 %v17, 136 br i1 %v21, label %b3, label %b737 38b3: ; preds = %b239 br label %b440 41b4: ; preds = %b22, %b342 %v22 = phi i32 [ 0, %b3 ], [ %v124, %b22 ]43 %v23 = phi i32 [ 0, %b3 ], [ %v136, %b22 ]44 %v24 = mul nsw i32 %v22, 445 %v25 = add nsw i32 %v24, 26843545646 %v26 = inttoptr i32 %v25 to ptr47 store volatile i32 %a1, ptr %v26, align 4, !tbaa !048 %v27 = load i32, ptr %v0, align 8, !tbaa !049 store volatile i32 %v27, ptr %v4, align 4, !tbaa !050 %v28 = load i32, ptr %v8, align 4, !tbaa !051 store volatile i32 %v28, ptr %v4, align 4, !tbaa !052 %v29 = load i32, ptr %v9, align 8, !tbaa !053 store volatile i32 %v29, ptr %v4, align 4, !tbaa !054 %v30 = load i32, ptr %v10, align 4, !tbaa !055 store volatile i32 %v30, ptr %v4, align 4, !tbaa !056 %v31 = load i32, ptr %v11, align 8, !tbaa !057 store volatile i32 %v31, ptr %v4, align 4, !tbaa !058 %v32 = load i32, ptr %v12, align 4, !tbaa !059 store volatile i32 %v32, ptr %v4, align 4, !tbaa !060 %v33 = load i32, ptr %v13, align 8, !tbaa !061 store volatile i32 %v33, ptr %v4, align 4, !tbaa !062 %v34 = load i32, ptr %v14, align 4, !tbaa !063 store volatile i32 %v34, ptr %v4, align 4, !tbaa !064 %v35 = icmp eq i32 %v23, 065 br i1 %v35, label %b19, label %b2066 67b5: ; preds = %b2268 %v36 = phi i32 [ %v136, %b22 ]69 %v37 = phi i32 [ %v124, %b22 ]70 br i1 %v19, label %b6, label %b1271 72b6: ; preds = %b573 br label %b774 75b7: ; preds = %b6, %b276 %v38 = phi i32 [ 0, %b2 ], [ %v36, %b6 ]77 %v39 = phi i32 [ 0, %b2 ], [ %v37, %b6 ]78 br label %b879 80b8: ; preds = %b10, %b781 %v40 = phi i32 [ %v39, %b7 ], [ %v54, %b10 ]82 %v41 = phi i32 [ %v38, %b7 ], [ %v66, %b10 ]83 %v42 = mul nsw i32 %v40, 484 %v43 = add nsw i32 %v42, 26843545685 %v44 = inttoptr i32 %v43 to ptr86 store volatile i32 %a1, ptr %v44, align 4, !tbaa !087 %v45 = load i32, ptr %v0, align 8, !tbaa !088 store volatile i32 %v45, ptr %v4, align 4, !tbaa !089 %v46 = load i32, ptr %v8, align 4, !tbaa !090 store volatile i32 %v46, ptr %v4, align 4, !tbaa !091 %v47 = load i32, ptr %v9, align 8, !tbaa !092 store volatile i32 %v47, ptr %v4, align 4, !tbaa !093 %v48 = load i32, ptr %v10, align 4, !tbaa !094 store volatile i32 %v48, ptr %v4, align 4, !tbaa !095 %v49 = load i32, ptr %v11, align 8, !tbaa !096 store volatile i32 %v49, ptr %v4, align 4, !tbaa !097 %v50 = load i32, ptr %v12, align 4, !tbaa !098 store volatile i32 %v50, ptr %v4, align 4, !tbaa !099 %v51 = load i32, ptr %v13, align 8, !tbaa !0100 store volatile i32 %v51, ptr %v4, align 4, !tbaa !0101 %v52 = load i32, ptr %v14, align 4, !tbaa !0102 store volatile i32 %v52, ptr %v4, align 4, !tbaa !0103 %v53 = icmp eq i32 %v41, 0104 br i1 %v53, label %b9, label %b10105 106b9: ; preds = %b8107 store i32 0, ptr %v3, align 8, !tbaa !0108 br label %b10109 110b10: ; preds = %b9, %b8111 %v54 = phi i32 [ 3, %b9 ], [ %v40, %b8 ]112 %v55 = mul nsw i32 %v54, 4113 %v56 = add nsw i32 %v55, 268435456114 %v57 = inttoptr i32 %v56 to ptr115 store volatile i32 %a1, ptr %v57, align 4, !tbaa !0116 %v58 = load i32, ptr %v0, align 8, !tbaa !0117 store volatile i32 %v58, ptr %v4, align 4, !tbaa !0118 %v59 = load i32, ptr %v8, align 4, !tbaa !0119 store volatile i32 %v59, ptr %v4, align 4, !tbaa !0120 %v60 = load i32, ptr %v9, align 8, !tbaa !0121 store volatile i32 %v60, ptr %v4, align 4, !tbaa !0122 %v61 = load i32, ptr %v10, align 4, !tbaa !0123 store volatile i32 %v61, ptr %v4, align 4, !tbaa !0124 %v62 = load i32, ptr %v11, align 8, !tbaa !0125 store volatile i32 %v62, ptr %v4, align 4, !tbaa !0126 %v63 = load i32, ptr %v12, align 4, !tbaa !0127 store volatile i32 %v63, ptr %v4, align 4, !tbaa !0128 %v64 = load i32, ptr %v13, align 8, !tbaa !0129 store volatile i32 %v64, ptr %v4, align 4, !tbaa !0130 %v65 = load i32, ptr %v14, align 4, !tbaa !0131 store volatile i32 %v65, ptr %v4, align 4, !tbaa !0132 %v66 = add nsw i32 %v41, 2133 %v67 = icmp slt i32 %v66, %v5134 br i1 %v67, label %b8, label %b11135 136b11: ; preds = %b10137 %v68 = phi i32 [ %v66, %b10 ]138 %v69 = phi i32 [ %v54, %b10 ]139 br label %b12140 141b12: ; preds = %b11, %b5142 %v70 = phi i32 [ %v36, %b5 ], [ %v68, %b11 ]143 %v71 = phi i32 [ %v37, %b5 ], [ %v69, %b11 ]144 %v72 = icmp eq i32 %v70, %a0145 br i1 %v72, label %b18, label %b13146 147b13: ; preds = %b12, %b1148 %v73 = phi i32 [ 0, %b1 ], [ %v70, %b12 ]149 %v74 = phi i32 [ 0, %b1 ], [ %v71, %b12 ]150 %v76 = getelementptr [8 x i32], ptr %v0, i32 0, i32 1151 %v77 = getelementptr [8 x i32], ptr %v0, i32 0, i32 2152 %v78 = getelementptr [8 x i32], ptr %v0, i32 0, i32 3153 %v79 = getelementptr [8 x i32], ptr %v0, i32 0, i32 4154 %v80 = getelementptr [8 x i32], ptr %v0, i32 0, i32 5155 %v81 = getelementptr [8 x i32], ptr %v0, i32 0, i32 6156 %v82 = getelementptr [8 x i32], ptr %v0, i32 0, i32 7157 br label %b14158 159b14: ; preds = %b16, %b13160 %v83 = phi i32 [ %v74, %b13 ], [ %v86, %b16 ]161 %v84 = phi i32 [ %v73, %b13 ], [ %v98, %b16 ]162 %v85 = icmp eq i32 %v84, 1163 br i1 %v85, label %b15, label %b16164 165b15: ; preds = %b14166 store i32 0, ptr %v3, align 8, !tbaa !0167 br label %b16168 169b16: ; preds = %b15, %b14170 %v86 = phi i32 [ 3, %b15 ], [ %v83, %b14 ]171 %v87 = mul nsw i32 %v86, 4172 %v88 = add nsw i32 %v87, 268435456173 %v89 = inttoptr i32 %v88 to ptr174 store volatile i32 %a1, ptr %v89, align 4, !tbaa !0175 %v90 = load i32, ptr %v0, align 8, !tbaa !0176 store volatile i32 %v90, ptr %v4, align 4, !tbaa !0177 %v91 = load i32, ptr %v76, align 4, !tbaa !0178 store volatile i32 %v91, ptr %v4, align 4, !tbaa !0179 %v92 = load i32, ptr %v77, align 8, !tbaa !0180 store volatile i32 %v92, ptr %v4, align 4, !tbaa !0181 %v93 = load i32, ptr %v78, align 4, !tbaa !0182 store volatile i32 %v93, ptr %v4, align 4, !tbaa !0183 %v94 = load i32, ptr %v79, align 8, !tbaa !0184 store volatile i32 %v94, ptr %v4, align 4, !tbaa !0185 %v95 = load i32, ptr %v80, align 4, !tbaa !0186 store volatile i32 %v95, ptr %v4, align 4, !tbaa !0187 %v96 = load i32, ptr %v81, align 8, !tbaa !0188 store volatile i32 %v96, ptr %v4, align 4, !tbaa !0189 %v97 = load i32, ptr %v82, align 4, !tbaa !0190 store volatile i32 %v97, ptr %v4, align 4, !tbaa !0191 %v98 = add nsw i32 %v84, 1192 %v99 = icmp eq i32 %v98, %a0193 br i1 %v99, label %b17, label %b14194 195b17: ; preds = %b16196 br label %b18197 198b18: ; preds = %b17, %b12, %b0199 ret void200 201b19: ; preds = %b4202 store i32 0, ptr %v3, align 8, !tbaa !0203 br label %b20204 205b20: ; preds = %b19, %b4206 %v100 = phi i32 [ 3, %b19 ], [ %v22, %b4 ]207 %v101 = mul nsw i32 %v100, 4208 %v102 = add nsw i32 %v101, 268435456209 %v103 = inttoptr i32 %v102 to ptr210 store volatile i32 %a1, ptr %v103, align 4, !tbaa !0211 %v104 = load i32, ptr %v0, align 8, !tbaa !0212 store volatile i32 %v104, ptr %v4, align 4, !tbaa !0213 %v105 = load i32, ptr %v8, align 4, !tbaa !0214 store volatile i32 %v105, ptr %v4, align 4, !tbaa !0215 %v106 = load i32, ptr %v9, align 8, !tbaa !0216 store volatile i32 %v106, ptr %v4, align 4, !tbaa !0217 %v107 = load i32, ptr %v10, align 4, !tbaa !0218 store volatile i32 %v107, ptr %v4, align 4, !tbaa !0219 %v108 = load i32, ptr %v11, align 8, !tbaa !0220 store volatile i32 %v108, ptr %v4, align 4, !tbaa !0221 %v109 = load i32, ptr %v12, align 4, !tbaa !0222 store volatile i32 %v109, ptr %v4, align 4, !tbaa !0223 %v110 = load i32, ptr %v13, align 8, !tbaa !0224 store volatile i32 %v110, ptr %v4, align 4, !tbaa !0225 %v111 = load i32, ptr %v14, align 4, !tbaa !0226 store volatile i32 %v111, ptr %v4, align 4, !tbaa !0227 %v112 = add nsw i32 %v23, 2228 %v113 = mul nsw i32 %v100, 4229 %v114 = add nsw i32 %v113, 268435456230 %v115 = inttoptr i32 %v114 to ptr231 store volatile i32 %a1, ptr %v115, align 4, !tbaa !0232 %v116 = load i32, ptr %v0, align 8, !tbaa !0233 store volatile i32 %v116, ptr %v4, align 4, !tbaa !0234 %v117 = load i32, ptr %v8, align 4, !tbaa !0235 store volatile i32 %v117, ptr %v4, align 4, !tbaa !0236 %v118 = load i32, ptr %v9, align 8, !tbaa !0237 store volatile i32 %v118, ptr %v4, align 4, !tbaa !0238 %v119 = load i32, ptr %v10, align 4, !tbaa !0239 store volatile i32 %v119, ptr %v4, align 4, !tbaa !0240 %v120 = load i32, ptr %v11, align 8, !tbaa !0241 store volatile i32 %v120, ptr %v4, align 4, !tbaa !0242 %v121 = load i32, ptr %v12, align 4, !tbaa !0243 store volatile i32 %v121, ptr %v4, align 4, !tbaa !0244 %v122 = load i32, ptr %v13, align 8, !tbaa !0245 store volatile i32 %v122, ptr %v4, align 4, !tbaa !0246 %v123 = load i32, ptr %v14, align 4, !tbaa !0247 store volatile i32 %v123, ptr %v4, align 4, !tbaa !0248 br i1 false, label %b21, label %b22249 250b21: ; preds = %b20251 store i32 0, ptr %v3, align 8, !tbaa !0252 br label %b22253 254b22: ; preds = %b21, %b20255 %v124 = phi i32 [ 3, %b21 ], [ %v100, %b20 ]256 %v125 = mul nsw i32 %v124, 4257 %v126 = add nsw i32 %v125, 268435456258 %v127 = inttoptr i32 %v126 to ptr259 store volatile i32 %a1, ptr %v127, align 4, !tbaa !0260 %v128 = load i32, ptr %v0, align 8, !tbaa !0261 store volatile i32 %v128, ptr %v4, align 4, !tbaa !0262 %v129 = load i32, ptr %v8, align 4, !tbaa !0263 store volatile i32 %v129, ptr %v4, align 4, !tbaa !0264 %v130 = load i32, ptr %v9, align 8, !tbaa !0265 store volatile i32 %v130, ptr %v4, align 4, !tbaa !0266 %v131 = load i32, ptr %v10, align 4, !tbaa !0267 store volatile i32 %v131, ptr %v4, align 4, !tbaa !0268 %v132 = load i32, ptr %v11, align 8, !tbaa !0269 store volatile i32 %v132, ptr %v4, align 4, !tbaa !0270 %v133 = load i32, ptr %v12, align 4, !tbaa !0271 store volatile i32 %v133, ptr %v4, align 4, !tbaa !0272 %v134 = load i32, ptr %v13, align 8, !tbaa !0273 store volatile i32 %v134, ptr %v4, align 4, !tbaa !0274 %v135 = load i32, ptr %v14, align 4, !tbaa !0275 store volatile i32 %v135, ptr %v4, align 4, !tbaa !0276 %v136 = add nsw i32 %v112, 2277 %v137 = icmp slt i32 %v136, %v20278 br i1 %v137, label %b4, label %b5279}280 281; Function Attrs: nounwind282define void @f1(i32 %a0, i32 %a1) #0 {283b0:284 tail call void @f0(i32 %a0, i32 %a1)285 ret void286}287 288; Function Attrs: argmemonly nounwind289declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1) #1290 291attributes #0 = { nounwind }292attributes #1 = { argmemonly nounwind }293 294!0 = !{!1, !1, i64 0}295!1 = !{!"long", !2, i64 0}296!2 = !{!"omnipotent char", !3, i64 0}297!3 = !{!"Simple C/C++ TBAA"}298