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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; Testing for these 6 variants of circular load:3;   Q6_circ_load_update_B(inputLR, pDelay, -1, nConvLength, 4);4;   Q6_circ_load_update_D(inputLR, pDelay, -1, nConvLength, 4);5;   Q6_circ_load_update_H(inputLR, pDelay, -1, nConvLength, 4);6;   Q6_circ_load_update_UB(inputLR, pDelay, -1, nConvLength, 4);7;   Q6_circ_load_update_UH(inputLR, pDelay, -1, nConvLength, 4);8;   Q6_circ_load_update_W(inputLR, pDelay, -1, nConvLength, 4);9; producing these:10;   r0 = memb(r1++#-1:circ(m0))11;   r3:2 = memd(r1++#-8:circ(m0))12;   r0 = memh(r1++#-2:circ(m0))13;   r0 = memub(r1++#-1:circ(m0))14;   r0 = memuh(r1++#-2:circ(m0))15;   r0 = memw(r1++#-4:circ(m0))16 17target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"18target triple = "hexagon"19 20define signext i8 @foo1(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {21entry:22  %inputLR = alloca i8, align 123  %conv = zext i16 %filtMemLen to i3224  %shr1 = lshr i32 %conv, 125  %idxprom = sext i16 %filtMemIndex to i3226  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom27  %or = or i32 %shr1, 3355443228; CHECK: = memb(r{{[0-9]+}}++#-1:circ(m{{[0-1]}}))29  %0 = call ptr @llvm.hexagon.circ.ldb(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -1)30  %1 = load i8, ptr %inputLR, align 1, !tbaa !031  ret i8 %132}33 34declare ptr @llvm.hexagon.circ.ldb(ptr, ptr, i32, i32) nounwind35 36define i64 @foo2(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {37entry:38  %inputLR = alloca i64, align 839  %conv = zext i16 %filtMemLen to i3240  %shr1 = lshr i32 %conv, 141  %idxprom = sext i16 %filtMemIndex to i3242  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom43  %shl = shl nuw nsw i32 %shr1, 344  %or = or i32 %shl, 8388608045; CHECK: = memd(r{{[0-9]+}}++#-8:circ(m{{[0-1]}}))46  %0 = call ptr @llvm.hexagon.circ.ldd(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -8)47  %1 = load i64, ptr %inputLR, align 8, !tbaa !048  ret i64 %149}50 51declare ptr @llvm.hexagon.circ.ldd(ptr, ptr, i32, i32) nounwind52 53define signext i16 @foo3(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {54entry:55  %inputLR = alloca i16, align 256  %conv = zext i16 %filtMemLen to i3257  %shr1 = and i32 %conv, 6553458  %idxprom = sext i16 %filtMemIndex to i3259  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom60  %or = or i32 %shr1, 5033164861; CHECK: = memh(r{{[0-9]+}}++#-2:circ(m{{[0-1]}}))62  %0 = call ptr @llvm.hexagon.circ.ldh(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -2)63  %1 = load i16, ptr %inputLR, align 2, !tbaa !264  ret i16 %165}66 67declare ptr @llvm.hexagon.circ.ldh(ptr, ptr, i32, i32) nounwind68 69define zeroext i8 @foo4(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {70entry:71  %inputLR = alloca i8, align 172  %conv = zext i16 %filtMemLen to i3273  %shr1 = lshr i32 %conv, 174  %idxprom = sext i16 %filtMemIndex to i3275  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom76  %or = or i32 %shr1, 3355443277; CHECK: = memub(r{{[0-9]+}}++#-1:circ(m{{[0-1]}}))78  %0 = call ptr @llvm.hexagon.circ.ldub(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -1)79  %1 = load i8, ptr %inputLR, align 1, !tbaa !080  ret i8 %181}82 83declare ptr @llvm.hexagon.circ.ldub(ptr, ptr, i32, i32) nounwind84 85define zeroext i16 @foo5(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {86entry:87  %inputLR = alloca i16, align 288  %conv = zext i16 %filtMemLen to i3289  %shr1 = and i32 %conv, 6553490  %idxprom = sext i16 %filtMemIndex to i3291  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom92  %or = or i32 %shr1, 5033164893; CHECK: = memuh(r{{[0-9]+}}++#-2:circ(m{{[0-1]}}))94  %0 = call ptr @llvm.hexagon.circ.lduh(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -2)95  %1 = load i16, ptr %inputLR, align 2, !tbaa !296  ret i16 %197}98 99declare ptr @llvm.hexagon.circ.lduh(ptr, ptr, i32, i32) nounwind100 101define i32 @foo6(i16 zeroext %filtMemLen, ptr %filtMemLR, i16 signext %filtMemIndex) nounwind {102entry:103  %inputLR = alloca i32, align 4104  %conv = zext i16 %filtMemLen to i32105  %shr1 = lshr i32 %conv, 1106  %idxprom = sext i16 %filtMemIndex to i32107  %arrayidx = getelementptr inbounds i16, ptr %filtMemLR, i32 %idxprom108  %shl = shl nuw nsw i32 %shr1, 2109  %or = or i32 %shl, 67108864110; CHECK: = memw(r{{[0-9]+}}++#-4:circ(m{{[0-1]}}))111  %0 = call ptr @llvm.hexagon.circ.ldw(ptr %arrayidx, ptr %inputLR, i32 %or, i32 -4)112  %1 = load i32, ptr %inputLR, align 4, !tbaa !3113  ret i32 %1114}115 116declare ptr @llvm.hexagon.circ.ldw(ptr, ptr, i32, i32) nounwind117 118!0 = !{!"omnipotent char", !1}119!1 = !{!"Simple C/C++ TBAA"}120!2 = !{!"short", !0}121!3 = !{!"int", !0}122