295 lines · plain
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; CHECK-LABEL: test14; CHECK: m[[REG1:([0-1])]] = r05; CHECK: cs[[REG1]] = r16; CHECK: = memub(r1++#4:circ(m[[REG1]])7define zeroext i8 @test1(i32 %mod, ptr %start) local_unnamed_addr #0 {8entry:9 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrub.pci(ptr %start, i32 4, i32 %mod, ptr %start)10 %1 = extractvalue { i32, ptr } %0, 011 %conv = trunc i32 %1 to i812 ret i8 %conv13}14 15declare { i32, ptr } @llvm.hexagon.L2.loadrub.pci(ptr, i32, i32, ptr nocapture) #116 17; CHECK-LABEL: test218; CHECK: m[[REG2:([0-1])]] = r019; CHECK: cs[[REG2]] = r120; CHECK: = memb(r1++#4:circ(m[[REG2]])21define zeroext i8 @test2(i32 %mod, ptr %start) local_unnamed_addr #0 {22entry:23 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrb.pci(ptr %start, i32 4, i32 %mod, ptr %start)24 %1 = extractvalue { i32, ptr } %0, 025 %conv = trunc i32 %1 to i826 ret i8 %conv27}28 29declare { i32, ptr } @llvm.hexagon.L2.loadrb.pci(ptr, i32, i32, ptr nocapture) #130 31; CHECK-LABEL: test332; CHECK: m[[REG3:([0-1])]] = r033; CHECK: cs[[REG3]] = r134; CHECK: = memuh(r1++#4:circ(m[[REG3]])35define zeroext i16 @test3(i32 %mod, ptr %start) local_unnamed_addr #0 {36entry:37 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadruh.pci(ptr %start, i32 4, i32 %mod, ptr %start)38 %1 = extractvalue { i32, ptr } %0, 039 %conv = trunc i32 %1 to i1640 ret i16 %conv41}42 43declare { i32, ptr } @llvm.hexagon.L2.loadruh.pci(ptr, i32, i32, ptr nocapture) #144 45; CHECK-LABEL: test446; CHECK: m[[REG4:([0-1])]] = r047; CHECK: cs[[REG4]] = r148; CHECK: = memh(r1++#4:circ(m[[REG4]])49define signext i16 @test4(i32 %mod, ptr %start) local_unnamed_addr #0 {50entry:51 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrh.pci(ptr %start, i32 4, i32 %mod, ptr %start)52 %1 = extractvalue { i32, ptr } %0, 053 %conv = trunc i32 %1 to i1654 ret i16 %conv55}56 57declare { i32, ptr } @llvm.hexagon.L2.loadrh.pci(ptr, i32, i32, ptr nocapture) #158 59; CHECK-LABEL: test560; CHECK: m[[REG5:([0-1])]] = r061; CHECK: cs[[REG5]] = r162; CHECK: = memw(r1++#4:circ(m[[REG5]])63define i32 @test5(i32 %mod, ptr %start) local_unnamed_addr #0 {64entry:65 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadri.pci(ptr %start, i32 4, i32 %mod, ptr %start)66 %1 = extractvalue { i32, ptr } %0, 067 ret i32 %168}69 70declare { i32, ptr } @llvm.hexagon.L2.loadri.pci(ptr, i32, i32, ptr nocapture) #171 72; CHECK-LABEL: test673; CHECK: m[[REG6:([0-1])]] = r074; CHECK: cs[[REG6]] = r175; CHECK: = memd(r1++#8:circ(m[[REG6]])76define i64 @test6(i32 %mod, ptr %start) local_unnamed_addr #0 {77entry:78 %0 = tail call { i64, ptr } @llvm.hexagon.L2.loadrd.pci(ptr %start, i32 8, i32 %mod, ptr %start)79 %1 = extractvalue { i64, ptr } %0, 080 ret i64 %181}82 83declare { i64, ptr } @llvm.hexagon.L2.loadrd.pci(ptr, i32, i32, ptr nocapture) #184 85; CHECK-LABEL: test786; CHECK: m[[REG7:([0-1])]] = r087; CHECK: cs[[REG7]] = r188; CHECK: = memub(r1++I:circ(m[[REG7]])89define zeroext i8 @test7(i32 %mod, ptr %start) local_unnamed_addr #0 {90entry:91 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrub.pcr(ptr %start, i32 %mod, ptr %start)92 %1 = extractvalue { i32, ptr } %0, 093 %conv = trunc i32 %1 to i894 ret i8 %conv95}96 97declare { i32, ptr } @llvm.hexagon.L2.loadrub.pcr(ptr, i32, ptr nocapture) #198 99; CHECK-LABEL: test8100; CHECK: m[[REG8:([0-1])]] = r0101; CHECK: cs[[REG8]] = r1102; CHECK: = memb(r1++I:circ(m[[REG8]])103define zeroext i8 @test8(i32 %mod, ptr %start) local_unnamed_addr #0 {104entry:105 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrb.pcr(ptr %start, i32 %mod, ptr %start)106 %1 = extractvalue { i32, ptr } %0, 0107 %conv = trunc i32 %1 to i8108 ret i8 %conv109}110 111declare { i32, ptr } @llvm.hexagon.L2.loadrb.pcr(ptr, i32, ptr nocapture) #1112 113; CHECK-LABEL: test9114; CHECK: m[[REG9:([0-1])]] = r0115; CHECK: cs[[REG9]] = r1116; CHECK: = memuh(r1++I:circ(m[[REG9]])117define zeroext i16 @test9(i32 %mod, ptr %start) local_unnamed_addr #0 {118entry:119 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadruh.pcr(ptr %start, i32 %mod, ptr %start)120 %1 = extractvalue { i32, ptr } %0, 0121 %conv = trunc i32 %1 to i16122 ret i16 %conv123}124 125declare { i32, ptr } @llvm.hexagon.L2.loadruh.pcr(ptr, i32, ptr nocapture) #1126 127; CHECK-LABEL: test10128; CHECK: m[[REG10:([0-1])]] = r0129; CHECK: cs[[REG10]] = r1130; CHECK: = memh(r1++I:circ(m[[REG10]])131define signext i16 @test10(i32 %mod, ptr %start) local_unnamed_addr #0 {132entry:133 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadrh.pcr(ptr %start, i32 %mod, ptr %start)134 %1 = extractvalue { i32, ptr } %0, 0135 %conv = trunc i32 %1 to i16136 ret i16 %conv137}138 139declare { i32, ptr } @llvm.hexagon.L2.loadrh.pcr(ptr, i32, ptr nocapture) #1140 141; CHECK-LABEL: test11142; CHECK: m[[REG11:([0-1])]] = r0143; CHECK: cs[[REG11]] = r1144; CHECK: = memw(r1++I:circ(m[[REG11]])145define i32 @test11(i32 %mod, ptr %start) local_unnamed_addr #0 {146entry:147 %0 = tail call { i32, ptr } @llvm.hexagon.L2.loadri.pcr(ptr %start, i32 %mod, ptr %start)148 %1 = extractvalue { i32, ptr } %0, 0149 ret i32 %1150}151 152declare { i32, ptr } @llvm.hexagon.L2.loadri.pcr(ptr, i32, ptr nocapture) #1153 154; CHECK-LABEL: test12155; CHECK: m[[REG12:([0-1])]] = r0156; CHECK: cs[[REG12]] = r1157; CHECK: = memd(r1++I:circ(m[[REG12]])158define i64 @test12(i32 %mod, ptr %start) local_unnamed_addr #0 {159entry:160 %0 = tail call { i64, ptr } @llvm.hexagon.L2.loadrd.pcr(ptr %start, i32 %mod, ptr %start)161 %1 = extractvalue { i64, ptr } %0, 0162 ret i64 %1163}164 165declare { i64, ptr } @llvm.hexagon.L2.loadrd.pcr(ptr, i32, ptr nocapture) #1166 167; CHECK-LABEL: test13168; CHECK: m[[REG13:([0-1])]] = r0169; CHECK: cs[[REG13]] = r1170; CHECK: memb(r1++#4:circ(m[[REG13]])) =171define void @test13(i32 %mod, ptr %start, i8 zeroext %v) local_unnamed_addr #0 {172entry:173 %conv = zext i8 %v to i32174 %0 = tail call ptr @llvm.hexagon.S2.storerb.pci(ptr %start, i32 4, i32 %mod, i32 %conv, ptr %start)175 ret void176}177 178declare ptr @llvm.hexagon.S2.storerb.pci(ptr, i32, i32, i32, ptr nocapture) #1179 180; CHECK-LABEL: test14181; CHECK: m[[REG14:([0-1])]] = r0182; CHECK: cs[[REG14]] = r1183; CHECK: memh(r1++#4:circ(m[[REG14]])) =184define void @test14(i32 %mod, ptr %start, i16 signext %v) local_unnamed_addr #0 {185entry:186 %conv = sext i16 %v to i32187 %0 = tail call ptr @llvm.hexagon.S2.storerh.pci(ptr %start, i32 4, i32 %mod, i32 %conv, ptr %start)188 ret void189}190 191declare ptr @llvm.hexagon.S2.storerh.pci(ptr, i32, i32, i32, ptr nocapture) #1192 193; CHECK-LABEL: test15194; CHECK: m[[REG15:([0-1])]] = r0195; CHECK: cs[[REG15]] = r1196; CHECK: memh(r1++#4:circ(m[[REG15]])) = r{{[0-9]+}}.h197define void @test15(i32 %mod, ptr %start, i16 signext %v) local_unnamed_addr #0 {198entry:199 %conv = sext i16 %v to i32200 %0 = tail call ptr @llvm.hexagon.S2.storerf.pci(ptr %start, i32 4, i32 %mod, i32 %conv, ptr %start)201 ret void202}203 204declare ptr @llvm.hexagon.S2.storerf.pci(ptr, i32, i32, i32, ptr nocapture) #1205 206; CHECK-LABEL: test16207; CHECK: m[[REG16:([0-1])]] = r0208; CHECK: cs[[REG16]] = r1209; CHECK: memw(r1++#4:circ(m[[REG16]])) =210define void @test16(i32 %mod, ptr %start, i32 %v) local_unnamed_addr #0 {211entry:212 %0 = tail call ptr @llvm.hexagon.S2.storeri.pci(ptr %start, i32 4, i32 %mod, i32 %v, ptr %start)213 ret void214}215 216declare ptr @llvm.hexagon.S2.storeri.pci(ptr, i32, i32, i32, ptr nocapture) #1217 218; CHECK-LABEL: test17219; CHECK: m[[REG17:([0-1])]] = r0220; CHECK: cs[[REG17]] = r1221; CHECK: memd(r1++#8:circ(m[[REG17]])) =222define void @test17(i32 %mod, ptr %start, i64 %v) local_unnamed_addr #0 {223entry:224 %0 = tail call ptr @llvm.hexagon.S2.storerd.pci(ptr %start, i32 8, i32 %mod, i64 %v, ptr %start)225 ret void226}227 228declare ptr @llvm.hexagon.S2.storerd.pci(ptr, i32, i32, i64, ptr nocapture) #1229 230; CHECK-LABEL: test18231; CHECK: m[[REG18:([0-1])]] = r0232; CHECK: cs[[REG18]] = r1233; CHECK: memb(r1++I:circ(m[[REG18]])) =234define void @test18(i32 %mod, ptr %start, i8 zeroext %v) local_unnamed_addr #0 {235entry:236 %conv = zext i8 %v to i32237 %0 = tail call ptr @llvm.hexagon.S2.storerb.pcr(ptr %start, i32 %mod, i32 %conv, ptr %start)238 ret void239}240 241declare ptr @llvm.hexagon.S2.storerb.pcr(ptr, i32, i32, ptr nocapture) #1242 243; CHECK-LABEL: test19244; CHECK: m[[REG19:([0-1])]] = r0245; CHECK: cs[[REG19]] = r1246; CHECK: memh(r1++I:circ(m[[REG19]])) =247define void @test19(i32 %mod, ptr %start, i16 signext %v) local_unnamed_addr #0 {248entry:249 %conv = sext i16 %v to i32250 %0 = tail call ptr @llvm.hexagon.S2.storerh.pcr(ptr %start, i32 %mod, i32 %conv, ptr %start)251 ret void252}253 254declare ptr @llvm.hexagon.S2.storerh.pcr(ptr, i32, i32, ptr nocapture) #1255 256; CHECK-LABEL: test20257; CHECK: m[[REG20:([0-1])]] = r0258; CHECK: cs[[REG20]] = r1259; CHECK: memh(r1++I:circ(m[[REG20]])) = r{{[0-9]+}}.h260define void @test20(i32 %mod, ptr %start, i16 signext %v) local_unnamed_addr #0 {261entry:262 %conv = sext i16 %v to i32263 %0 = tail call ptr @llvm.hexagon.S2.storerf.pcr(ptr %start, i32 %mod, i32 %conv, ptr %start)264 ret void265}266 267declare ptr @llvm.hexagon.S2.storerf.pcr(ptr, i32, i32, ptr nocapture) #1268 269; CHECK-LABEL: test21270; CHECK: m[[REG21:([0-1])]] = r0271; CHECK: cs[[REG21]] = r1272; CHECK: memw(r1++I:circ(m[[REG21]])) =273define void @test21(i32 %mod, ptr %start, i32 %v) local_unnamed_addr #0 {274entry:275 %0 = tail call ptr @llvm.hexagon.S2.storeri.pcr(ptr %start, i32 %mod, i32 %v, ptr %start)276 ret void277}278 279declare ptr @llvm.hexagon.S2.storeri.pcr(ptr, i32, i32, ptr nocapture) #1280 281; CHECK-LABEL: test22282; CHECK: m[[REG22:([0-1])]] = r0283; CHECK: cs[[REG22]] = r1284; CHECK: memd(r1++I:circ(m[[REG1]])) =285define void @test22(i32 %mod, ptr %start, i64 %v) local_unnamed_addr #0 {286entry:287 %0 = tail call ptr @llvm.hexagon.S2.storerd.pcr(ptr %start, i32 %mod, i64 %v, ptr %start)288 ret void289}290 291declare ptr @llvm.hexagon.S2.storerd.pcr(ptr, i32, i64, ptr nocapture) #1292 293attributes #0 = { nounwind "target-cpu"="hexagonv60" }294attributes #1 = { argmemonly nounwind }295