162 lines · plain
1; RUN: llc -mtriple=hexagon --filetype=obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s2 3; Function Attrs: nounwind4define i32 @cmpeq(i32 %i) #0 {5entry:6 %i.addr = alloca i32, align 47 store i32 %i, ptr %i.addr, align 48 %0 = load i32, ptr %i.addr, align 49 %1 = call i32 @llvm.hexagon.C2.cmpeq(i32 %0, i32 1)10 ret i32 %111}12; CHECK: { p{{[0-3]}} = cmp.eq(r{{[0-9]}},r{{[0-9]}})13 14; Function Attrs: nounwind readnone15declare i32 @llvm.hexagon.C2.cmpeq(i32, i32) #116 17; Function Attrs: nounwind18define i32 @cmpgt(i32 %i) #0 {19entry:20 %i.addr = alloca i32, align 421 store i32 %i, ptr %i.addr, align 422 %0 = load i32, ptr %i.addr, align 423 %1 = call i32 @llvm.hexagon.C2.cmpgt(i32 %0, i32 2)24 ret i32 %125}26; CHECK: { p{{[0-3]}} = cmp.gt(r{{[0-9]}},r{{[0-9]}})27 28; Function Attrs: nounwind readnone29declare i32 @llvm.hexagon.C2.cmpgt(i32, i32) #130 31; Function Attrs: nounwind32define i32 @cmpgtu(i32 %i) #0 {33entry:34 %i.addr = alloca i32, align 435 store i32 %i, ptr %i.addr, align 436 %0 = load i32, ptr %i.addr, align 437 %1 = call i32 @llvm.hexagon.C2.cmpgtu(i32 %0, i32 3)38 ret i32 %139}40; CHECK: { p{{[0-3]}} = cmp.gtu(r{{[0-9]}},r{{[0-9]}})41 42; Function Attrs: nounwind readnone43declare i32 @llvm.hexagon.C2.cmpgtu(i32, i32) #144 45; Function Attrs: nounwind46define i32 @cmplt(i32 %i) #0 {47entry:48 %i.addr = alloca i32, align 449 store i32 %i, ptr %i.addr, align 450 %0 = load i32, ptr %i.addr, align 451 %1 = call i32 @llvm.hexagon.C2.cmplt(i32 %0, i32 4)52 ret i32 %153}54; CHECK: { p{{[0-3]}} = cmp.gt(r{{[0-9]}},r{{[0-9]}})55 56; Function Attrs: nounwind readnone57declare i32 @llvm.hexagon.C2.cmplt(i32, i32) #158 59; Function Attrs: nounwind60define i32 @cmpltu(i32 %i) #0 {61entry:62 %i.addr = alloca i32, align 463 store i32 %i, ptr %i.addr, align 464 %0 = load i32, ptr %i.addr, align 465 %1 = call i32 @llvm.hexagon.C2.cmpltu(i32 %0, i32 5)66 ret i32 %167}68; CHECK: { p{{[0-3]}} = cmp.gtu(r{{[0-9]}},r{{[0-9]}})69 70; Function Attrs: nounwind readnone71declare i32 @llvm.hexagon.C2.cmpltu(i32, i32) #172 73; Function Attrs: nounwind74define i32 @cmpeqi(i32 %i) #0 {75entry:76 %i.addr = alloca i32, align 477 store i32 %i, ptr %i.addr, align 478 %0 = load i32, ptr %i.addr, align 479 %1 = call i32 @llvm.hexagon.C2.cmpeqi(i32 %0, i32 10)80 ret i32 %181}82; CHECK: { p{{[0-3]}} = cmp.eq(r{{[0-9]}},#10)83 84; Function Attrs: nounwind readnone85declare i32 @llvm.hexagon.C2.cmpeqi(i32, i32) #186 87; Function Attrs: nounwind88define i32 @cmpgti(i32 %i) #0 {89entry:90 %i.addr = alloca i32, align 491 store i32 %i, ptr %i.addr, align 492 %0 = load i32, ptr %i.addr, align 493 %1 = call i32 @llvm.hexagon.C2.cmpgti(i32 %0, i32 20)94 ret i32 %195}96; CHECK: { p{{[0-3]}} = cmp.gt(r{{[0-9]}},#20)97 98; Function Attrs: nounwind readnone99declare i32 @llvm.hexagon.C2.cmpgti(i32, i32) #1100 101; Function Attrs: nounwind102define i32 @cmpgtui(i32 %i) #0 {103entry:104 %i.addr = alloca i32, align 4105 store i32 %i, ptr %i.addr, align 4106 %0 = load i32, ptr %i.addr, align 4107 %1 = call i32 @llvm.hexagon.C2.cmpgtui(i32 %0, i32 40)108 ret i32 %1109}110; CHECK: { p{{[0-3]}} = cmp.gtu(r{{[0-9]}},#40)111 112; Function Attrs: nounwind readnone113declare i32 @llvm.hexagon.C2.cmpgtui(i32, i32) #1114 115; Function Attrs: nounwind116define i32 @cmpgei(i32 %i) #0 {117entry:118 %i.addr = alloca i32, align 4119 store i32 %i, ptr %i.addr, align 4120 %0 = load i32, ptr %i.addr, align 4121 %1 = call i32 @llvm.hexagon.C2.cmpgei(i32 %0, i32 3)122 ret i32 %1123}124; CHECK: { p{{[0-3]}} = cmp.gt(r{{[0-9]}},#2)125 126; Function Attrs: nounwind readnone127declare i32 @llvm.hexagon.C2.cmpgei(i32, i32) #1128 129; Function Attrs: nounwind130define i32 @cmpgeu(i32 %i) #0 {131entry:132 %i.addr = alloca i32, align 4133 store i32 %i, ptr %i.addr, align 4134 %0 = load i32, ptr %i.addr, align 4135 %1 = call i32 @llvm.hexagon.C2.cmpgeui(i32 %0, i32 3)136 ret i32 %1137}138; CHECK: { p{{[0-3]}} = cmp.gtu(r{{[0-9]}},#2)139 140; Function Attrs: nounwind readnone141declare i32 @llvm.hexagon.C2.cmpgeui(i32, i32) #1142 143; Function Attrs: nounwind144define i32 @cmpgeu0(i32 %i) #0 {145entry:146 %i.addr = alloca i32, align 4147 store i32 %i, ptr %i.addr, align 4148 %0 = load i32, ptr %i.addr, align 4149 %1 = call i32 @llvm.hexagon.C2.cmpgeui(i32 %0, i32 0)150 ret i32 %1151}152; CHECK: { p{{[0-3]}} = cmp.eq(r{{[0-9]}},r{{[0-9]}})153 154 155attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }156attributes #1 = { nounwind readnone }157 158!llvm.ident = !{!0}159 160!0 = !{!"Clang 3.1"}161 162