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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; Make sure that the assembler mapped compare instructions are correctly generated.3 4@c = common global i32 0, align 45 6define i32 @test1(i32 %a, i32 %b) nounwind {7; CHECK-NOT: cmp.ge8; CHECK: cmp.gt9entry:10 %cmp = icmp slt i32 %a, 10011 br i1 %cmp, label %if.then, label %entry.if.end_crit_edge12 13entry.if.end_crit_edge:14 %.pre = load i32, ptr @c, align 415 br label %if.end16 17if.then:18 %sub = add nsw i32 %a, -1019 store i32 %sub, ptr @c, align 420 br label %if.end21 22if.end:23 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]24 ret i32 %025}26 27define i32 @test2(i32 %a, i32 %b) nounwind {28; CHECK-NOT: cmp.lt29; CHECK: cmp.gt30entry:31 %cmp = icmp sge i32 %a, %b32 br i1 %cmp, label %entry.if.end_crit_edge, label %if.then33 34entry.if.end_crit_edge:35 %.pre = load i32, ptr @c, align 436 br label %if.end37 38if.then:39 %sub = add nsw i32 %a, -1040 store i32 %sub, ptr @c, align 441 br label %if.end42 43if.end:44 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]45 ret i32 %046}47 48define i32 @test4(i32 %a, i32 %b) nounwind {49; CHECK-NOT: cmp.ltu50; CHECK: cmp.gtu51entry:52 %cmp = icmp uge i32 %a, %b53 br i1 %cmp, label %entry.if.end_crit_edge, label %if.then54 55entry.if.end_crit_edge:56 %.pre = load i32, ptr @c, align 457 br label %if.end58 59if.then:60 %sub = add i32 %a, -1061 store i32 %sub, ptr @c, align 462 br label %if.end63 64if.end:65 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]66 ret i32 %067}68 69define i32 @test5(i32 %a, i32 %b) nounwind {70; CHECK: cmp.gtu71entry:72 %cmp = icmp uge i32 %a, 2999973 br i1 %cmp, label %if.then, label %entry.if.end_crit_edge74 75entry.if.end_crit_edge:76 %.pre = load i32, ptr @c, align 477 br label %if.end78 79if.then:80 %sub = add i32 %a, -1081 store i32 %sub, ptr @c, align 482 br label %if.end83 84if.end:85 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]86 ret i32 %087}88