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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; CHECK-NOT: setbit(r{{[0-9]+}},#1)3 4target triple = "hexagon-unknown--elf"5 6%s.8 = type { ptr, i32, i32, i32, i32, ptr, ptr, ptr }7%s.9 = type { %s.10 }8%s.10 = type { i64 }9%s.4 = type { i64, ptr, [4 x i32], [4 x i32], [4 x i32], i32, i8, i8, [6 x i8] }10 11@g0 = private constant [6 x i8] c"input\00", align 3212@g1 = private constant [11 x i8] c"gaussian11\00", align 3213@g2 = private constant [2 x %s.8] [%s.8 { ptr @g0, i32 1, i32 2, i32 1, i32 8, ptr null, ptr null, ptr null }, %s.8 { ptr @g1, i32 2, i32 2, i32 1, i32 8, ptr null, ptr null, ptr null }]14@g3 = private constant [53 x i8] c"hexagon-32-os_unknown-no_asserts-no_bounds_query-hvx\00", align 3215 16; Function Attrs: nounwind17declare ptr @f0(ptr, i32) #018 19; Function Attrs: nounwind20declare void @f1(ptr, ptr) #021 22; Function Attrs: nounwind23declare noalias ptr @f2(ptr, i32) #024 25; Function Attrs: nounwind26declare void @f3(ptr, ptr) #027 28; Function Attrs: nounwind29declare void @f4() #030 31; Function Attrs: nounwind32declare void @f5() #033 34; Function Attrs: nounwind35define i32 @f6(ptr noalias nocapture readonly %a0, ptr noalias nocapture readonly %a1) #0 {36b0:37 %v0 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 138 %v1 = load ptr, ptr %v039 %v2 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 2, i32 040 %v3 = load i32, ptr %v241 %v4 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 2, i32 142 %v5 = load i32, ptr %v443 %v6 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 3, i32 144 %v7 = load i32, ptr %v645 %v8 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 4, i32 046 %v9 = load i32, ptr %v847 %v10 = getelementptr inbounds %s.4, ptr %a0, i32 0, i32 4, i32 148 %v11 = load i32, ptr %v1049 %v12 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 150 %v13 = load ptr, ptr %v1251 %v14 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 2, i32 052 %v15 = load i32, ptr %v1453 %v16 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 2, i32 154 %v17 = load i32, ptr %v1655 %v18 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 3, i32 156 %v19 = load i32, ptr %v1857 %v20 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 4, i32 058 %v21 = load i32, ptr %v2059 %v22 = getelementptr inbounds %s.4, ptr %a1, i32 0, i32 4, i32 160 %v23 = load i32, ptr %v2261 %v24 = add nsw i32 %v21, %v1562 %v25 = add nsw i32 %v24, -6463 %v26 = icmp slt i32 %v21, %v2564 %v27 = select i1 %v26, i32 %v21, i32 %v2565 %v28 = add nsw i32 %v15, -166 %v29 = and i32 %v28, -6467 %v30 = add i32 %v21, 6368 %v31 = add i32 %v30, %v2969 %v32 = add nsw i32 %v24, -170 %v33 = icmp slt i32 %v31, %v3271 %v34 = select i1 %v33, i32 %v31, i32 %v3272 %v35 = sub nsw i32 %v34, %v2773 %v36 = icmp slt i32 %v24, %v3474 %v37 = select i1 %v36, i32 %v34, i32 %v2475 %v38 = add nsw i32 %v37, -176 %v39 = icmp slt i32 %v38, %v3477 %v40 = select i1 %v39, i32 %v34, i32 %v3878 %v41 = add nsw i32 %v17, 179 %v42 = sext i32 %v41 to i6480 %v43 = sub nsw i32 %v40, %v2781 %v44 = add nsw i32 %v43, 282 %v45 = sext i32 %v44 to i6483 %v46 = mul nsw i64 %v45, %v4284 %v47 = trunc i64 %v46 to i3285 %v48 = tail call ptr @f2(ptr null, i32 %v47)86 %v49 = add nsw i32 %v23, -187 %v50 = add i32 %v23, %v1788 %v51 = icmp sgt i32 %v23, %v5089 br i1 %v51, label %b12, label %b1, !prof !390 91b1: ; preds = %b11, %b092 %v52 = phi i32 [ %v220, %b11 ], [ %v49, %b0 ]93 %v53 = icmp slt i32 %v9, %v2494 %v54 = select i1 %v53, i32 %v9, i32 %v2495 %v55 = add nsw i32 %v21, -196 %v56 = icmp slt i32 %v54, %v5597 %v57 = select i1 %v56, i32 %v55, i32 %v5498 %v58 = add nsw i32 %v9, %v399 %v59 = icmp slt i32 %v58, %v24100 %v60 = select i1 %v59, i32 %v58, i32 %v24101 %v61 = icmp slt i32 %v60, %v57102 %v62 = select i1 %v61, i32 %v57, i32 %v60103 %v63 = icmp slt i32 %v57, %v21104 br i1 %v63, label %b7, label %b2, !prof !3105 106b2: ; preds = %b1107 %v64 = add nsw i32 %v11, %v5108 %v65 = add nsw i32 %v64, -1109 %v66 = icmp slt i32 %v52, %v65110 br i1 %v66, label %b3, label %b4111 112b3: ; preds = %b3, %b2113 %v67 = phi i32 [ %v96, %b3 ], [ %v55, %b2 ]114 %v68 = mul nsw i32 %v11, %v7115 %v69 = icmp slt i32 %v52, %v11116 %v70 = select i1 %v69, i32 %v11, i32 %v52117 %v71 = mul nsw i32 %v70, %v7118 %v72 = add nsw i32 %v58, -1119 %v73 = icmp slt i32 %v67, %v72120 %v74 = select i1 %v73, i32 %v67, i32 %v72121 %v75 = icmp slt i32 %v74, %v9122 %v76 = select i1 %v75, i32 %v9, i32 %v74123 %v77 = add i32 %v68, %v9124 %v78 = sub i32 %v71, %v77125 %v79 = add i32 %v78, %v76126 %v80 = getelementptr inbounds i8, ptr %v1, i32 %v79127 %v81 = load i8, ptr %v80, align 1, !tbaa !4128 %v82 = icmp sle i32 %v64, %v52129 %v83 = icmp sle i32 %v58, %v67130 %v84 = icmp slt i32 %v67, %v9131 %v85 = or i1 %v84, %v83132 %v86 = or i1 %v69, %v85133 %v87 = or i1 %v82, %v86134 %v88 = select i1 %v87, i8 0, i8 %v81135 %v89 = sub i32 1, %v23136 %v90 = add i32 %v89, %v52137 %v91 = mul nsw i32 %v90, %v44138 %v92 = sub i32 1, %v27139 %v93 = add i32 %v92, %v91140 %v94 = add i32 %v93, %v67141 %v95 = getelementptr inbounds i8, ptr %v48, i32 %v94142 store i8 %v88, ptr %v95, align 1, !tbaa !7143 %v96 = add nsw i32 %v67, 1144 %v97 = icmp eq i32 %v96, %v57145 br i1 %v97, label %b7, label %b3146 147b4: ; preds = %b2148 %v98 = icmp slt i32 %v5, 1149 br i1 %v98, label %b5, label %b6150 151b5: ; preds = %b5, %b4152 %v99 = phi i32 [ %v123, %b5 ], [ %v55, %b4 ]153 %v100 = add nsw i32 %v58, -1154 %v101 = icmp slt i32 %v99, %v100155 %v102 = select i1 %v101, i32 %v99, i32 %v100156 %v103 = icmp slt i32 %v102, %v9157 %v104 = select i1 %v103, i32 %v9, i32 %v102158 %v105 = sub i32 %v104, %v9159 %v106 = getelementptr inbounds i8, ptr %v1, i32 %v105160 %v107 = load i8, ptr %v106, align 1, !tbaa !4161 %v108 = icmp sle i32 %v64, %v52162 %v109 = icmp slt i32 %v52, %v11163 %v110 = icmp sle i32 %v58, %v99164 %v111 = icmp slt i32 %v99, %v9165 %v112 = or i1 %v111, %v110166 %v113 = or i1 %v109, %v112167 %v114 = or i1 %v108, %v113168 %v115 = select i1 %v114, i8 0, i8 %v107169 %v116 = sub i32 1, %v23170 %v117 = add i32 %v116, %v52171 %v118 = mul nsw i32 %v117, %v44172 %v119 = sub i32 1, %v27173 %v120 = add i32 %v119, %v118174 %v121 = add i32 %v120, %v99175 %v122 = getelementptr inbounds i8, ptr %v48, i32 %v121176 store i8 %v115, ptr %v122, align 1, !tbaa !7177 %v123 = add nsw i32 %v99, 1178 %v124 = icmp eq i32 %v123, %v57179 br i1 %v124, label %b7, label %b5180 181b6: ; preds = %b6, %b4182 %v125 = phi i32 [ %v153, %b6 ], [ %v55, %b4 ]183 %v126 = mul nsw i32 %v11, %v7184 %v127 = mul nsw i32 %v65, %v7185 %v128 = add nsw i32 %v58, -1186 %v129 = icmp slt i32 %v125, %v128187 %v130 = select i1 %v129, i32 %v125, i32 %v128188 %v131 = icmp slt i32 %v130, %v9189 %v132 = select i1 %v131, i32 %v9, i32 %v130190 %v133 = add i32 %v126, %v9191 %v134 = sub i32 %v127, %v133192 %v135 = add i32 %v134, %v132193 %v136 = getelementptr inbounds i8, ptr %v1, i32 %v135194 %v137 = load i8, ptr %v136, align 1, !tbaa !4195 %v138 = icmp sle i32 %v64, %v52196 %v139 = icmp slt i32 %v52, %v11197 %v140 = icmp sle i32 %v58, %v125198 %v141 = icmp slt i32 %v125, %v9199 %v142 = or i1 %v141, %v140200 %v143 = or i1 %v139, %v142201 %v144 = or i1 %v138, %v143202 %v145 = select i1 %v144, i8 0, i8 %v137203 %v146 = sub i32 1, %v23204 %v147 = add i32 %v146, %v52205 %v148 = mul nsw i32 %v147, %v44206 %v149 = sub i32 1, %v27207 %v150 = add i32 %v149, %v148208 %v151 = add i32 %v150, %v125209 %v152 = getelementptr inbounds i8, ptr %v48, i32 %v151210 store i8 %v145, ptr %v152, align 1, !tbaa !7211 %v153 = add nsw i32 %v125, 1212 %v154 = icmp eq i32 %v153, %v57213 br i1 %v154, label %b7, label %b6214 215b7: ; preds = %b6, %b5, %b3, %b1216 %v155 = icmp slt i32 %v57, %v62217 br i1 %v155, label %b8, label %b9, !prof !9218 219b8: ; preds = %b8, %b7220 %v156 = phi i32 [ %v181, %b8 ], [ %v57, %b7 ]221 %v157 = mul nsw i32 %v11, %v7222 %v158 = add nsw i32 %v11, %v5223 %v159 = add nsw i32 %v158, -1224 %v160 = icmp slt i32 %v52, %v159225 %v161 = select i1 %v160, i32 %v52, i32 %v159226 %v162 = icmp slt i32 %v161, %v11227 %v163 = select i1 %v162, i32 %v11, i32 %v161228 %v164 = mul nsw i32 %v163, %v7229 %v165 = add i32 %v157, %v9230 %v166 = sub i32 %v164, %v165231 %v167 = add i32 %v166, %v156232 %v168 = getelementptr inbounds i8, ptr %v1, i32 %v167233 %v169 = load i8, ptr %v168, align 1, !tbaa !4234 %v170 = icmp sle i32 %v158, %v52235 %v171 = icmp slt i32 %v52, %v11236 %v172 = or i1 %v171, %v170237 %v173 = select i1 %v172, i8 0, i8 %v169238 %v174 = sub i32 1, %v23239 %v175 = add i32 %v174, %v52240 %v176 = mul nsw i32 %v175, %v44241 %v177 = sub i32 1, %v27242 %v178 = add i32 %v177, %v176243 %v179 = add i32 %v178, %v156244 %v180 = getelementptr inbounds i8, ptr %v48, i32 %v179245 store i8 %v173, ptr %v180, align 1, !tbaa !7246 %v181 = add nsw i32 %v156, 1247 %v182 = icmp eq i32 %v181, %v62248 br i1 %v182, label %b9, label %b8249 250b9: ; preds = %b8, %b7251 %v183 = icmp slt i32 %v62, %v24252 br i1 %v183, label %b10, label %b11, !prof !9253 254b10: ; preds = %b10, %b9255 %v184 = phi i32 [ %v218, %b10 ], [ %v62, %b9 ]256 %v185 = mul nsw i32 %v11, %v7257 %v186 = add nsw i32 %v11, %v5258 %v187 = add nsw i32 %v186, -1259 %v188 = icmp slt i32 %v52, %v187260 %v189 = select i1 %v188, i32 %v52, i32 %v187261 %v190 = icmp slt i32 %v189, %v11262 %v191 = select i1 %v190, i32 %v11, i32 %v189263 %v192 = mul nsw i32 %v191, %v7264 %v193 = add nsw i32 %v58, -1265 %v194 = icmp slt i32 %v184, %v193266 %v195 = select i1 %v194, i32 %v184, i32 %v193267 %v196 = icmp slt i32 %v195, %v9268 %v197 = select i1 %v196, i32 %v9, i32 %v195269 %v198 = add i32 %v185, %v9270 %v199 = sub i32 %v192, %v198271 %v200 = add i32 %v199, %v197272 %v201 = getelementptr inbounds i8, ptr %v1, i32 %v200273 %v202 = load i8, ptr %v201, align 1, !tbaa !4274 %v203 = icmp sle i32 %v186, %v52275 %v204 = icmp slt i32 %v52, %v11276 %v205 = icmp sle i32 %v58, %v184277 %v206 = icmp slt i32 %v184, %v9278 %v207 = or i1 %v206, %v205279 %v208 = or i1 %v204, %v207280 %v209 = or i1 %v203, %v208281 %v210 = select i1 %v209, i8 0, i8 %v202282 %v211 = sub i32 1, %v23283 %v212 = add i32 %v211, %v52284 %v213 = mul nsw i32 %v212, %v44285 %v214 = sub i32 1, %v27286 %v215 = add i32 %v214, %v213287 %v216 = add i32 %v215, %v184288 %v217 = getelementptr inbounds i8, ptr %v48, i32 %v216289 store i8 %v210, ptr %v217, align 1, !tbaa !7290 %v218 = add nsw i32 %v184, 1291 %v219 = icmp eq i32 %v218, %v24292 br i1 %v219, label %b11, label %b10293 294b11: ; preds = %b10, %b9295 %v220 = add nsw i32 %v52, 1296 %v221 = icmp eq i32 %v220, %v50297 br i1 %v221, label %b12, label %b1298 299b12: ; preds = %b11, %b0300 %v222 = add nsw i32 %v35, 1301 %v223 = sext i32 %v222 to i64302 %v224 = shl nsw i64 %v42, 2303 %v225 = mul i64 %v224, %v223304 %v226 = trunc i64 %v225 to i32305 %v227 = tail call ptr @f2(ptr null, i32 %v226)306 br i1 %v51, label %b14, label %b13, !prof !3307 308b13: ; preds = %b19, %b12309 %v228 = phi i32 [ %v351, %b19 ], [ %v49, %b12 ]310 %v229 = ashr i32 %v15, 6311 %v230 = icmp slt i32 %v229, 0312 %v231 = select i1 %v230, i32 0, i32 %v229313 %v232 = icmp sgt i32 %v231, 0314 br i1 %v232, label %b16, label %b17, !prof !9315 316b14: ; preds = %b19, %b12317 %v233 = icmp eq ptr %v48, null318 br i1 %v233, label %b20, label %b15319 320b15: ; preds = %b14321 tail call void @f3(ptr null, ptr %v48) #2322 br label %b20323 324b16: ; preds = %b16, %b13325 %v234 = phi i32 [ %v289, %b16 ], [ 0, %b13 ]326 %v235 = sub nsw i32 %v228, %v23327 %v236 = add nsw i32 %v235, 1328 %v237 = mul nsw i32 %v236, %v44329 %v238 = shl i32 %v234, 6330 %v239 = sub i32 %v21, %v27331 %v240 = add i32 %v239, %v238332 %v241 = add nsw i32 %v240, %v237333 %v242 = getelementptr inbounds i8, ptr %v48, i32 %v241334 %v244 = load <16 x i32>, ptr %v242, align 1, !tbaa !7335 %v245 = tail call <32 x i32> @llvm.hexagon.V6.vzb(<16 x i32> %v244)336 %v246 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v245)337 %v247 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v245)338 %v248 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v247)339 %v249 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v246)340 %v250 = add nsw i32 %v241, 1341 %v251 = getelementptr inbounds i8, ptr %v48, i32 %v250342 %v253 = load <16 x i32>, ptr %v251, align 1, !tbaa !7343 %v254 = tail call <32 x i32> @llvm.hexagon.V6.vzb(<16 x i32> %v253)344 %v255 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v254)345 %v256 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v255)346 %v257 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v256)347 %v258 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v256)348 %v259 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v257, i32 168430090)349 %v260 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v258, i32 168430090)350 %v261 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v259, <16 x i32> %v260)351 %v262 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v254)352 %v263 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v262)353 %v264 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v263)354 %v265 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v263)355 %v266 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v264, i32 168430090)356 %v267 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v265, i32 168430090)357 %v268 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v266, <16 x i32> %v267)358 %v269 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v248, <32 x i32> %v261)359 %v270 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v249, <32 x i32> %v268)360 %v271 = shufflevector <32 x i32> %v269, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>361 %v272 = mul nsw i32 %v236, %v222362 %v273 = add nsw i32 %v240, %v272363 %v275 = getelementptr inbounds i32, ptr %v227, i32 %v273364 store <16 x i32> %v271, ptr %v275, align 4, !tbaa !10365 %v277 = shufflevector <32 x i32> %v269, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>366 %v278 = add nsw i32 %v273, 16367 %v279 = getelementptr inbounds i32, ptr %v227, i32 %v278368 store <16 x i32> %v277, ptr %v279, align 4, !tbaa !10369 %v281 = shufflevector <32 x i32> %v270, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>370 %v282 = add nsw i32 %v273, 32371 %v283 = getelementptr inbounds i32, ptr %v227, i32 %v282372 store <16 x i32> %v281, ptr %v283, align 4, !tbaa !10373 %v285 = shufflevector <32 x i32> %v270, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>374 %v286 = add nsw i32 %v273, 48375 %v287 = getelementptr inbounds i32, ptr %v227, i32 %v286376 store <16 x i32> %v285, ptr %v287, align 4, !tbaa !10377 %v289 = add nuw nsw i32 %v234, 1378 %v290 = icmp eq i32 %v289, %v231379 br i1 %v290, label %b17, label %b16380 381b17: ; preds = %b16, %b13382 %v291 = add nsw i32 %v15, 63383 %v292 = ashr i32 %v291, 6384 %v293 = icmp slt i32 %v231, %v292385 br i1 %v293, label %b18, label %b19, !prof !9386 387b18: ; preds = %b18, %b17388 %v294 = phi i32 [ %v349, %b18 ], [ %v231, %b17 ]389 %v295 = sub nsw i32 %v228, %v23390 %v296 = add nsw i32 %v295, 1391 %v297 = mul nsw i32 %v296, %v44392 %v298 = sub nsw i32 %v24, %v27393 %v299 = add nsw i32 %v297, %v298394 %v300 = add nsw i32 %v299, -64395 %v301 = getelementptr inbounds i8, ptr %v48, i32 %v300396 %v303 = load <16 x i32>, ptr %v301, align 1, !tbaa !7397 %v304 = tail call <32 x i32> @llvm.hexagon.V6.vzb(<16 x i32> %v303)398 %v305 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v304)399 %v306 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v304)400 %v307 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v306)401 %v308 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v305)402 %v309 = add nsw i32 %v299, -63403 %v310 = getelementptr inbounds i8, ptr %v48, i32 %v309404 %v312 = load <16 x i32>, ptr %v310, align 1, !tbaa !7405 %v313 = tail call <32 x i32> @llvm.hexagon.V6.vzb(<16 x i32> %v312)406 %v314 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v313)407 %v315 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v314)408 %v316 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v315)409 %v317 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v315)410 %v318 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v316, i32 168430090)411 %v319 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v317, i32 168430090)412 %v320 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v318, <16 x i32> %v319)413 %v321 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v313)414 %v322 = tail call <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32> %v321)415 %v323 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v322)416 %v324 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v322)417 %v325 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v323, i32 168430090)418 %v326 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v324, i32 168430090)419 %v327 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v325, <16 x i32> %v326)420 %v328 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v307, <32 x i32> %v320)421 %v329 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v308, <32 x i32> %v327)422 %v330 = shufflevector <32 x i32> %v328, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>423 %v331 = mul nsw i32 %v296, %v222424 %v332 = add nsw i32 %v331, %v298425 %v333 = add nsw i32 %v332, -64426 %v335 = getelementptr inbounds i32, ptr %v227, i32 %v333427 store <16 x i32> %v330, ptr %v335, align 4, !tbaa !10428 %v337 = shufflevector <32 x i32> %v328, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>429 %v338 = add nsw i32 %v332, -48430 %v339 = getelementptr inbounds i32, ptr %v227, i32 %v338431 store <16 x i32> %v337, ptr %v339, align 4, !tbaa !10432 %v341 = shufflevector <32 x i32> %v329, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>433 %v342 = add nsw i32 %v332, -32434 %v343 = getelementptr inbounds i32, ptr %v227, i32 %v342435 store <16 x i32> %v341, ptr %v343, align 4, !tbaa !10436 %v345 = shufflevector <32 x i32> %v329, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>437 %v346 = add nsw i32 %v332, -16438 %v347 = getelementptr inbounds i32, ptr %v227, i32 %v346439 store <16 x i32> %v345, ptr %v347, align 4, !tbaa !10440 %v349 = add nuw nsw i32 %v294, 1441 %v350 = icmp eq i32 %v349, %v292442 br i1 %v350, label %b19, label %b18443 444b19: ; preds = %b18, %b17445 %v351 = add nsw i32 %v228, 1446 %v352 = icmp eq i32 %v351, %v50447 br i1 %v352, label %b14, label %b13448 449b20: ; preds = %b15, %b14450 %v353 = icmp sgt i32 %v17, 0451 br i1 %v353, label %b21, label %b31, !prof !9452 453b21: ; preds = %b20454 %v354 = ashr i32 %v15, 6455 %v355 = icmp slt i32 %v354, 0456 %v356 = select i1 %v355, i32 0, i32 %v354457 %v357 = icmp sgt i32 %v356, 0458 br i1 %v357, label %b25, label %b27459 460b22: ; preds = %b25, %b22461 %v358 = phi i32 [ %v442, %b22 ], [ 0, %b25 ]462 %v359 = sub nsw i32 %v525, %v23463 %v360 = mul nsw i32 %v359, %v222464 %v361 = shl nsw i32 %v358, 6465 %v362 = add nsw i32 %v361, %v21466 %v363 = sub nsw i32 %v362, %v27467 %v364 = add nsw i32 %v363, %v360468 %v366 = getelementptr inbounds i32, ptr %v227, i32 %v364469 %v368 = load <16 x i32>, ptr %v366, align 4, !tbaa !10470 %v369 = add nsw i32 %v364, 16471 %v370 = getelementptr inbounds i32, ptr %v227, i32 %v369472 %v372 = load <16 x i32>, ptr %v370, align 4, !tbaa !10473 %v373 = shufflevector <16 x i32> %v368, <16 x i32> %v372, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>474 %v374 = add nsw i32 %v359, 1475 %v375 = mul nsw i32 %v374, %v222476 %v376 = add nsw i32 %v363, %v375477 %v377 = getelementptr inbounds i32, ptr %v227, i32 %v376478 %v379 = load <16 x i32>, ptr %v377, align 4, !tbaa !10479 %v380 = add nsw i32 %v376, 16480 %v381 = getelementptr inbounds i32, ptr %v227, i32 %v380481 %v383 = load <16 x i32>, ptr %v381, align 4, !tbaa !10482 %v384 = shufflevector <16 x i32> %v379, <16 x i32> %v383, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>483 %v385 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v384)484 %v386 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v384)485 %v387 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v385, i32 168430090)486 %v388 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v386, i32 168430090)487 %v389 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v387, <16 x i32> %v388)488 %v390 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v373, <32 x i32> %v389)489 %v391 = shufflevector <32 x i32> %v390, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>490 %v392 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v391, i32 20)491 %v393 = shufflevector <32 x i32> %v390, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>492 %v394 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v393, i32 20)493 %v395 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v394, <16 x i32> %v392)494 %v396 = add nsw i32 %v364, 32495 %v397 = getelementptr inbounds i32, ptr %v227, i32 %v396496 %v399 = load <16 x i32>, ptr %v397, align 4, !tbaa !10497 %v400 = add nsw i32 %v364, 48498 %v401 = getelementptr inbounds i32, ptr %v227, i32 %v400499 %v403 = load <16 x i32>, ptr %v401, align 4, !tbaa !10500 %v404 = shufflevector <16 x i32> %v399, <16 x i32> %v403, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>501 %v405 = add nsw i32 %v376, 32502 %v406 = getelementptr inbounds i32, ptr %v227, i32 %v405503 %v408 = load <16 x i32>, ptr %v406, align 4, !tbaa !10504 %v409 = add nsw i32 %v376, 48505 %v410 = getelementptr inbounds i32, ptr %v227, i32 %v409506 %v412 = load <16 x i32>, ptr %v410, align 4, !tbaa !10507 %v413 = shufflevector <16 x i32> %v408, <16 x i32> %v412, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>508 %v414 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v413)509 %v415 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v413)510 %v416 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v414, i32 168430090)511 %v417 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v415, i32 168430090)512 %v418 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v416, <16 x i32> %v417)513 %v419 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v404, <32 x i32> %v418)514 %v420 = shufflevector <32 x i32> %v419, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>515 %v421 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v420, i32 20)516 %v422 = shufflevector <32 x i32> %v419, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>517 %v423 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v422, i32 20)518 %v424 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v423, <16 x i32> %v421)519 %v425 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v395)520 %v426 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v395)521 %v427 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v425, <16 x i32> %v426)522 %v428 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v424)523 %v429 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v424)524 %v430 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v428, <16 x i32> %v429)525 %v431 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v430, <16 x i32> %v427)526 %v432 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v431)527 %v433 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v431)528 %v434 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %v432, <16 x i32> %v433)529 %v435 = mul nsw i32 %v23, %v19530 %v436 = mul nsw i32 %v525, %v19531 %v437 = add i32 %v435, %v21532 %v438 = sub i32 %v436, %v437533 %v439 = add i32 %v438, %v362534 %v440 = getelementptr inbounds i8, ptr %v13, i32 %v439535 store <16 x i32> %v434, ptr %v440, align 1, !tbaa !12536 %v442 = add nuw nsw i32 %v358, 1537 %v443 = icmp eq i32 %v442, %v356538 br i1 %v443, label %b26, label %b22539 540b23: ; preds = %b26, %b23541 %v444 = phi i32 [ %v521, %b23 ], [ %v356, %b26 ]542 %v445 = sub nsw i32 %v24, %v27543 %v446 = add nsw i32 %v360, %v445544 %v447 = add nsw i32 %v446, -64545 %v448 = getelementptr inbounds i32, ptr %v227, i32 %v447546 %v450 = load <16 x i32>, ptr %v448, align 4, !tbaa !10547 %v451 = add nsw i32 %v446, -48548 %v452 = getelementptr inbounds i32, ptr %v227, i32 %v451549 %v454 = load <16 x i32>, ptr %v452, align 4, !tbaa !10550 %v455 = shufflevector <16 x i32> %v450, <16 x i32> %v454, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>551 %v456 = add nsw i32 %v375, %v445552 %v457 = add nsw i32 %v456, -64553 %v458 = getelementptr inbounds i32, ptr %v227, i32 %v457554 %v460 = load <16 x i32>, ptr %v458, align 4, !tbaa !10555 %v461 = add nsw i32 %v456, -48556 %v462 = getelementptr inbounds i32, ptr %v227, i32 %v461557 %v464 = load <16 x i32>, ptr %v462, align 4, !tbaa !10558 %v465 = shufflevector <16 x i32> %v460, <16 x i32> %v464, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>559 %v466 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v465)560 %v467 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v465)561 %v468 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v466, i32 168430090)562 %v469 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v467, i32 168430090)563 %v470 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v468, <16 x i32> %v469)564 %v471 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v455, <32 x i32> %v470)565 %v472 = shufflevector <32 x i32> %v471, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>566 %v473 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v472, i32 20)567 %v474 = shufflevector <32 x i32> %v471, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>568 %v475 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v474, i32 20)569 %v476 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v475, <16 x i32> %v473)570 %v477 = add nsw i32 %v446, -32571 %v478 = getelementptr inbounds i32, ptr %v227, i32 %v477572 %v480 = load <16 x i32>, ptr %v478, align 4, !tbaa !10573 %v481 = add nsw i32 %v446, -16574 %v482 = getelementptr inbounds i32, ptr %v227, i32 %v481575 %v484 = load <16 x i32>, ptr %v482, align 4, !tbaa !10576 %v485 = shufflevector <16 x i32> %v480, <16 x i32> %v484, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>577 %v486 = add nsw i32 %v456, -32578 %v487 = getelementptr inbounds i32, ptr %v227, i32 %v486579 %v489 = load <16 x i32>, ptr %v487, align 4, !tbaa !10580 %v490 = add nsw i32 %v456, -16581 %v491 = getelementptr inbounds i32, ptr %v227, i32 %v490582 %v493 = load <16 x i32>, ptr %v491, align 4, !tbaa !10583 %v494 = shufflevector <16 x i32> %v489, <16 x i32> %v493, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>584 %v495 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v494)585 %v496 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v494)586 %v497 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v495, i32 168430090)587 %v498 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v496, i32 168430090)588 %v499 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v497, <16 x i32> %v498)589 %v500 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v485, <32 x i32> %v499)590 %v501 = shufflevector <32 x i32> %v500, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>591 %v502 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v501, i32 20)592 %v503 = shufflevector <32 x i32> %v500, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>593 %v504 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v503, i32 20)594 %v505 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v504, <16 x i32> %v502)595 %v506 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v476)596 %v507 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v476)597 %v508 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v506, <16 x i32> %v507)598 %v509 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v505)599 %v510 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v505)600 %v511 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v509, <16 x i32> %v510)601 %v512 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v511, <16 x i32> %v508)602 %v513 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v512)603 %v514 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v512)604 %v515 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %v513, <16 x i32> %v514)605 %v516 = add i32 %v15, -64606 %v517 = sub i32 %v516, %v435607 %v518 = add i32 %v517, %v436608 %v519 = getelementptr inbounds i8, ptr %v13, i32 %v518609 store <16 x i32> %v515, ptr %v519, align 1, !tbaa !12610 %v521 = add nuw nsw i32 %v444, 1611 %v522 = icmp eq i32 %v521, %v527612 br i1 %v522, label %b24, label %b23613 614b24: ; preds = %b26, %b23615 %v523 = add nsw i32 %v525, 1616 %v524 = icmp eq i32 %v523, %v50617 br i1 %v524, label %b32, label %b25618 619b25: ; preds = %b24, %b21620 %v525 = phi i32 [ %v523, %b24 ], [ %v23, %b21 ]621 br label %b22622 623b26: ; preds = %b22624 %v526 = add nsw i32 %v15, 63625 %v527 = ashr i32 %v526, 6626 %v528 = icmp slt i32 %v356, %v527627 br i1 %v528, label %b23, label %b24, !prof !9628 629b27: ; preds = %b21630 %v529 = add nsw i32 %v15, 63631 %v530 = ashr i32 %v529, 6632 %v531 = icmp slt i32 %v356, %v530633 br i1 %v531, label %b29, label %b31634 635b28: ; preds = %b29, %b28636 %v532 = phi i32 [ %v616, %b28 ], [ %v356, %b29 ]637 %v533 = sub nsw i32 %v618, %v23638 %v534 = mul nsw i32 %v533, %v222639 %v535 = sub nsw i32 %v24, %v27640 %v536 = add nsw i32 %v534, %v535641 %v537 = add nsw i32 %v536, -64642 %v539 = getelementptr inbounds i32, ptr %v227, i32 %v537643 %v541 = load <16 x i32>, ptr %v539, align 4, !tbaa !10644 %v542 = add nsw i32 %v536, -48645 %v543 = getelementptr inbounds i32, ptr %v227, i32 %v542646 %v545 = load <16 x i32>, ptr %v543, align 4, !tbaa !10647 %v546 = shufflevector <16 x i32> %v541, <16 x i32> %v545, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>648 %v547 = add nsw i32 %v533, 1649 %v548 = mul nsw i32 %v547, %v222650 %v549 = add nsw i32 %v548, %v535651 %v550 = add nsw i32 %v549, -64652 %v551 = getelementptr inbounds i32, ptr %v227, i32 %v550653 %v553 = load <16 x i32>, ptr %v551, align 4, !tbaa !10654 %v554 = add nsw i32 %v549, -48655 %v555 = getelementptr inbounds i32, ptr %v227, i32 %v554656 %v557 = load <16 x i32>, ptr %v555, align 4, !tbaa !10657 %v558 = shufflevector <16 x i32> %v553, <16 x i32> %v557, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>658 %v559 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v558)659 %v560 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v558)660 %v561 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v559, i32 168430090)661 %v562 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v560, i32 168430090)662 %v563 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v561, <16 x i32> %v562)663 %v564 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v546, <32 x i32> %v563)664 %v565 = shufflevector <32 x i32> %v564, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>665 %v566 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v565, i32 20)666 %v567 = shufflevector <32 x i32> %v564, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>667 %v568 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v567, i32 20)668 %v569 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v568, <16 x i32> %v566)669 %v570 = add nsw i32 %v536, -32670 %v571 = getelementptr inbounds i32, ptr %v227, i32 %v570671 %v573 = load <16 x i32>, ptr %v571, align 4, !tbaa !10672 %v574 = add nsw i32 %v536, -16673 %v575 = getelementptr inbounds i32, ptr %v227, i32 %v574674 %v577 = load <16 x i32>, ptr %v575, align 4, !tbaa !10675 %v578 = shufflevector <16 x i32> %v573, <16 x i32> %v577, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>676 %v579 = add nsw i32 %v549, -32677 %v580 = getelementptr inbounds i32, ptr %v227, i32 %v579678 %v582 = load <16 x i32>, ptr %v580, align 4, !tbaa !10679 %v583 = add nsw i32 %v549, -16680 %v584 = getelementptr inbounds i32, ptr %v227, i32 %v583681 %v586 = load <16 x i32>, ptr %v584, align 4, !tbaa !10682 %v587 = shufflevector <16 x i32> %v582, <16 x i32> %v586, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>683 %v588 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v587)684 %v589 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v587)685 %v590 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v588, i32 168430090)686 %v591 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32> %v589, i32 168430090)687 %v592 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v590, <16 x i32> %v591)688 %v593 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32> %v578, <32 x i32> %v592)689 %v594 = shufflevector <32 x i32> %v593, <32 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>690 %v595 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v594, i32 20)691 %v596 = shufflevector <32 x i32> %v593, <32 x i32> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>692 %v597 = tail call <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32> %v596, i32 20)693 %v598 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v597, <16 x i32> %v595)694 %v599 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v569)695 %v600 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v569)696 %v601 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v599, <16 x i32> %v600)697 %v602 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v598)698 %v603 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v598)699 %v604 = tail call <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32> %v602, <16 x i32> %v603)700 %v605 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v604, <16 x i32> %v601)701 %v606 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v605)702 %v607 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v605)703 %v608 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %v606, <16 x i32> %v607)704 %v609 = mul nsw i32 %v23, %v19705 %v610 = mul nsw i32 %v618, %v19706 %v611 = add i32 %v15, -64707 %v612 = sub i32 %v611, %v609708 %v613 = add i32 %v612, %v610709 %v614 = getelementptr inbounds i8, ptr %v13, i32 %v613710 store <16 x i32> %v608, ptr %v614, align 1, !tbaa !12711 %v616 = add nuw nsw i32 %v532, 1712 %v617 = icmp eq i32 %v616, %v530713 br i1 %v617, label %b30, label %b28714 715b29: ; preds = %b30, %b27716 %v618 = phi i32 [ %v619, %b30 ], [ %v23, %b27 ]717 br label %b28718 719b30: ; preds = %b28720 %v619 = add nsw i32 %v618, 1721 %v620 = icmp eq i32 %v619, %v50722 br i1 %v620, label %b32, label %b29723 724b31: ; preds = %b27, %b20725 %v621 = icmp eq ptr %v227, null726 br i1 %v621, label %b33, label %b32727 728b32: ; preds = %b31, %b30, %b24729 tail call void @f3(ptr null, ptr %v227) #2730 br label %b33731 732b33: ; preds = %b32, %b31733 ret i32 0734}735 736; Function Attrs: nounwind readnone737declare <32 x i32> @llvm.hexagon.V6.vzb(<16 x i32>) #1738 739; Function Attrs: nounwind readnone740declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #1741 742; Function Attrs: nounwind readnone743declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #1744 745; Function Attrs: nounwind readnone746declare <32 x i32> @llvm.hexagon.V6.vzh(<16 x i32>) #1747 748; Function Attrs: nounwind readnone749declare <16 x i32> @llvm.hexagon.V6.vmpyiwb(<16 x i32>, i32) #1750 751; Function Attrs: nounwind readnone752declare <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32>, <16 x i32>) #1753 754; Function Attrs: nounwind readnone755declare <32 x i32> @llvm.hexagon.V6.vaddw.dv(<32 x i32>, <32 x i32>) #1756 757; Function Attrs: nounwind readnone758declare <16 x i32> @llvm.hexagon.V6.vlsrw(<16 x i32>, i32) #1759 760; Function Attrs: nounwind readnone761declare <16 x i32> @llvm.hexagon.V6.vsatwh(<16 x i32>, <16 x i32>) #1762 763; Function Attrs: nounwind readnone764declare <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32>, <16 x i32>) #1765 766attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }767attributes #1 = { nounwind readnone }768attributes #2 = { nobuiltin nounwind }769 770!llvm.module.flags = !{!0, !1, !2}771 772!0 = !{i32 2, !"halide_use_soft_float_abi", i32 0}773!1 = !{i32 2, !"halide_mcpu", !"hexagonv60"}774!2 = !{i32 2, !"halide_mattrs", !"+hvx"}775!3 = !{!"branch_weights", i32 0, i32 1073741824}776!4 = !{!5, !5, i64 0}777!5 = !{!"input", !6}778!6 = !{!"Halide buffer"}779!7 = !{!8, !8, i64 0}780!8 = !{!"constant_exterior", !6}781!9 = !{!"branch_weights", i32 1073741824, i32 0}782!10 = !{!11, !11, i64 0}783!11 = !{!"rows", !6}784!12 = !{!13, !13, i64 0}785!13 = !{!"gaussian11", !6}786