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1; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 < %s | FileCheck %s2; Check that we generate conversion from single precision floating point3; to 32-bit int value in IEEE complaint mode in V5.4 5; CHECK: r{{[0-9]+}} = convert_sf2w(r{{[0-9]+}}):chop6 7define i32 @main() nounwind {8entry:9 %retval = alloca i32, align 410 %i = alloca i32, align 411 %a = alloca float, align 412 %b = alloca float, align 413 %c = alloca float, align 414 store i32 0, ptr %retval15 store float 0x402ECCCCC0000000, ptr %a, align 416 store float 0x4022333340000000, ptr %b, align 417 %0 = load float, ptr %a, align 418 %1 = load float, ptr %b, align 419 %add = fadd float %0, %120 store volatile float %add, ptr %c, align 421 %2 = load volatile float, ptr %c, align 422 %conv = fptosi float %2 to i3223 store i32 %conv, ptr %i, align 424 %3 = load i32, ptr %i, align 425 ret i32 %326}27