81 lines · plain
1; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv67t < %s | FileCheck %s2 3;CHECK-NOT: CONST644 5define dso_local void @analyze(ptr nocapture %analysisBuffer0, ptr nocapture %analysisBuffer1, ptr nocapture %subband) local_unnamed_addr {6entry:7 %0 = load i64, ptr undef, align 88 %1 = tail call i64 @llvm.hexagon.S2.vtrunewh(i64 %0, i64 undef)9 %2 = tail call i64 @llvm.hexagon.S2.vtrunowh(i64 %0, i64 undef)10 %_HEXAGON_V64_internal_union.sroa.3.0.extract.shift = and i64 %1, -429496729611 %3 = shl i64 %2, 3212 %conv15 = ashr exact i64 %3, 3213 %arrayidx16 = getelementptr inbounds i16, ptr %analysisBuffer0, i32 414 store i64 %_HEXAGON_V64_internal_union.sroa.3.0.extract.shift, ptr %arrayidx16, align 815 %arrayidx17 = getelementptr inbounds i16, ptr %analysisBuffer1, i32 416 store i64 %conv15, ptr %arrayidx17, align 817 %arrayidx18 = getelementptr inbounds i16, ptr %analysisBuffer1, i32 818 %4 = load i64, ptr %arrayidx18, align 819 %5 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 undef, i64 29819854865948160, i64 %4)20 store i64 %5, ptr %arrayidx18, align 821 %arrayidx34 = getelementptr inbounds i16, ptr %analysisBuffer0, i32 4022 %6 = load i64, ptr %arrayidx34, align 823 %7 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 undef, i64 282574488406740992, i64 %6)24 %arrayidx35 = getelementptr inbounds i16, ptr %analysisBuffer0, i32 5625 %8 = load i64, ptr %arrayidx35, align 826 %9 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 undef, i64 undef, i64 %8)27 %10 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 %5, i64 282574488406740992, i64 %4)28 %11 = load i64, ptr null, align 829 %12 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 %9, i64 27234903028652032, i64 %11)30 %13 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 undef, i64 27234903028652032, i64 %4)31 %14 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 %10, i64 7661056, i64 %4)32 %_HEXAGON_V64_internal_union53.sroa.3.0.extract.shift = lshr i64 %12, 3233 %_HEXAGON_V64_internal_union62.sroa.3.0.extract.shift = and i64 %13, -429496729634 %_HEXAGON_V64_internal_union71.sroa.0.0.insert.insert = or i64 %_HEXAGON_V64_internal_union62.sroa.3.0.extract.shift, %_HEXAGON_V64_internal_union53.sroa.3.0.extract.shift35 %_HEXAGON_V64_internal_union79.sroa.4.0.insert.shift = shl i64 %14, 3236 %_HEXAGON_V64_internal_union79.sroa.0.0.insert.ext = and i64 %7, 429496729537 %_HEXAGON_V64_internal_union79.sroa.0.0.insert.insert = or i64 %_HEXAGON_V64_internal_union79.sroa.4.0.insert.shift, %_HEXAGON_V64_internal_union79.sroa.0.0.insert.ext38 %15 = tail call i64 @llvm.hexagon.M2.mmpyh.s0(i64 %_HEXAGON_V64_internal_union71.sroa.0.0.insert.insert, i64 undef)39 %16 = tail call i64 @llvm.hexagon.A2.vsubw(i64 undef, i64 %15)40 %17 = tail call i64 @llvm.hexagon.A2.vaddw(i64 undef, i64 undef)41 %18 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %17, i32 2)42 %19 = tail call i64 @llvm.hexagon.M2.mmpyl.s0(i64 0, i64 undef)43 %20 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %19, i32 2)44 %21 = tail call i64 @llvm.hexagon.A2.vsubw(i64 undef, i64 %18)45 %22 = tail call i64 @llvm.hexagon.A2.vaddw(i64 %20, i64 %_HEXAGON_V64_internal_union79.sroa.0.0.insert.insert)46 %23 = tail call i64 @llvm.hexagon.M2.mmpyh.s0(i64 %22, i64 undef)47 %24 = tail call i64 @llvm.hexagon.M2.mmpyl.s0(i64 %21, i64 3998767301)48 %25 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %24, i32 2)49 %26 = tail call i64 @llvm.hexagon.A2.vaddw(i64 undef, i64 %23)50 %27 = tail call i64 @llvm.hexagon.A2.vaddw(i64 0, i64 %25)51 %28 = tail call i64 @llvm.hexagon.A2.vaddw(i64 %16, i64 undef)52 %_HEXAGON_V64_internal_union8.sroa.0.0.insert.ext.i = and i64 %26, 429496729553 store i64 %_HEXAGON_V64_internal_union8.sroa.0.0.insert.ext.i, ptr %subband, align 854 %_HEXAGON_V64_internal_union17.sroa.5.0.insert.shift.i = shl i64 %28, 3255 %_HEXAGON_V64_internal_union17.sroa.0.0.insert.ext.i = and i64 %27, 429496729556 %_HEXAGON_V64_internal_union17.sroa.0.0.insert.insert.i = or i64 %_HEXAGON_V64_internal_union17.sroa.5.0.insert.shift.i, %_HEXAGON_V64_internal_union17.sroa.0.0.insert.ext.i57 %arrayidx31.i = getelementptr inbounds i32, ptr %subband, i32 258 store i64 %_HEXAGON_V64_internal_union17.sroa.0.0.insert.insert.i, ptr %arrayidx31.i, align 859 %_HEXAGON_V64_internal_union32.sroa.0.0.insert.ext.i = and i64 %17, 429496729560 %arrayidx46.i = getelementptr inbounds i32, ptr %subband, i32 461 store i64 %_HEXAGON_V64_internal_union32.sroa.0.0.insert.ext.i, ptr %arrayidx46.i, align 862 %arrayidx55.i = getelementptr inbounds i32, ptr %subband, i32 663 store i64 0, ptr %arrayidx55.i, align 864 %arrayidx64.i = getelementptr inbounds i32, ptr %subband, i32 865 store i64 0, ptr %arrayidx64.i, align 866 %arrayidx73.i = getelementptr inbounds i32, ptr %subband, i32 1267 store i64 0, ptr %arrayidx73.i, align 868 ret void69}70 71; Function Attrs: nounwind readnone72declare i64 @llvm.hexagon.S2.vtrunewh(i64, i64)73declare i64 @llvm.hexagon.S2.vtrunowh(i64, i64)74declare i64 @llvm.hexagon.M2.mmachs.s1(i64, i64, i64)75declare i64 @llvm.hexagon.M2.mmacls.s1(i64, i64, i64)76declare i64 @llvm.hexagon.M2.mmpyh.s0(i64, i64)77declare i64 @llvm.hexagon.A2.vsubw(i64, i64)78declare i64 @llvm.hexagon.A2.vaddw(i64, i64)79declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32)80declare i64 @llvm.hexagon.M2.mmpyl.s0(i64, i64)81