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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3target triple = "hexagon-unknown--elf"4 5; Check that we can predicate base+offset vector stores.6; CHECK-LABEL: sammy7; CHECK: if{{.*}}vmem(r{{[0-9]+}}+#0) =8define void @sammy(ptr nocapture %p, ptr nocapture readonly %q, i32 %n) #0 {9entry:10 %0 = load <16 x i32>, ptr %q, align 6411 %sub = add nsw i32 %n, -112 br label %for.body13 14for.body: ; preds = %if.end, %entry15 %p.addr.011 = phi ptr [ %p, %entry ], [ %incdec.ptr, %if.end ]16 %i.010 = phi i32 [ 0, %entry ], [ %add, %if.end ]17 %mul = mul nsw i32 %i.010, %sub18 %add = add nuw nsw i32 %i.010, 119 %mul1 = mul nsw i32 %add, %n20 %cmp2 = icmp slt i32 %mul, %mul121 br i1 %cmp2, label %if.then, label %if.end22 23if.then: ; preds = %for.body24 store <16 x i32> %0, ptr %p.addr.011, align 6425 br label %if.end26 27if.end: ; preds = %if.then, %for.body28 %incdec.ptr = getelementptr inbounds <16 x i32>, ptr %p.addr.011, i32 129 %exitcond = icmp eq i32 %add, 10030 br i1 %exitcond, label %for.end, label %for.body31 32for.end: ; preds = %if.end33 ret void34}35 36; Check that we can predicate post-increment vector stores.37; CHECK-LABEL: danny38; CHECK: if{{.*}}vmem(r{{[0-9]+}}++#1) =39define void @danny(ptr nocapture %p, ptr nocapture readonly %q, i32 %n) #0 {40entry:41 %0 = load <16 x i32>, ptr %q, align 6442 %sub = add nsw i32 %n, -143 br label %for.body44 45for.body: ; preds = %if.end, %entry46 %p.addr.012 = phi ptr [ %p, %entry ], [ %incdec.ptr3, %if.end ]47 %i.011 = phi i32 [ 0, %entry ], [ %add, %if.end ]48 %mul = mul nsw i32 %i.011, %sub49 %add = add nuw nsw i32 %i.011, 150 %mul1 = mul nsw i32 %add, %n51 %cmp2 = icmp slt i32 %mul, %mul152 br i1 %cmp2, label %if.then, label %if.end53 54if.then: ; preds = %for.body55 %incdec.ptr = getelementptr inbounds <16 x i32>, ptr %p.addr.012, i32 156 store <16 x i32> %0, ptr %p.addr.012, align 6457 br label %if.end58 59if.end: ; preds = %if.then, %for.body60 %p.addr.1 = phi ptr [ %incdec.ptr, %if.then ], [ %p.addr.012, %for.body ]61 %incdec.ptr3 = getelementptr inbounds <16 x i32>, ptr %p.addr.1, i32 162 %exitcond = icmp eq i32 %add, 10063 br i1 %exitcond, label %for.end, label %for.body64 65for.end: ; preds = %if.end66 ret void67}68 69attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }70