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1; RUN: llc -O3 -mtriple=hexagon -hexagon-small-data-threshold=0 -disable-packetizer < %s | FileCheck %s2 3; This test was orignally written to test that we don't save an entire double4; register if only one of the integer registers needs to be saved. The problem5; occurs in exception handling, which only emit information for the registers6; in the callee saved list (and not complete double registers unless both7; parts of the double registers are used).8; Overtime, we evolved in to saving the double register and updating the debug9; information to cover the entire double register.10 11; Disable the packetizer to avoid complications caused by potentially12; packetizing one of the stores with allocframe, which would change the13; relative order of the stores with the CFI instructions.14 15; CHECK: cfi_startproc16; CHECK-DAG: cfi_offset r1617; CHECK-DAG: cfi_offset r1718; CHECK-DAG: cfi_offset r1819; CHECK-DAG: cfi_offset r1920; CHECK: memd(r29+{{.*}}) = r17:1621; CHECK: memd(r29+{{.*}}) = r19:1822 23%s.0 = type { i32 }24 25@g0 = global i32 0, align 426@g1 = external constant ptr27 28; Function Attrs: noreturn29define void @f0(i64 %a0) #0 personality ptr @f2 {30b0:31 %v0 = alloca %s.0, align 432 %v1 = trunc i64 %a0 to i3233 %v2 = lshr i64 %a0, 3234 %v3 = trunc i64 %v2 to i3235 store i32 0, ptr %v0, align 4, !tbaa !036 %v5 = load i32, ptr @g0, align 4, !tbaa !537 %v6 = or i32 %v5, 138 store i32 %v6, ptr @g0, align 4, !tbaa !539 %v7 = call ptr @f1(i32 4) #140 %v10 = getelementptr inbounds i8, ptr %v0, i32 %v341 %v12 = and i32 %v1, 142 %v13 = icmp eq i32 %v12, 043 br i1 %v13, label %b2, label %b144 45b1: ; preds = %b046 %v15 = load ptr, ptr %v10, align 447 %v16 = add i32 %v1, -148 %v17 = getelementptr i8, ptr %v15, i32 %v1649 %v19 = load ptr, ptr %v17, align 450 br label %b351 52b2: ; preds = %b053 %v20 = inttoptr i32 %v1 to ptr54 br label %b355 56b3: ; preds = %b2, %b157 %v21 = phi ptr [ %v19, %b1 ], [ %v20, %b2 ]58 %v22 = invoke i32 %v21(ptr %v10)59 to label %b4 unwind label %b560 61b4: ; preds = %b362 store i32 %v22, ptr %v7, align 4, !tbaa !563 call void @f4(ptr %v7, ptr @g1, ptr null) #264 unreachable65 66b5: ; preds = %b367 %v23 = landingpad { ptr, i32 }68 cleanup69 call void @f3(ptr %v7) #170 resume { ptr, i32 } %v2371}72 73declare ptr @f1(i32)74 75declare i32 @f2(...)76 77declare void @f3(ptr)78 79declare void @f4(ptr, ptr, ptr)80 81attributes #0 = { noreturn "target-cpu"="hexagonv55" }82attributes #1 = { nounwind }83attributes #2 = { noreturn }84 85!0 = !{!1, !2, i64 0}86!1 = !{!"_ZTS1A", !2, i64 0}87!2 = !{!"int", !3, i64 0}88!3 = !{!"omnipotent char", !4, i64 0}89!4 = !{!"Simple C/C++ TBAA"}90!5 = !{!2, !2, i64 0}91