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1; RUN: llc -mtriple=hexagon < %s2; REQUIRES: asserts3 4; Test that the compiler doesn't assert because the live interval information5; isn't updated correctly during the Hexagon Expand Condsets pass. The pass6; wasn't updating the information when converting a mux with the same operands7; into a copy. When this occurs, the pass needs to update the liveness8; information for the predicate register, which is removed.9 10define void @f0(i32 %a0) unnamed_addr {11b0:12 %v0 = or i32 undef, %a013 %v1 = or i32 undef, %v014 br label %b115 16b1: ; preds = %b3, %b017 %v2 = phi i32 [ %v9, %b3 ], [ 0, %b0 ]18 %v3 = phi i32 [ 0, %b3 ], [ %v1, %b0 ]19 %v4 = srem i32 %v2, 420 %v5 = icmp eq i32 %v4, 021 %v6 = select i1 %v5, i32 %v1, i32 %v322 %v7 = shl i32 %v6, 823 %v8 = add i32 0, %v724 br i1 undef, label %b2, label %b325 26b2: ; preds = %b127 store i32 %v8, ptr undef, align 428 br label %b329 30b3: ; preds = %b2, %b131 %v9 = add nuw nsw i32 %v2, 132 %v10 = icmp slt i32 %v9, undef33 br i1 %v10, label %b1, label %b434 35b4: ; preds = %b336 unreachable37}38