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1# RUN: llc -mtriple=hexagon -run-pass expand-condsets -expand-condsets-coa-limit=0 -o - %s -verify-machineinstrs | FileCheck %s2 3# CHECK-LABEL: name: fred4 5--- |6 define void @fred() { ret void }7 8...9---10 11name: fred12tracksRegLiveness: true13registers:14 - { id: 0, class: predregs }15 - { id: 1, class: intregs }16 - { id: 2, class: intregs }17 - { id: 3, class: intregs }18 19body: |20 bb.0:21 liveins: $r0, $r1, $r2, $p022 %0 = COPY $p023 %0 = COPY $p0 ; Cheat: convince MIR parser that this is not SSA.24 %1 = COPY $r125 ; Make sure we do not expand/predicate a mux with identical inputs.26 ; CHECK-NOT: A2_paddit27 %2 = A2_addi %1, 128 %3 = C2_mux %0, killed %2, %229 $r0 = COPY %330 31...32 33