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1; RUN: llc -mtriple=hexagon -hexagon-small-data-threshold=0 -disable-hsdr < %s | FileCheck %s2; Check that the combine/stxw instructions are being generated.3; In case of combine one of the operand should be 0 and another should be4; the output of absolute addressing load instruction.5 6@a = external global i167@b = external global i168@c = external global i169@char_a = external global i810@char_b = external global i811@char_c = external global i812@int_a = external global i3213@int_b = external global i3214@int_c = external global i3215 16; Function Attrs: nounwind17define i64 @short_test1() #0 {18; CHECK: [[VAR:r[0-9]+]] = memuh(##19; CHECK: combine(#0,[[VAR]])20entry:21 store i16 0, ptr @a, align 222 %0 = load i16, ptr @b, align 223 %conv2 = zext i16 %0 to i6424 ret i64 %conv225}26 27; Function Attrs: nounwind28define i64 @short_test2() #0 {29; CHECK: [[VAR1:r[0-9]+]] = memh(##30; CHECK: sxtw([[VAR1]])31entry:32 store i16 0, ptr @a, align 233 %0 = load i16, ptr @c, align 234 %conv2 = sext i16 %0 to i6435 ret i64 %conv236}37 38; Function Attrs: nounwind39define i64 @char_test1() #0 {40; CHECK: [[VAR2:r[0-9]+]] = memub(##41; CHECK: combine(#0,[[VAR2]])42entry:43 store i8 0, ptr @char_a, align 144 %0 = load i8, ptr @char_b, align 145 %conv2 = zext i8 %0 to i6446 ret i64 %conv247}48 49; Function Attrs: nounwind50define i64 @char_test2() #0 {51; CHECK: [[VAR3:r[0-9]+]] = memb(##52; CHECK: sxtw([[VAR3]])53entry:54 store i8 0, ptr @char_a, align 155 %0 = load i8, ptr @char_c, align 156 %conv2 = sext i8 %0 to i6457 ret i64 %conv258}59 60; Function Attrs: nounwind61define i64 @int_test1() #0 {62; CHECK: [[VAR4:r[0-9]+]] = memw(##63; CHECK: combine(#0,[[VAR4]])64entry:65 store i32 0, ptr @int_a, align 466 %0 = load i32, ptr @int_b, align 467 %conv = zext i32 %0 to i6468 ret i64 %conv69}70 71; Function Attrs: nounwind72define i64 @int_test2() #0 {73; CHECK: [[VAR5:r[0-9]+]] = memw(##74; CHECK: sxtw([[VAR5]])75entry:76 store i32 0, ptr @int_a, align 477 %0 = load i32, ptr @int_c, align 478 %conv = sext i32 %0 to i6479 ret i64 %conv80}81