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1; RUN: llc -march=hexagon < %s | FileCheck %s2;3; Test that all FP ordered compare instructions generate the correct4; post-processing to accommodate NaNs.5;6; Specifically for ordered FP compares, we have to check if one of7; the operands was a NaN to comform to the semantics of the ordered8; fcmp bitcode instruction9;10target triple = "hexagon"11 12;13; Functions for float:14;15 16;17; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.eq(r0,r1)18; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r0,r1)19; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])20; CHECK: r0 = mux([[REG2]],#1,#0)21;22define i32 @compare_oeq_f(float %val, float %val2) local_unnamed_addr #0 {23entry:24 %cmpinf = fcmp oeq float %val, %val225 %0 = zext i1 %cmpinf to i3226 ret i32 %027}28 29 30;31; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.eq(r0,r1)32; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r0,r1)33; CHECK: [[REG2:p([0-3])]] = or([[REG0]],[[REG1]])34; CHECK: r0 = mux([[REG2]],#0,#1)35;36define i32 @compare_one_f(float %val, float %val2) local_unnamed_addr #0 {37entry:38 %cmpinf = fcmp one float %val, %val239 %0 = zext i1 %cmpinf to i3240 ret i32 %041}42 43 44;45; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.gt(r0,r1)46; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r0,r1)47; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])48; CHECK: r0 = mux([[REG2]],#1,#0)49;50define i32 @compare_ogt_f(float %val, float %val2) local_unnamed_addr #0 {51entry:52 %cmpinf = fcmp ogt float %val, %val253 %0 = zext i1 %cmpinf to i3254 ret i32 %055}56 57 58;59; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.ge(r1,r0)60; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r1,r0)61; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])62; CHECK: r0 = mux([[REG2]],#1,#0)63;64define i32 @compare_ole_f(float %val, float %val2) local_unnamed_addr #0 {65entry:66 %cmpinf = fcmp ole float %val, %val267 %0 = zext i1 %cmpinf to i3268 ret i32 %069}70 71 72 73;74; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.ge(r0,r1)75; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r0,r1)76; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])77; CHECK: r0 = mux([[REG2]],#1,#0)78;79define i32 @compare_oge_f(float %val, float %val2) local_unnamed_addr #0 {80entry:81 %cmpinf = fcmp oge float %val, %val282 %0 = zext i1 %cmpinf to i3283 ret i32 %084}85 86 87;88; CHECK-DAG: [[REG0:p([0-3])]] = sfcmp.gt(r1,r0)89; CHECK-DAG: [[REG1:p([0-3])]] = sfcmp.uo(r1,r0)90; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])91; CHECK: r0 = mux([[REG2]],#1,#0)92;93define i32 @compare_olt_f(float %val, float %val2) local_unnamed_addr #0 {94entry:95 %cmpinf = fcmp olt float %val, %val296 %0 = zext i1 %cmpinf to i3297 ret i32 %098}99 100 101 102;103; Functions for double:104;105 106;107; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.eq(r1:0,r3:2)108; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r1:0,r3:2)109; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])110; CHECK: r0 = mux([[REG2]],#1,#0)111;112define i32 @compare_oeq_d(double %val, double %val2) local_unnamed_addr #0 {113entry:114 %cmpinf = fcmp oeq double %val, %val2115 %0 = zext i1 %cmpinf to i32116 ret i32 %0117}118 119 120;121; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.eq(r1:0,r3:2)122; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r1:0,r3:2)123; CHECK: [[REG2:p([0-3])]] = or([[REG0]],[[REG1]])124; CHECK: r0 = mux([[REG2]],#0,#1)125;126define i32 @compare_one_d(double %val, double %val2) local_unnamed_addr #0 {127entry:128 %cmpinf = fcmp one double %val, %val2129 %0 = zext i1 %cmpinf to i32130 ret i32 %0131}132 133 134 135;136; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.gt(r1:0,r3:2)137; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r1:0,r3:2)138; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])139; CHECK: r0 = mux([[REG2]],#1,#0)140;141define i32 @compare_ogt_d(double %val, double %val2) local_unnamed_addr #0 {142entry:143 %cmpinf = fcmp ogt double %val, %val2144 %0 = zext i1 %cmpinf to i32145 ret i32 %0146}147 148 149;150; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.ge(r3:2,r1:0)151; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r3:2,r1:0)152; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])153; CHECK: r0 = mux([[REG2]],#1,#0)154;155define i32 @compare_ole_d(double %val, double %val2) local_unnamed_addr #0 {156entry:157 %cmpinf = fcmp ole double %val, %val2158 %0 = zext i1 %cmpinf to i32159 ret i32 %0160}161 162 163;164; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.ge(r1:0,r3:2)165; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r1:0,r3:2)166; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])167; CHECK: r0 = mux([[REG2]],#1,#0)168;169define i32 @compare_oge_d(double %val, double %val2) local_unnamed_addr #0 {170entry:171 %cmpinf = fcmp oge double %val, %val2172 %0 = zext i1 %cmpinf to i32173 ret i32 %0174}175 176 177;178; CHECK-DAG: [[REG0:p([0-3])]] = dfcmp.gt(r3:2,r1:0)179; CHECK-DAG: [[REG1:p([0-3])]] = dfcmp.uo(r3:2,r1:0)180; CHECK: [[REG2:p([0-3])]] = and([[REG0]],![[REG1]])181; CHECK: r0 = mux([[REG2]],#1,#0)182;183define i32 @compare_olt_d(double %val, double %val2) local_unnamed_addr #0 {184entry:185 %cmpinf = fcmp olt double %val, %val2186 %0 = zext i1 %cmpinf to i32187 ret i32 %0188}189 190