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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; CHECK-LABEL: t04; CHECK: r0 = add(r1,add(r0,#23))5define i32 @t0(i32 %a0, i32 %a1) #0 {6 %v0 = add i32 %a1, 237 %v1 = add i32 %a0, %v08 ret i32 %v19}10 11; CHECK-LABEL: t112; CHECK: r[[R:[0-9]+]] = add(r1,r0)13; CHECK: r0 = add(r[[R]],#23)14define i32 @t1(i32 %a0, i32 %a1) #1 {15 %v0 = add i32 %a1, 2316 %v1 = add i32 %a0, %v017 ret i32 %v118}19 20attributes #0 = { nounwind readnone "target-cpu"="hexagonv62" "target-features"="+compound" }21attributes #1 = { nounwind readnone "target-cpu"="hexagonv62" "target-features"="-compound" }22